Abstract: A high-speed multi-write read only memory array includes word lines, select lines, bit lines, and sub-memory arrays. There are a first word line, a first select line, a second select line, a first bit line, a second bit line, a third bit line, and a fourth bit line. Each sub-memory array includes a first memory cell coupled to the first word line, the first select line, and the first bit line, a second memory cell coupled to the first word line, the first select line, and the second bit line, a third memory cell coupled to the first word line, the second select line, and the third bit line, and a fourth memory cell coupled to the first word line, the second select line, and the fourth bit line.

Abstract: Doped titanium niobate is provided, which has a chemical structure of Ti(1-x)M1xNb2O(7-z)Sz, wherein M1 is Li, Mg, or a combination thereof; 0?x?0.15; and 0.0025?z?0.075. A battery is provided, which includes a negative electrode; a positive electrode; and an electrolyte disposed between the negative electrode and the positive electrode, wherein the negative electrode includes the doped titanium niobate.

Abstract: A Mg—Li—Al—Zn alloy is disclosed. The Mg—Li—Al—Zn alloy comprises, in weight percent: 5-15% Li, 1.5-9.0% Al, 0.5-1.5% Zn, 0.4-1.3% Y, 0.18-1.01% Nd, 0.09-0.65% Ce, and the balance Mg and incidental impurities. Experimental data have proved that, this novel Mg—Li—Al—Zn alloy has a flashover temperature in a range between 620° C. and 700° C., such that the flashover temperature of the specifically-designed Mg—Li—Al—Zn alloy is greater than that of commercial LAZ521, LAZ721, LAZ771, LAZ921, and LAZ1491 alloys. Therefore, the Mg—Li—Al—Zn alloy of the present invention can be processed to be a structural article through air melt and casting process.

Abstract: A memory structure includes a substrate; a first gate structure, a second gate structure and a third gate structure disposed on the substrate, separated from each other along the first direction and respectively extending along the second direction and the third direction; channel bodies separated from each other and passing through the first gate structure, the second gate structure and the third gate structure along the first direction; dielectric films disposed between the first gate structure, the second gate structure, the third gate structure and the channel bodies; and a first side plug electrically connected to the substrate and the channel bodies. The first gate structure, the second gate structure and the third gate structure surround each of the dielectric films and each of the channel bodies, and the dielectric films do not include a charge storage structure.

Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.

Abstract: The present invention provides novel allergens isolated from grass carp Ctenopharyngodon idella, recombinant or modified polypeptides comprising such allergens, nucleic acids encoding the polypeptides as well as related compositions. Also provided are methods and kits for diagnosing fish allergy.

Abstract: The present invention provides methods and compositions for improved diagnosis of shrimp allergies.

Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.

Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.

Abstract: A semiconductor device includes a channel, source/drain structures, and a gate stack. The source/drain structures are on opposite sides of the channel. The gate stack is over the channel, and the gate stack includes a gate dielectric layer, a doped ferroelectric layer, and a gate electrode. The gate dielectric layer is over the channel. The doped ferroelectric layer is over the gate dielectric layer. The gate electrode is over the doped ferroelectric layer. A dopant concentration of the doped ferroelectric layer varies in a direction from the gate electrode toward the channel.

Abstract: A semiconductor device includes a channel, source/drain structures, and a gate stack. The source/drain structures are on opposite sides of the channel. The gate stack is over the channel, and the gate stack includes a gate dielectric layer, a doped ferroelectric layer, and a gate electrode. The gate dielectric layer is over the channel. The doped ferroelectric layer is over the gate dielectric layer. The gate electrode is over the doped ferroelectric layer. A dopant concentration of the doped ferroelectric layer varies in a direction from the gate electrode toward the channel.

Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.

Abstract: The present invention provides novel allergens isolated from grass carp Ctenopharyngodon Idella, recombinant or modified polypeptides comprising such allergens, nucleic acids encoding the polypeptides as well as related compositions. Also provided are methods and kits for diagnosing fish allergy.

Abstract: A semiconductor device includes a source and a drain and a channel disposed between the source and the drain, a first gate dielectric layer disposed on the channel, a first gate electrode disposed on the first gate dielectric layer, a second gate dielectric layer disposed on the first gate electrode, and a second gate electrode disposed on the second gate dielectric layer. The second gate dielectric layer is made of a ferroelectric material. A first area of a bottom surface of the first gate electrode which is in contact with the first gate dielectric layer where the is greater than a second area of a bottom surface of the second gate dielectric layer which is in contact with the first gate electrode.

Abstract: Doped titanium niobate is provided, which has a chemical structure of Ti(1-x)M1xNb(2-y)M2yO(7-z)Qz or Ti(2-x?)M1x?Nb(10-y?)M2y?O(29-z?)Qz?, wherein M1 is Li, Mg, or a combination thereof; M2 is Fe, Mn, V, Ni, Cr, or a combination thereof; Q is F, Cl, Br, I, S, or a combination thereof; 0?x?0.15; 0?y?0.15; 0.01?z?2; 0?x??0.3; 0?y??0.9; and 0.01?z??8.

Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.

Abstract: Semiconductor devices and methods of forming the same are provided. A first gate electrode layer is formed over a substrate. A first gate dielectric layer is formed over the first gate electrode layer. A first channel layer is formed over the first gate dielectric layer. An isolation layer is formed over the first channel layer. A second channel layer is formed over the isolation layer. A second gate dielectric layer is formed over the second channel layer. The second gate dielectric layer, the second channel layer, the isolation layer and the first channel layer are patterned to form a first opening, the first opening extending through the first gate dielectric layer, the second channel layer and the isolation layer, and into the first channel layer. A first source/drain region is formed in the first opening.

Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.

Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.