Patents by Inventor Ting Fu Chang

Ting Fu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150084060
    Abstract: The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.
    Type: Application
    Filed: August 20, 2014
    Publication date: March 26, 2015
    Applicant: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chih-Fang Huang, Tsung-Yi Huang, Chien-Wei Chiu, Tsung-Yu Yang, Ting-Fu Chang, Tsung-Chieh Hsiao, Ya-Hsien Liu, Po-Chin Peng
  • Patent number: 8981429
    Abstract: The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT device includes: a substrate, a first gallium nitride (GaN) layer; a P-type GaN layer, a second GaN layer, a barrier layer, a gate, a source, and a drain. The first GaN layer is formed on the substrate, and has a stepped contour from a cross-section view. The P-type GaN layer is formed on an upper step surface of the stepped contour, and has a vertical sidewall. The second GaN layer is formed on the P-type GaN layer. The barrier layer is formed on the second GaN layer. two dimensional electron gas regions are formed at junctions between the barrier layer and the first and second GaN layers. The gate is formed on an outer side of the vertical sidewall.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: March 17, 2015
    Assignee: Richtek Technology Corporation, R.O.C.
    Inventors: Chih-Fang Huang, Po-Chin Peng, Tsung-Chieh Hsiao, Ya-Hsien Liu, K. C. Chang, Hung-Der Su, Chien-Wei Chiu, Tsung-Yi Huang, Tsung-Yu Yang, Ting-Fu Chang
  • Publication number: 20150021615
    Abstract: The present invention discloses a junction barrier Schottky (JBS) diode and a manufacturing method thereof. The JBS diode includes: an N-type gallium nitride (GaN) substrate; an aluminum gallium nitride (AlGaN) barrier layer, which is formed on the N-type GaN substrate; a P-type gallium nitride (GaN) layer, which is formed on or above the N-type GaN substrate; an anode conductive layer, which is formed at least partially on the AlGaN barrier layer, wherein a Schottky contact is formed between part of the anode conductive layer and the AlGaN barrier layer; and a cathode conductive layer, which is formed on the N-type GaN substrate, wherein an ohmic contact is formed between the cathode conductive layer and the N-type GaN substrate, and the cathode conductive layer is not directly connected to the anode conductive layer.
    Type: Application
    Filed: September 28, 2013
    Publication date: January 22, 2015
    Applicant: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chih-Fang Huang, Tsung-Yi Huang, Chien-Wei Chiu, Tsung-Yu Yang, Ting-Fu Chang, Tsung-Chieh Hsiao, Ya-Hsien Liu, Po-Chin Peng
  • Publication number: 20140187003
    Abstract: The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT includes a semiconductor layer, a barrier layer on the semiconductor layer, a piezoelectric layer on the barrier layer, a gate on the piezoelectric layer, and a source and a drain at two sides of the gate respectively, wherein each bandgap of the semiconductor layer, the barrier layer, and the piezoelectric layer partially but not entirely overlaps the other two bandgaps. The gate is formed for receiving a gate voltage. A two dimensional electron gas (2DEG) is formed in a portion of a junction between the semiconductor layer and the barrier layer but not below at least a portion of the piezoelectric layer, wherein the 2DEG is electrically connected to the source and the drain.
    Type: Application
    Filed: March 9, 2014
    Publication date: July 3, 2014
    Applicant: RICHTEK TECHNOLOGY CORPORATION, R.O.C
    Inventors: Chih-Fang Huang, Chien-Wei Chiu, Ting-Fu Chang, Tsung-Yu Yang, Tsung-Yi Huang
  • Publication number: 20140159048
    Abstract: The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT device includes: a substrate, a first gallium nitride (GaN) layer; a P-type GaN layer, a second GaN layer, a barrier layer, a gate, a source, and a drain. The first GaN layer is formed on the substrate, and has a stepped contour from a cross-section view. The P-type GaN layer is formed on an upper step surface of the stepped contour, and has a vertical sidewall. The second GaN layer is formed on the P-type GaN layer. The barrier layer is formed on the second GaN layer. two dimensional electron gas regions are formed at junctions between the barrier layer and the first and second GaN layers. The gate is formed on an outer side of the vertical sidewall.
    Type: Application
    Filed: May 20, 2013
    Publication date: June 12, 2014
    Applicant: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chih-Fang Huang, Po-Chin Peng, Tsung-Chieh Hsiao, Ya-Hsien Liu, K.C. Chang, Hung-Der Su, Chien-Wei Chiu, Tsung-Yi Huang, Tsung-Yu Yang, Ting-Fu Chang
  • Patent number: 8710551
    Abstract: The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT includes a semiconductor layer, a barrier layer on the semiconductor layer, a piezoelectric layer on the barrier layer, a gate on the piezoelectric layer, and a source and a drain at two sides of the gate respectively, wherein each bandgap of the semiconductor layer, the barrier layer, and the piezoelectric layer partially but not entirely overlaps the other two bandgaps. The gate is formed for receiving a gate voltage. A two dimensional electron gas (2DEG) is formed in a portion of a junction between the semiconductor layer and the barrier layer but not below at least a portion of the piezoelectric layer, wherein the 2DEG is electrically connected to the source and the drain.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: April 29, 2014
    Assignee: Richtek Technology Corporation, R.O.C.
    Inventors: Chih-Fang Huang, Chien-Wei Chiu, Ting-Fu Chang, Tsung-Yu Yang, Tsung-Yi Huang
  • Publication number: 20140061724
    Abstract: The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT includes a semiconductor layer, a barrier layer on the semiconductor layer, a piezoelectric layer on the barrier layer, a gate on the piezoelectric layer, and a source and a drain at two sides of the gate respectively, wherein each bandgap of the semiconductor layer, the barrier layer, and the piezoelectric layer partially but not entirely overlaps the other two bandgaps. The gate is formed for receiving a gate voltage. A two dimensional electron gas (2DEG) is formed in a portion of a junction between the semiconductor layer and the barrier layer but not below at least a portion of the piezoelectric layer, wherein the 2DEG is electrically connected to the source and the drain.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 6, 2014
    Inventors: Chih-Fang Huang, Chien-Wei Chiu, Ting-Fu Chang, Tsung-Yu Yang, Tsung-Yi Huang
  • Publication number: 20130270571
    Abstract: The present invention discloses a Schottky barrier diode (SBD) and a manufacturing method thereof. The SBD is formed on a substrate. The SBD includes: a gallium nitride (GaN) layer; an aluminum gallium nitride (AlGaN), formed on the GaN layer; a high work function conductive layer, formed on the AlGaN layer, wherein a first Schottky contact is formed between the high work function conductive layer and the AlGaN layer; a low work function conductive layer, formed on the AlGaN layer, wherein a second Schottky contact is formed between the low work function conductive layer and the AlGaN layer; and an ohmic contact metal layer, formed on the AlGaN layer, wherein an ohmic contact is formed between the ohmic contact metal layer and the AlGaN layer, and wherein the ohmic contact conductive layer is separated from the high and low work function conductive layers by a dielectric layer.
    Type: Application
    Filed: April 16, 2012
    Publication date: October 17, 2013
    Inventors: Chih-Fang Huang, Tsung-Yu Yang, Ting-Fu Chang, Tsung-Yi Huang, Chien-Wei Chiu
  • Patent number: 6469693
    Abstract: A computer mouse includes a mouse housing for supporting a ball therein. The housing includes a top coupled with a bottom. The bottom includes a single-piece body without a belly door, and the top includes a single-piece body having at least one button formed integrally with the single-piece body. The bottom includes an opening having a size smaller than the diameter of the ball. The opening is sized to expose a portion of the ball to roll on a working surface. Rotational members such as encoding wheel shafts are disposed near the opening to contact the ball and rotate synchronously with the ball. A ball support is disposed between the top and the bottom for receiving the ball upon turning of the mouse housing upside down. The ball support has a sufficient depth to allow the ball to drop away from the opening in the bottom and to expose and render the at least one rotational member accessible from outside the housing through the opening.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: October 22, 2002
    Assignee: Logitech Europe S.A.
    Inventors: Jen-Ming Chiang, Ting Fu Chang, Shawn D. Worsell
  • Patent number: D440972
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: April 24, 2001
    Assignee: Logitech, Inc.
    Inventors: Jen-Ming Chiang, Ting Fu Chang, Shawn D. Worsell
  • Patent number: D430879
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: September 12, 2000
    Assignee: Logitech, Inc.
    Inventors: Jen-Ming Chiang, Ting Fu Chang, Shawn D. Worsell
  • Patent number: D430881
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: September 12, 2000
    Assignee: Logitech, Inc.
    Inventors: Marc A. Bidiville, Antoine Merminod, Jen-Ming Chiang, Ting Fu Chang, Shawn D. Worsell