Patents by Inventor Ting-Hao Lin

Ting-Hao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10440836
    Abstract: Provided is a double layer circuit board and a manufacturing method thereof. The double layer circuit board comprises a substrate, a first circuit layer formed on a first surface of the substrate, a second circuit layer formed on a second surface of the substrate, and at least one connecting pillar formed in and covered by the substrate. Each one of the at least one connecting pillar includes a first end connected to the first circuit layer and a second end connected to the second circuit layer. A terminal area of the second end is greater than a terminal area of the first end. Therefore, the second circuit layer is firmly connected to the first circuit layer through the at least one connecting pillar. A yield rate of the double layer circuit board may be increased.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: October 8, 2019
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nong Lin
  • Patent number: 10440837
    Abstract: A manufacturing method of a double layer circuit board comprises forming at least one connecting pillar on a first circuit, wherein the at least one connecting pillar comprises a first end, connected to the first circuit, and a second end, opposite to the first end; forming a substrate on the first circuit and the at least one connecting pillar; drilling the substrate to expose a portion of the second end of the at least one connecting pillar, wherein the other portion of the second end of the at least one connecting pillar is covered by the substrate; and forming a second circuit on the substrate and the portion of the second end of the at least one connecting pillar, wherein an area of the first end connected to the first circuit layer is greater than an area of the portion of the second end connected to the second circuit layer.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: October 8, 2019
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nong Lin
  • Patent number: 10405423
    Abstract: A multi-layer circuit board includes a first circuit board, conducting blocks, a second circuit board, and conducting recesses. The first circuit board has a first conductor layer mounted on the first circuit board. The conducting blocks are mounted on the first circuit board and electrically connected to the first conductor layer. The second circuit board has a second conductor layer mounted thereon and facing the first circuit board. The conducting recesses are formed in the second circuit board, electrically connected to the second conductor layer, and corresponding to the respective conducting blocks. The insulating layer is mounted between the first conductor layer and the second conductor layer. The second circuit board is on the first circuit board, the conducting blocks are respectively mounted in the conducting recesses to electrically connect the first conductor layer and the second conductor layer.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: September 3, 2019
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nong Lin
  • Patent number: 10388771
    Abstract: A mask layer is formed over a semiconductor device. The semiconductor device includes: a gate structure, a first layer disposed over the gate structure, and an interlayer dielectric (ILD) disposed on sidewalls of the first layer. The mask layer includes an opening that exposes a portion of the first layer and a portion of the ILD. A first etching process is performed to etch the opening partially into the first layer and partially into the ILD. A liner layer is formed in the opening after the first etching process has been performed. A second etching process is performed after the liner layer has been formed. The second etching process extends the opening downwardly through the first layer and through the gate structure. The opening is filled with a second layer after the second etching process has been performed.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: August 20, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Chang Lin, Wei-Hao Wu, Jia-Ni Yu, Huan-Chieh Su, Ting-Hung Hsu, Chih-Hao Wang
  • Patent number: 10383265
    Abstract: An EMI shielding device is provided. A first shielding layer is formed on a first surface of a first substrate, and a first through hole is formed through the first substrate. A second substrate is mounted in an opening of the first through hole, and a second shielding layer is formed on a surface of the second substrate. A conductive paste is mounted between the first substrate and the at least one second substrate to electrically connected the first shielding layer and the second shielding layer. The EMI shielding device is adopted to be mounted on a printed circuit board (PCB) by Surface Mount Technology. Therefore, the EMI shielding device may be firmly mounted on the PCB, and there is not any narrow gap that may leak electromagnetic radiation.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: August 13, 2019
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yung-Lin Chia
  • Patent number: 10374058
    Abstract: A method for manufacturing a semiconductor device is provided. The method for manufacturing a semiconductor device includes forming a gate electrode layer in a gate trench; filling a recess in the gate electrode layer with a dielectric feature; and etching back the gate electrode layer from top end surfaces of the gate electrode layer while leaving a portion of the gate electrode layer under the dielectric feature.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: August 6, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Chieh Su, Zhi-Chang Lin, Ting-Hung Hsu, Jia-Ni Yu, Wei-Hao Wu, Chih-Hao Wang
  • Patent number: 10371719
    Abstract: A printed circuit board (PCB) test fixture includes a substrate, a first insulation layer formed on the substrate, a conductor layer formed on the first insulation layer and electrically connected to the upper electrodes through at least one first connection member, a second insulation layer formed on the first insulation layer, and multiple conductive cones arranged on the second insulation layer in a matrix form. A part of the conductive cones is electrically connected to the conductor layer through at least one second connection member. The circuit layout of the conductor layer, the at least one first connection member and the at least one second connection member is employed to supply testing power to a part of the conductive cones and an adjustable arrangement of the conductive cones to enhance density of test probes upon electrical testing.
    Type: Grant
    Filed: April 17, 2016
    Date of Patent: August 6, 2019
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nong Lin
  • Patent number: 10366822
    Abstract: A method of manufacturing a winged coil structure is provided. The method includes preparing an upper flexible plate having a middle region and two side regions bordering the middle region; preparing a dielectric layer with a lateral size of the dielectric layer being the same as a lateral size of the middle region of the upper flexible plate; preparing a lower flexible plate having a middle region and two side regions bordering the middle region; preparing a bottom flexible plate attached to the lower surface of the lower flexible plate to form a stack body; and performing a process of thermal pressing to sequentially from bottom to top stack and combine the stack body, the dielectric layer, and the upper flexible plate as a multiple layered stack structure via a press mold.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: July 30, 2019
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nong Lin
  • Publication number: 20190229201
    Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor strip over a substrate. The semiconductor strip includes a first semiconductor stack and a second semiconductor stack over the first semiconductor stack. A dummy gate stack is formed to cross the semiconductor strip. The dummy gate stack is replaced with a first metal gate stack and a second metal gate stack. The first metal gate stack is in contact with the first semiconductor layer of the first semiconductor stack and the second metal gate stack is in contact with the first semiconductor layer of the second semiconductor stack.
    Type: Application
    Filed: April 3, 2019
    Publication date: July 25, 2019
    Inventors: Wei-Hao WU, Zhi-Chang LIN, Ting-Hung HSU, Kuan-Lun CHENG
  • Publication number: 20190229531
    Abstract: An electrostatic discharge (ESD) protection circuit has a first power node, a second power node, an ESD detect circuit, an ESD device and a voltage controlled switch. The ESD detect circuit is coupled between the first power node and the second power node for detecting an ESD current to output a control signal at a output terminal of the ESD detect circuit. The ESD device is coupled between the first power node and the second power node for leaking the ESD current. The voltage controlled switch is used to couple a body of the ESD device to the second power node according to at least a voltage level of the control signal.
    Type: Application
    Filed: January 24, 2018
    Publication date: July 25, 2019
    Inventors: Yu-Cheng Liao, Ting-Yao Lin, Ping-Chen Chang, Tien-Hao Tang
  • Publication number: 20190189335
    Abstract: A buildup board structure incorporating magnetic induction coils and flexible boards is disclosed. The buildup board structure includes at least one first buildup unit or at least one second buildup unit. The first buildup unit includes at least one first buildup body, the second buildup unit includes at least one second buildup body. Any two adjacent buildup bodies are separated by a covering layer provided with a central hole for electrical insulation. All central holes are aligned. Each buildup body includes a plurality of flexible boards, and each flexible board is embedded with a plurality of magnetic induction coils surrounding the corresponding central hole and connected through connection pads. The first and/or second buildup bodies are easily laminated in any order by any number as desired such that the effect of magnetic induction provided by the magnetic induction coils embedded in the buildup board structure are addable to greatly enhance the overall effect of magnetic induction.
    Type: Application
    Filed: February 25, 2019
    Publication date: June 20, 2019
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nong Lin
  • Publication number: 20190180919
    Abstract: A method of manufacturing a winged coil structure is provided. The method includes preparing an upper flexible plate having a middle region and two side regions bordering the middle region; preparing a dielectric layer with a lateral size of the dielectric layer being the same as a lateral size of the middle region of the upper flexible plate; preparing a lower flexible plate having a middle region and two side regions bordering the middle region; preparing a bottom flexible plate attached to the lower surface of the lower flexible plate to form a stack body; and performing a process of thermal pressing to sequentially from bottom to top stack and combine the stack body, the dielectric layer, and the upper flexible plate as a multiple layered stack structure via a press mold.
    Type: Application
    Filed: February 20, 2019
    Publication date: June 13, 2019
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nong Lin
  • Publication number: 20190154604
    Abstract: A resistive gas sensor is provided. The resistive gas sensor includes a sensing circuit and a determination circuit. The sensing circuit senses a gas to generate a detection signal. The determination circuit performs a frequency-division operation on the detection signal by a frequency-division parameter to generate a frequency-division signal, counts a half of a period of the frequency-division signal to generate a half-period count value, and determines concentration of the gas according to the half-period count value. The determination circuit determines the frequency-division parameter according to the half-period count value.
    Type: Application
    Filed: December 27, 2017
    Publication date: May 23, 2019
    Inventors: Ying-Che LO, Yu-Sheng LIN, Ting-Hao HSIAO
  • Patent number: 10256028
    Abstract: A buildup board structure incorporating magnetic induction coils and flexible boards is disclosed. The buildup board structure includes at least one first, second and third buildup bodies modular and stackable. Any two adjacent buildup bodies are separated by a covering layer provided with a central hole for electrical insulation. All central holes are aligned. Each buildup body includes a plurality of flexible boards, and each flexible board is embedded with a plurality of magnetic induction coils surrounding the corresponding central hole and connected through connection pads. The first, second and third buildup bodies are easily laminated in any order by any number as desired such that the effect of magnetic induction provided by the magnetic induction coils embedded in the buildup board structure are addable to greatly enhance the overall effect of magnetic induction.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: April 9, 2019
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nong Lin
  • Patent number: 10256030
    Abstract: A winged coil structure and a method of manufacturing the same are disclosed. The winged coil structure includes an upper flexible plate, at least one upper magnetic induction coil, at least one upper connection pad, a lower flexible plate, at least one lower magnetic induction coil, at least one lower connection pad, at least one gold finger, a dielectric layer and at least one connection plug. The connection plug connects the upper connection pad and the lower connection pad through thermal pressing such that the gold finger, the upper magnetic induction coil, the upper connection pad, the lower connection pad, the connection plug, the lower connection pad and the lower magnetic induction coil are electrically connected. The upper flexible plate is provided with notched lines to be easily bent without damage to the upper and lower magnetic induction coils. Thus, a bendable feature for magnetic induction coils is provided.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: April 9, 2019
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nong Lin
  • Publication number: 20190014695
    Abstract: An EMI shielding device is provided. A first shielding layer is formed on a first surface of a first substrate, and a first through hole is formed through the first substrate. A second substrate is mounted in an opening of the first through hole, and a second shielding layer is formed on a surface of the second substrate. A conductive paste is mounted between the first substrate and the at least one second substrate to electrically connected the first shielding layer and the second shielding layer. The EMI shielding device is adopted to be mounted on a printed circuit board (PCB) by Surface Mount Technology. Therefore, the EMI shielding device may be firmly mounted on the PCB, and there is not any narrow gap that may leak electromagnetic radiation.
    Type: Application
    Filed: August 28, 2018
    Publication date: January 10, 2019
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yung-Lin Chia
  • Patent number: 10170403
    Abstract: An ameliorated compound carrier board structure of Flip-Chip Chip-Scale Package has the insulating layer between the carrier board and the substrate in the prior art replaced by an anisotropic conductive film or materials with similar structure. The anisotropic conductive film has conductive particles therein to replace the conductive openings on the insulating layer in the prior art. When compressing the substrate onto the carrier board, the bottom surface of the second electrode pads are compressing the corresponding conductive particles on the second electrical contact pads, causing which to burst, therefore forming high-density compressed areas that conduct the second electrode pads and the second electrical contact pads; the conductive particles outside the high-density compressed area are not burst, forming an insulating film between the substrate and the carrier board; in other words, the anisotropic conductive film provides conduction in a Z direction.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: January 1, 2019
    Assignee: Kinsus Interconnect Technology Corp.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nung Lin
  • Publication number: 20180332706
    Abstract: A landless multilayer circuit board includes a first substrate, a first circuit, at least one connecting pillar, a second substrate, and a second circuit. The second substrate is on the surface of the first substrate, covering the first circuit, and exposing at least one top of the at least one connecting pillar exposed out of a surface of the second substrate, wherein an area of a portion of the at least one connecting pillar that is exposed out of the surface of the second substrate is greater than an area of a portion of the at least one connecting pillar that is connected to the first circuit. The second circuit is on the surface of the second substrate and the at least one connecting pillar, and connected to the portion of the at least one connecting pillar that is exposed out of the surface of the second substrate.
    Type: Application
    Filed: July 25, 2018
    Publication date: November 15, 2018
    Inventors: Ting-Hao LIN, Chiao-Cheng CHANG, Yi-Nong LIN
  • Publication number: 20180303012
    Abstract: An EMI shielding device is provided. A first shielding layer is formed on a first surface of a first substrate, and a first through hole is formed through the first substrate. A second substrate is mounted in an opening of the first through hole, and a second shielding layer is formed on a surface of the second substrate. A conductive paste is mounted between the first substrate and the at least one second substrate to electrically connected the first shielding layer and the second shielding layer. The EMI shielding device is adopted to be mounted on a printed circuit board (PCB) by Surface Mount Technology. Therefore, the EMI shielding device may be firmly mounted on the PCB, and there is not any narrow gap that may leak electromagnetic radiation.
    Type: Application
    Filed: January 2, 2018
    Publication date: October 18, 2018
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yung-Lin Chia
  • Patent number: 10104817
    Abstract: An EMI shielding device is provided. A first shielding layer is formed on a first surface of a first substrate, and a first through hole is formed through the first substrate. A second substrate is mounted in an opening of the first through hole, and a second shielding layer is formed on a surface of the second substrate. A conductive paste is mounted between the first substrate and the at least one second substrate to electrically connected the first shielding layer and the second shielding layer. The EMI shielding device is adopted to be mounted on a printed circuit board (PCB) by Surface Mount Technology. Therefore, the EMI shielding device may be firmly mounted on the PCB, and there is not any narrow gap that may leak electromagnetic radiation.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: October 16, 2018
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yung-Lin Chia