Patents by Inventor Ting-Hau Wu

Ting-Hau Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8106470
    Abstract: An integrated circuit structure includes a substrate having a top surface; a first conductive layer over and contacting the top surface of the substrate; a dielectric layer over and contacting the first conductive layer, wherein the dielectric layer includes an opening exposing a portion of the first conductive layer; and a proof-mass in the opening and including a second conductive layer at a bottom of the proof-mass. The second conductive layer is spaced apart from the portion of the first conductive layer by an air space. Springs anchor the proof-mass to portions of the dielectric layer encircling the opening. The springs are configured to allow the proof-mass to make three-dimensional movements.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: January 31, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Hau Wu, Chun-Wen Cheng, Chun-Ren Cheng, Shang-Ying Tsai, Jung-Huei Peng, Jiou-Kang Lee, Allen Timothy Chang
  • Publication number: 20120007220
    Abstract: A method of forming an integrated circuit structure including providing a wafer comprising a front surface and a back surface, wherein the wafer comprises a chip; forming an opening extending from the back surface into the chip; filling an organic material in the opening, wherein substantially no portion of the organic material is outside of the opening and on the back surface of the wafer; and baking the organic material to cause a contraction of the organic material.
    Type: Application
    Filed: September 22, 2011
    Publication date: January 12, 2012
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Jung-Huei Peng
  • Patent number: 8053377
    Abstract: System and method for forming a structure including a MEMS device structure. In order to prevent warpage of a substrate arising from curing process for a sacrificial material (such as a photoresist), and from subsequent high temperature process steps, an improved sacrificial material comprises (i) a polymer and (ii) a foaming agent or special function group. The structure can be formed by forming a trench in a substrate and filling the trench with a sacrificial material. The sacrificial material includes (i) a polymer and (ii) a foaming agent or special function group. After further process steps are completed, the sacrificial material is removed from the trench.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: November 8, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Ying Tsai, Chun-Ren Cheng, Jiou-Kang Lee, Jung-Huei Peng, Ting-Hau Wu
  • Patent number: 8053336
    Abstract: A method of forming an integrated circuit structure including providing a wafer comprising a front surface and a back surface, wherein the wafer comprises a chip; forming an opening extending from the back surface into the chip; filling an organic material in the opening, wherein substantially no portion of the organic material is outside of the opening and on the back surface of the wafer; and baking the organic material to cause a contraction of the organic material.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: November 8, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Jung-Huei Peng
  • Publication number: 20110263106
    Abstract: One embodiment is a method of forming a circuit structure. The method comprises forming a first amorphous layer over a substrate; forming a first glue layer over and adjoining the first amorphous layer; forming a second amorphous layer over and adjoining the first glue layer; and forming a plurality of posts separated from each other by removing a first portion of the first amorphous layer and a first portion of the second amorphous layer. At least some of the plurality of posts each comprises a second portion of the first amorphous layer, a first portion of the first glue layer, and a second portion of the second amorphous layer.
    Type: Application
    Filed: July 5, 2011
    Publication date: October 27, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiou-Kang Lee, Chun-Ren "Sean" Cheng, Shang-Ying Tsai, Ting-Hau Wu, Hsiang-Fu "Benior" Chen
  • Patent number: 7998775
    Abstract: When a native oxide grows on a polysilicon member of, e.g., a MEMS device, delamination between the polysilicon member and subsequently formed layers may occur because the native oxide is undercut during removal of sacrificial oxide layers. Nitriding the native oxide increases the etch selectivity relative the sacrificial oxide layers. Undercutting and delamination is hence reduced or eliminated altogether.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: August 16, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Ying Tsai, Chun-Ren Cheng, Jung-Huei Peng, Jiou-Kang Lee, Ting-Hau Wu
  • Patent number: 7999257
    Abstract: A circuit structure includes a substrate; a first amorphous silicon layer over the substrate; a first glue layer over and adjoining the first amorphous silicon layer; and a second amorphous silicon layer over and adjoining the first glue layer.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: August 16, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiou-Kang Lee, Chun-Ren “Sean” Cheng, Shang-Ying Tsai, Ting-Hau Wu, Hsiang-Fu “Benior” Chen
  • Publication number: 20110156245
    Abstract: An integrated circuit, a method of operating the integrated circuit, and a method of fabricating the integrated circuit are disclosed. According to one of the broader forms of the invention, a method and apparatus involve an integrated circuit that includes a heat transfer structure having a chamber that has a fluid disposed therein and that extends between a heat generating portion and a heat absorbing portion. Heat is absorbed into the fluid from the heat generating portion, and the fluid changes from a first phase to a second phase different from the first phase when the heat is absorbed. Heat is released from the fluid to the heat absorbing portion, and the fluid changes from the second phase to the first phase when the heat is released.
    Type: Application
    Filed: December 31, 2009
    Publication date: June 30, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Chun-Wen Cheng, Jiou-Kang Lee, Jung-Huei Peng, Shang-Ying Tsai, Te-Hsi Lee
  • Patent number: 7923379
    Abstract: A method of forming an integrated circuit structure includes forming an opening in a substrate, with the opening extending from a top surface of the substrate into the substrate. The opening is filled with a filling material until a top surface of the filling material is substantially level with the top surface of the substrate. A device is formed over the top surface of the substrate, wherein the device includes a storage opening adjoining the filling material. A backside of the substrate is grinded until the filling material is exposed. The filling material is removed from the channel until the storage opening of the device is exposed.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: April 12, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiou-Kang Lee, Ting-Hau Wu, Shang-Ying Tsai, Jung-Huei Peng, Chun-Ren Cheng
  • Publication number: 20110081740
    Abstract: System and method for forming a structure including a MEMS device structure. In order to prevent warpage of a substrate arising from curing process for a sacrificial material (such as a photoresist), and from subsequent high temperature process steps, an improved sacrificial material comprises (i) a polymer and (ii) a foaming agent or special function group. The structure can be formed by forming a trench in a substrate and filling the trench with a sacrificial material. The sacrificial material includes (i) a polymer and (ii) a foaming agent or special function group. After further process steps are completed, the sacrificial material is removed from the trench.
    Type: Application
    Filed: September 28, 2010
    Publication date: April 7, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: SHANG-YING TSAI, CHUN-REN CHENG, JIOU-KANG LEE, JUNG-HUEI PENG, TING-HAU WU
  • Publication number: 20110012247
    Abstract: A method for fabricating an integrated circuit device is disclosed. The method includes providing a first substrate; bonding a second substrate to the first substrate, the second substrate including a microelectromechanical system (MEMS) device; and bonding a third substrate to the first substrate.
    Type: Application
    Filed: August 6, 2009
    Publication date: January 20, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Ting-Hau Wu
  • Publication number: 20100308424
    Abstract: An integrated circuit structure includes a substrate having a top surface; a first conductive layer over and contacting the top surface of the substrate; a dielectric layer over and contacting the first conductive layer, wherein the dielectric layer includes an opening exposing a portion of the first conductive layer; and a proof-mass in the opening and including a second conductive layer at a bottom of the proof-mass. The second conductive layer is spaced apart from the portion of the first conductive layer by an air space. Springs anchor the proof-mass to portions of the dielectric layer encircling the opening. The springs are configured to allow the proof-mass to make three-dimensional movements.
    Type: Application
    Filed: March 31, 2010
    Publication date: December 9, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Hau Wu, Chun-Wen Cheng, Chun-Ren Cheng, Shang-Ying Tsai, Jung-Huei Peng, Jiou-Kang Lee, Allen Timothy Chang
  • Publication number: 20100301433
    Abstract: An integrated circuit structure includes a triple-axis accelerometer, which further includes a proof-mass formed of a semiconductor material; a first spring formed of the semiconductor material and connected to the proof-mass, wherein the first spring is configured to allow the proof-mass to move in a first direction in a plane; and a second spring formed of the semiconductor material and connected to the proof-mass. The second spring is configured to allow the proof-mass to move in a second direction in the plane and perpendicular to the first direction. The triple-axis accelerometer further includes a conductive capacitor plate including a portion directly over, and spaced apart from, the proof-mass, wherein the conductive capacitor plate and the proof-mass form a capacitor; an anchor electrode contacting a semiconductor region; and a transition region connecting the anchor electrode and the conductive capacitor plate, wherein the transition region is slanted.
    Type: Application
    Filed: March 31, 2010
    Publication date: December 2, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Shang-Ying Tsai, Jiou-Kang Lee, Jung-Huei Peng
  • Publication number: 20100258883
    Abstract: A metal-ceramic multilayer structure is provided. The underlying layers of the metal/ceramic multilayer structure have sloped sidewalls such that cracking of the metal-ceramic multilayer structure may be reduced or eliminated. In an embodiment, a layer immediately underlying the metal-ceramic multilayer has sidewalls sloped less than 75 degrees. Subsequent layers underlying the layer immediately underlying the metal/ceramic layer have sidewalls sloped greater than 75 degrees. In this manner, less stress is applied to the overlying metal/ceramic layer, particularly in the corners, thereby reducing the cracking of the metal-ceramic multilayer. The metal/ceramic multilayer structure includes one or more alternating layers of a metal seed layer and a ceramic layer.
    Type: Application
    Filed: January 22, 2010
    Publication date: October 14, 2010
    Applicant: Taiwan Semiconductor Manfacturing Company, Ltd.
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Shang-Ying Tsai, Jung-Huei Peng, Jiou-Kang Lee
  • Publication number: 20100225708
    Abstract: MEMS devices and methods of fabrication thereof are described. In one embodiment, the MEMS device includes a bottom alloy layer disposed over a substrate. An inner material layer is disposed on the bottom alloy layer, and a top alloy layer is disposed on the inner material layer, the top and bottom alloy layers including an alloy of at least two metals, wherein the inner material layer includes the alloy and nitrogen. The top alloy layer, the inner material layer, and the bottom alloy layer form a MEMS feature.
    Type: Application
    Filed: January 7, 2010
    Publication date: September 9, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Huei Peng, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Ting-Hau Wu
  • Publication number: 20100203664
    Abstract: When a native oxide grows on a polysilicon member of, e.g., a MEMS device, delamination between the polysilicon member and subsequently formed layers may occur because the native oxide is undercut during removal of sacrificial oxide layers. Nitriding the native oxide increases the etch selectivity relative the sacrificial oxide layers. Undercutting and delamination is hence reduced or eliminated altogether.
    Type: Application
    Filed: November 16, 2009
    Publication date: August 12, 2010
    Inventors: Shang-Ying Tsai, Chun-Ren Cheng, Jung-Huei Peng, Jiou-Kang Lee, Ting-Hau Wu
  • Publication number: 20100178732
    Abstract: Methods and structures using laser bonding for stacking semiconductor substrates are described. In one embodiment, a method of forming a semiconductor device includes forming a trench in a first substrate, and a bond pad on a second substrate comprising active circuitry. A top surface of the bond pad includes a first material. The first substrate is aligned over the second substrate to align the trench over the bond pad. An electromagnetic beam is directed into the trench to form a bond between the first material on the bond pad and a second material at a bottom surface of the first substrate.
    Type: Application
    Filed: November 13, 2009
    Publication date: July 15, 2010
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Jung-Huei Peng
  • Publication number: 20100175479
    Abstract: A gyroscope sensor includes a gyro disk. A first light source is configured to provide a first light beam adjacent to a first edge of the gyro disk. A first light receiver is configured to receive the first light beam for sensing a vibration at a first direction of the gyro disk.
    Type: Application
    Filed: January 12, 2009
    Publication date: July 15, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Jung-Huei Peng, Shang-Ying Tsai
  • Publication number: 20100120202
    Abstract: A method of forming an integrated circuit structure including providing a wafer comprising a front surface and a back surface, wherein the wafer comprises a chip; forming an opening extending from the back surface into the chip; filling an organic material in the opening, wherein substantially no portion of the organic material is outside of the opening and on the back surface of the wafer; and baking the organic material to cause a contraction of the organic material.
    Type: Application
    Filed: November 2, 2009
    Publication date: May 13, 2010
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Jung-Huei Peng
  • Publication number: 20100117168
    Abstract: An integrated circuit structure includes a capacitor, which further includes a first capacitor plate formed of polysilicon, and a second capacitor plate substantially encircling the first capacitor plate. The first capacitor plate has a portion configured to vibrate in response to an acoustic wave. The second capacitor plate is fixed and has slanted edges facing the first capacitor plate.
    Type: Application
    Filed: December 31, 2008
    Publication date: May 13, 2010
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Jung-Huei Peng