Abstract: The present invention relates to compositions comprising one or more extracts and/or compounds having retinol-like activity and properties and methods of using the compositions to treat the eye.

Abstract: The present invention relates to compositions comprising one or more compounds and/or extracts which induce, promote and/or improve production/release/delivery/excretion of hyaluronic acid and/or mucin from and/or in the cornea, and methods of using the compositions to treat the eye.

Abstract: A method for forming a semiconductor device includes forming a first insulator layer on a first substrate of a first semiconductor material, implanting hydrogen ions into the first substrate to form a hydrogen-implanted layer, forming a recessed region in the first substrate, forming a second semiconductor material in the recessed region, and forming a second insulator layer over the second semiconductor material and the first substrate. The method also includes providing a second substrate with a third insulator layer disposed thereon, bonding the first substrate with the second substrate, and removing a lower portion of the first substrate at the hydrogen-implanted layer. A portion of the first substrate is removed to expose a surface of the second semiconductor material in the recessed region, thereby providing a layer of the first semiconductor material adjacent to a layer of the second semiconductor material on the second insulator layer.

Abstract: An ultramicro circuit board based on an ultrathin adhesiveless flexible carbon-based material and a preparation method thereof. The method comprises the steps of: S1. depositing to form a PI film on a surface of a quantum carbon-based film through a chemical vapor deposition (CVD) reaction, and manufacturing a flexible circuit board base material with a quantum carbon-based film/PI double-layer composite structure; and S2. manufacturing a high-frequency ultramicro circuit antenna on the flexible circuit board base material through a laser scanning etching method. The preparation method has the advantages of being good in environmental friendliness, high in efficiency, low in manufacturing cost and the like, and the manufactured antenna ultramicro circuit board has the advantages of being high in thermal and electrical conductivity, ultra-flexible, low in dielectric, low in loss and high in shielding performance, which can be applied to 5G equipment.

Abstract: The present disclosure provides an error compensation correction system and method for an analog-to-digital converter with a time interleaving structure, the system includes an analog-to-digital converter with a time interleaving structure, a master clock module, a packet clock module, an error correction module, an adaptive processing module and an overall MUX circuit. Through the error compensation correction system and method for the analog-to-digital converter with a time interleaving structure according to the present disclosure, lower correction hardware implementation complexity and higher stability are ensured. The system and method according to the present disclosure are particularly suitable for interchannel mismatch error correction of dense channel time interleaving ADC, and the performance of the time interleaving ADC is improved.

Abstract: A package for storing perishable goods. Film forming the package has an inner layer that defines an interior surface of the package and is formed from a polyethylene and a tack agent that has migrated to the interior surface to provide tackiness. The tackiness permits cold resealing of the package after it has been opened, without substantially adhering to the perishable goods so that the perishable goods can be non-destructively removed from the package. An outer layer of the film defines an exterior surface of the package and is formed from another polyethylene. The polyethylene of the outer layer is configured to block migration of the tack agent through the outer layer such that the exterior surface is substantially non-tacky.

Abstract: The present disclosure provides a pipelined analog-to-digital converter having input signal pre-comparison and charge redistribution, including: one-stage or multi-stage of pipelined structure unit, a first flash analog-to-digital converter, and an adjusting output unit. Each stage of the pipelined structure unit is used to quantify the input signal. The first flash analog-to-digital converter quantizes a residual signal output by a final pipelined structure unit, and outputs a corresponding quantized value. The adjusting output unit combines each of the quantized values according to a connection order of the multi-stage pipelined structure unit and a flash analog-to-digital conversion unit to output a complete quantization result.

Abstract: A method determines support points for estimating a progression of roadside development of a road. The method determines a position of a first support point in the surroundings of a vehicle; determines a plurality of regions in a travel direction and/or counter to the travel direction of the vehicle on the basis of the position of the first support point; and determines support points of roadside development for each of the determined regions in the travel direction, counter to the travel direction and left and right of the vehicle.

Abstract: The present disclosure relates to pre-distortion processing methods and apparatus. One example apparatus includes a first pre-distortion part and a second pre-distortion part. The first pre-distortion part includes N digital pre-distortion (DPD) processors. The first pre-distortion part and the second pre-distortion part perform pre-distortion processing on a signal to support a power amplifier in performing linear amplification on the signal.

Abstract: Embodiments of the present disclosure relate to a method for closing a plurality of webpages in a browser. According to the method, one or more records are acquired in response to receiving an instruction to close a first webpage. Each record comprises at least two URLs having a parent-child relationship. A URL chain of the first webpage is acquired based on the acquired one or more records in response to receiving an instruction to close a plurality of webpages related to the URL chain. The URL chain consists of a plurality of URLs having a multi-level parent-child relationship. The plurality of webpages related to the URL chain are closed.

Abstract: Embodiments of the present disclosure provide a frame structure, a backlight assembly, and a display device. The frame structure includes: a frame including an annular bottom and a sidewall surrounding the annular bottom, the annular bottom has a protrusion disposed in parallel with the sidewall; and a matching plate having a first hollow portion, the first hollow portion is configured to be engaged with the protrusion.

Abstract: The present disclosure provides a pipelined analog-to-digital converter having input signal pre-comparison and charge redistribution, including: one-stage or multi-stage of pipelined structure unit, a first flash analog-to-digital converter, and an adjusting output unit. Each stage of the pipelined structure unit is used to quantify the input signal. The first flash analog-to-digital converter quantizes a residual signal output by a final pipelined structure unit, and outputs a corresponding quantized value. The adjusting output unit combines each of the quantized values according to a connection order of the multi-stage pipelined structure unit and a flash analog-to-digital conversion unit to output a complete quantization result.

Abstract: The present invention relates to compositions comprising one or more extracts and/or compounds having retinol-like activity and properties and methods of using the compositions to treat the eye.

Abstract: The present disclosure relates to the field of semiconductor integrated circuits, and to a method for calibrating a capacitor voltage coefficient of a high-precision successive approximation analog-to-digital converter (SAR ADC). The method includes: calibrating a voltage coefficient; obtaining a sampled charged charge according to a capacitance model with the voltage coefficient; according to an INL value obtained by testing, first verifying whether a maximum value of INL occurs in the place shown in Equation 3, then obtaining two very close second-order capacitor voltage coefficients according to Equation 4, and taking an average value thereof as a second-order capacitor voltage coefficient; and then calibrating the second-order capacitor voltage coefficient in a digital domain.

Abstract: A semiconductor IC structure includes a substrate including at least a memory cell region and a peripheral region defined thereon, a plurality of memory cells formed in the memory cell region, at least an active device formed in the peripheral region, a plurality of contact plugs formed in the memory cell region, and at least a bit line formed in the memory cell region. The contact plugs are physically and electrically connected to the bit line. More important, bottom surfaces of the contact plugs are lower a surface of the substrate.

Abstract: A material recommendation system and a material recommendation method are provided, which use an analysis module to analyze at least one image to generate reference information, and then a recommendation module receives the reference information to provide target information corresponding to the reference information. By analyzing the image, target information including suitable materials can be quickly provided, thereby greatly accelerating the timeline of product development.

Abstract: The invention discloses an infinite-arbitrary-length bamboo chip integrated material. The bamboo chip integrated material is formed by a plurality of lengthened bamboo chips which are glued and overlaid; each lengthened bamboo chip is formed by a plurality of bamboo chip units which sequentially and continuously mesh and are butted; sharp teeth and grooves are formed in the two ends in the length direction of the bamboo chip units, wherein the sharp tooth of each bamboo chip unit and the groove of the corresponding bamboo sheet unit are matched to form a meshing butt-joint part, and the meshing butt-joint parts of the adjacent lengthened bamboo chips are arranged in a staggered mode; and each bamboo chip unit has a thickness of 4-12 mm and a width of 15-50 mm. The invention further provides a manufacturing method of the bamboo chip integrated material, comprising the steps of preparation of the bamboo chip units, meshing and butting, hot pressing and gluing and the like.

Abstract: A material property rating method and a material property rating system are provided, which analyze the reliability of a target information of a target object provided by a target source through an analysis module, and then calculates the credibility of the target source based on the reliability of the target information through a credit rating module. Therefore, when the material property rating system is applied to a material information platform, the material property rating system can effectively avoid false information, and can save time and effort for the verification process, and can be trusted by consumers browsing the material information platform.

Abstract: A semiconductor IC structure includes a substrate including at least a memory cell region and a peripheral region defined thereon, a plurality of memory cells formed in the memory cell region, at least an active device formed in the peripheral region, a plurality of contact plugs formed in the memory cell region, and at least a bit line formed in the memory cell region. The contact plugs are physically and electrically connected to the bit line. More important, bottom surfaces of the contact plugs are lower a surface of the substrate.

Abstract: A display substrate includes: a display region having an irregular edge portion; and a light-shielding area located around the display region; wherein: a pixel array is disposed in the display region; the pixel array includes outermost edge pixels of the irregular edge portion, and central pixel; each of the edge pixels includes at least one edge sub-pixel; each of the edge sub-pixels includes a light-shielding sub-region and a light-emitting sub-region arranged along a row direction; and the light-shielding sub-region is located at a side of each of the edge sub-pixels proximal to the light-shielding region.