Patents by Inventor Ting Yu
Ting Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250149622Abstract: The present invention provides a lean-electrolyte lithium-sulfur cell, comprising: a cathode which contains a carbon substrate assembled with a sulfur active material to form a sulfur loading of at least 6 mg/cm2; and an anode which is produced by depositing lithium metal onto a carbon substrate; the carbon substrate of the cathode is a carbon structural material having a carbon nanotube-to-graphene weight ratio of 45:55 to 55:45; the carbon substrate of the anode is a carbon structural material having a carbon nanotube-to-graphene weight ratio of 20:80 to 30:70.Type: ApplicationFiled: January 19, 2024Publication date: May 8, 2025Inventors: Sheng-Heng CHUNG, Guan-Ting YU
-
Publication number: 20250148041Abstract: Disclosed in the present invention are a dynamic maximal clique enumeration device and method based on an FPGA with an HBM, the method including: the HBM stores a dynamic edge flow, a complete graph adjacency matrix, and candidate cliques; a matrix computing unit updates the complete graph adjacency matrix based on the dynamic edge flow, transmits the updated complete graph adjacency matrix to the HBM for storage, and determines header nodes, of which the corresponding candidate clique needs to be updated; a sequence computing unit constructs, according to the updated complete graph adjacency matrix and each header node to be updated, the sorted data set for reconstructing candidate cliques by data block sequencing; and an update computing unit executes, in parallel, an update task of the candidate clique corresponding to each header node to be updated based on the sorted data set, transmits the updated candidate cliques to the HBM for storage, and transmits the updated candidate cliques to the PC host to extType: ApplicationFiled: November 28, 2023Publication date: May 8, 2025Inventors: TING YU, DONG LI, YU ZHANG, HAO QI, TING JIANG, ZENGHUI XU, LINLIN HOU, JIN ZHAO, JI ZHANG
-
Publication number: 20250144577Abstract: A thermally conductive and breathable membrane that oligo-layer graphene with a solid weight ratio of 1˜30 wt % and a polyrotaxane with a solid weight content of 0.05 to 10 wt % relative to the thermal conductive and breathable membrane to a polyurethane resin, in addition to the moisture permeability and waterproofness of polyurethane resin, the oligo-layer graphene also increase the thermal conductivity, and the dispersibility of oligo-layer graphene is improved by adding polyrotaxane and the extensibility of polyurethane resin is improved, making the formed thermal conductive and breathable membrane enable to maintain extensibility without increasing the membrane thickness.Type: ApplicationFiled: November 3, 2023Publication date: May 8, 2025Inventors: Ting Yu WU, Shan LI
-
Publication number: 20250141220Abstract: An ESD protection circuit is coupled to a first pad and includes an ESD detection circuit, a P-type transistor, an N-type transistor, and a discharge circuit. The ESD detection circuit determines whether an ESD event occurs on the first pad to generate a detection signal at a first node. The P-type transistor comprises a source coupled to the first pad, a drain coupled to a second node, and a gate coupled to the first node. The N-type transistor comprises a drain coupled to the second node, a source coupled to a ground, and a gate coupled to a second pad. The discharge circuit is coupled between the first pad and the ground and controlled by a driving signal at the second node. When the ESD protection circuit is in an operation mode, the first pad receives a first voltage, and a second pad receives a second voltage.Type: ApplicationFiled: November 1, 2023Publication date: May 1, 2025Applicant: Vanguard International Semiconductor CorporationInventors: Chih-Hsuan LIN, Shao-Chang HUANG, Yeh-Ning JOU, Chieh-Yao CHUANG, Hwa-Chyi CHIOU, Wen-Hsin LIN, Kai-Chieh HSU, Ting-Yu CHANG, Hsien-Feng LIAO
-
Publication number: 20250139464Abstract: The present application provides a method for predicting energy consumption and an electronic device. The electronic device obtains energy efficiency data of a target device within a preset time period, and determines a plurality of influencing factors from the energy efficiency data according to a preset energy efficiency indicator and a feature extraction algorithm. The electronic device further determines a regression prediction model according to the plurality of influencing factors and the preset energy efficiency indicator, inputs the plurality of influencing factors into the regression prediction model and generates a first prediction value at each moment within the preset time period, and generates a trend graph of energy consumption corresponding to the preset time period according to a first predicted value at each moment. The present application is able to improve an efficiency of predicting energy consumption.Type: ApplicationFiled: April 19, 2024Publication date: May 1, 2025Inventors: YU-CHIH WANG, Ting-Yu LIN
-
Patent number: 12285856Abstract: End effector tool changers for a robotic system are disclosed. The end effector tool changer is physically compact, mechanically robust, has high radial strength, prevents undesirable rotations, uses minimal sensory input, is suitable for a wide variety of tools, and operates quickly. The end effector tool changer includes a robotic arm attachment portion, including a first magnetic part and a first engagement part, and a tool attachment portion, including a second magnetic part and a second engagement part, where the first engagement part is configured to engage with the second engagement part, the first engagement part and the second engagement part are selected from the group consisting of a pin and a socket, and the first magnetic part spatially and magnetically corresponds to the second magnetic part.Type: GrantFiled: September 25, 2024Date of Patent: April 29, 2025Assignee: XYZ Robotics Global Inc.Inventors: Kuan-Ting Yu, Aaron Hwang
-
Publication number: 20250132057Abstract: An infectious disease infection prediction method, an apparatus, and a storage medium based on macro-micrograph fusion are provided. The method includes: acquiring macrographs of a plurality of first regions and micrographs of second regions within a set period; inputting the macroscopic graphs and the microscopic graphs into two graph convolutional neural networks to obtain two hidden layer vectors respectively, and fusing the two hidden layer vectors to obtain fusion hidden layer information of the first regions; performing a time sequence calculation of the fusion hidden layer information to obtain time sequence hidden layer information of the first regions; inputting the time series hidden layer information into two prediction networks to obtain two prediction results, respectively, and performing fusion calculation of the two prediction results to obtain a final prediction result of infectious diseases in the first regions.Type: ApplicationFiled: March 11, 2024Publication date: April 24, 2025Inventors: Zenghui XU, Ji ZHANG, Yu ZHANG, Ting YU, Jin ZHAO, Linlin HOU, Zhan ZHANG
-
Patent number: 12283951Abstract: A voltage provision circuit includes a first NMOS transistor gated with a first control signal and sourced with a ground voltage, a second NMOS transistor gated with a second control signal complementary to the first control signal and sourced with the ground voltage, a first PMOS transistor sourced with a first supply voltage, a second PMOS transistor sourced with the first supply voltage, and a voltage modulation circuit that is coupled between the first to second PMOS transistors and the first to second NMOS transistors, and is configured to provide a first intermediate signal based on the first and second control signals. The first intermediate signal has a first logic state corresponding to the first supply voltage and a second logic state corresponding to a second supply voltage that is a fraction of the first supply voltage.Type: GrantFiled: February 16, 2023Date of Patent: April 22, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ting-Yu Yu, Meng-Sheng Chang, Shao-Yu Chou
-
Publication number: 20250125003Abstract: A graph calculation method of RNA similarity analysis, an apparatus, a device, and a medium are provided. The method includes: converting sequence data of a looked-up RNA into a looked-up RNA structure graph; obtain a first similarity between the looked-up RNA structure graph and a target RNA structure graph; obtaining a second similarity based on the number of base constituent structures in the looked-up RNA structure graph and the number of base constituent structures in the target RNA structure graph; reconstructing the looked-up RNA structure graph based on the base constituent structures in the looked-up RNA structure graph to generate a looked-up RNA higher-order graph; and analyzing similarity between the looked-up RNA higher-order graph and a target RNA higher-order graph to obtain a third similarity; and obtaining a final similarity between the looked-up RNA and the target RNA based on the first similarity, the second similarity, and the third similarity.Type: ApplicationFiled: March 19, 2024Publication date: April 17, 2025Inventors: Zenghui XU, Jin TANG, Yu ZHANG, Gaoxiang CHEN, Ting YU, Jin ZHAO, Ji ZHANG
-
Publication number: 20250123665Abstract: A multi-port power delivery system and a power allocation method thereof are disclosed. The system comprises a first connection port, a second connection port, and a controller which is configured to monitor the average power of each connection port, and decrease the power budget of the first connection port and increase the power budget of the second connection port when the average power of the first connection port falls below a first threshold, and the average power of the second connection port exceeds a second threshold.Type: ApplicationFiled: April 9, 2024Publication date: April 17, 2025Applicant: Delta Electronics, Inc.Inventors: WEI CHIEH LIN, XIN YU TSAI, SHIH TING YU, YI MOU LI
-
Patent number: 12274744Abstract: The provided herein are methods and compositions for eliciting an immune response to an antigen, such as cancer and microbial antigens.Type: GrantFiled: January 31, 2019Date of Patent: April 15, 2025Assignee: President and Fellows of Harvard CollegeInventors: David J. Mooney, Aileen Weiwei Li, Omar Abdel-Rahman Ali, Ting-Yu Shih
-
Publication number: 20250117567Abstract: A method of manufacturing a transmission gate includes overlying a substrate with first through fourth adjacent metal segments in a same metal layer. Each of the first and second metal segments, second and third metal segments, and third and fourth metal segments are offset from each other by an offset distance in a first direction, the first metal segment overlies a first active area in the substrate including first and second PMOS transistors, and the fourth metal segment overlies a second active area in the substrate including first and second NMOS transistors. The method includes configuring the first and second PMOS transistors and the first and second NMOS transistors as a transmission gate by forming first through third conductive paths, the first conductive path including a fifth metal segment overlying at least three of the first through fourth metal segments along a second direction perpendicular to the first direction.Type: ApplicationFiled: December 17, 2024Publication date: April 10, 2025Inventors: Shao-Lun CHIEN, Pin-Dai SUE, Li-Chun TIEN, Ting-Wei CHIANG, Ting Yu CHEN
-
Publication number: 20250116891Abstract: A liquid crystal display includes a display panel and a driving unit. The display panel includes a plurality of resetting sections, which correspond to display a plurality of screens, respectively. There is a first voltage difference between a corresponding one of the column voltages and a corresponding one of the row voltages of one of the resetting sections, and there is a second voltage difference between a corresponding one of the column voltages and a corresponding one of the row voltages of another of the resetting sections. The second voltage difference reaching a second maximum voltage difference value is after the first voltage difference reaching a first maximum voltage difference value by a delay time, so as to clear the screens.Type: ApplicationFiled: September 30, 2024Publication date: April 10, 2025Inventors: Ting Yu TAI, Sheng Yao WANG, Wu Chang YANG, Chi Chang LIAO
-
Publication number: 20250119271Abstract: Encrypted signal segment locating device and method. The device is configured to execute the following operations. An encrypted signal template is transformed into a signal template formed by template data points. The signal template is adjusted based on a frequency difference and a clock rate difference between a side-channel input signal and the signal template to generate an adjusted template. The adjusted template and the side-channel input signal are compared by using a sliding window to generate compared segments in the side-channel input signal and similarities corresponding to the compared segments. When the similarities are higher than a threshold, one of the compared segments is selected as an encrypted signal segment, and an encryption position is located by using the sliding window, wherein the encrypted signal segment is the compared segment having a highest similarity.Type: ApplicationFiled: November 12, 2023Publication date: April 10, 2025Inventor: Ting-Yu LIN
-
Patent number: 12272568Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.Type: GrantFiled: August 1, 2023Date of Patent: April 8, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih, Ting-Yu Yeh, Chen-Hsuan Tsai
-
Patent number: 12269118Abstract: A laser soldering system using dynamic light spot and a method thereof are provided. A laser module is controlled to radiate toward multi-lens to form a light spot on a soldering target for soldering, and a lens distance between the multi-lens is adjusted to adjust a light spot size. The disclosure may provide multiple heating densities respectively adequate to different soldering status via adjusting the light spot size when using same laser power, so as to improve the soldering quality.Type: GrantFiled: September 9, 2021Date of Patent: April 8, 2025Assignee: Delta Electronics, Inc.Inventors: Chun-Lien Huang, Wen-Yu Chuang, Keng-Ning Chang, Ting-Yu Lu, Chun-Fei Kung
-
Publication number: 20250111049Abstract: Example systems, methods, and apparatus are disclosed herein for zero-shot black-box detection of neural Trojans.Type: ApplicationFiled: October 1, 2024Publication date: April 3, 2025Inventors: Issa M. Khalil, Ting Yu, Dorde Popovic, Mohammad Amin Sadeghi, Sanjay Chawla
-
Publication number: 20250102568Abstract: A test system and method of testing are provided. In some embodiments, a system for testing an integrated circuit package includes a device tester. The device tester includes a socket, a cylinder head unit engageable with the socket, and a pressure regulator. The socket includes a first pressure cylinder configured to engage a first region of the integrated circuit package and a second pressure cylinder configured to engage a second region of the integrated circuit package. The pressure regulator is configured to provide at gas at a first pressure to the first pressure cylinder and to provide the gas at a second pressure different than the first pressure to the second pressure cylinder.Type: ApplicationFiled: September 25, 2023Publication date: March 27, 2025Inventors: Ting-Yu CHIU, Yi-Neng Chang, Shin-Han You, Chien Fang Huang
-
Publication number: 20250098244Abstract: An electrostatic discharge (ESD) protection device is provided. A deep-well region is formed on a substrate. A first well region, a second well region, a third well region, and a fourth well region are formed on the deep-well region. A fifth well region is formed in the fourth well region. A first doped region is formed in the first well region. A second doped region is formed in the second well region. A third doped region is formed in the fourth well region. A gate structure covers the third well region. Each of the substrate, the second well region, the fourth well region, the second doped region, and the third doped region has a first conductivity type. Each of the deep-well region, the first well region, the third well region, the fifth well region, and the first doped region has a second conductivity type.Type: ApplicationFiled: September 15, 2023Publication date: March 20, 2025Applicant: Vanguard International Semiconductor CorporationInventors: Ting-Yu CHANG, Yeh-Ning JOU, Jian-Hsing LEE, Chieh-Yao CHUANG, Hsien-Feng LIAO
-
Patent number: 12255142Abstract: A cell on an integrated circuit is provided. The cell includes: a fin structure; an intermediate fin structure connection metal track disposed in an intermediate fin structure connection metal layer above the fin structure, the intermediate fin structure connection metal track being connected to the fin structure; and a first intermediate gate connection metal track disposed in an intermediate gate connection metal layer above the intermediate fin structure connection metal layer, the first intermediate gate connection metal track being connected to the intermediate fin structure connection metal track. A first power supply terminal is connected to the first intermediate gate connection metal track.Type: GrantFiled: August 10, 2023Date of Patent: March 18, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Chun Tien, Chih-Liang Chen, Hui-Zhong Zhuang, Shun Li Chen, Ting Yu Chen