Patents by Inventor Ting Yu
Ting Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12234617Abstract: The provided is a construction method for a flood storage area ecological wetland oriented to multi-target collaborative promotion. The construction method includes: I. carrying out ecological wetland construction on a flood storage area by taking promotion of agricultural production as a goal; II. according to a water purification target of the flood storage area of the ecological wetland and a current pollution condition in the flood storage area, constructing the ecological wetland based on improvement of the water purification target when the flood storage area does not reach the water purification target at present; and III, in order to improve the biodiversity, carrying out the following ecological wetland construction on the flood storage area. In the method, agricultural production, water purification and biodiversity improvement of the flood storage area are comprehensively considered. The method is the most effective way for multi-target collaborative promotion of the flood storage area.Type: GrantFiled: August 22, 2024Date of Patent: February 25, 2025Assignees: ANHUI SURVEY & DESIGN INSTITUTE OF WATER RESOURCES & HYDROPOWER CO., LTD., CHANGJIANG WATER RESOURCES PROTECTION INSTITUTEInventors: Zhiyuan Cheng, Bo Jiang, Tao Li, Fengchan Zhang, Ting Yu, Xiaoyuan Wang, Zhenxin Li, Santao Xie, Siji Wang, Junfeng Li, Xinyi Zhang
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Patent number: 12237321Abstract: A filler cell region (in a semiconductor device) includes: gate segments, a majority of first ends of which substantially align with a first reference line that parallel and proximal to a top boundary of the filler cell region, and a majority of second ends of which substantially align with a second reference line that is parallel and proximal to a bottom boundary of the filler cell region. First and second gate segments extend continuously across the filler cell region; and third & fourth and fifth & sixth gate segments are correspondingly coaxial and separated by corresponding gate-gaps. Relative to the first direction: a first end of the first gate segment extends to the top boundary of the filler cell region; and a second end of the second gate segment extends to the bottom boundary of the filler cell region.Type: GrantFiled: June 17, 2022Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shun Li Chen, Fei Fan Duan, Ting Yu Chen
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Publication number: 20250063692Abstract: An immersion cooling system includes a work tank, a buffer tank, and a communication control assembly. The work tank has a work-tank gas-phase region and a work-tank liquid-phase region. The buffer tank has a buffer-tank gas-phase region and a buffer-tank liquid-phase region. The communication control assembly includes a first pipeline, a first pump, a second pipeline, and a second valve. In response to that the first pump is actuated, through the first pipeline, a fluid of the work-tank liquid-phase region is transported to the buffer-tank liquid-phase region, or a fluid of the buffer-tank liquid-phase region is transported to the work-tank liquid-phase region. In response to that the second valve is actuated, through the second pipeline, the work-tank gas-phase region is selectively in communication with the buffer-tank gas-phase region.Type: ApplicationFiled: August 9, 2024Publication date: February 20, 2025Inventors: Tsung-Han LI, Chih-An LIAO, Ting-Yu PAI, Chia-Hsin HSIEH
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Patent number: 12227941Abstract: A folding dividing screen structure has at least two screen panels, a plurality of sealing covers, at least one connecting member with a respective vertical through channel on opposite sides of the connecting member, and at least two vertical strips. Each screen panel is secured in an outer frame, the connecting member pivotally connected with the two screen panels via the two vertical strips.Type: GrantFiled: July 11, 2021Date of Patent: February 18, 2025Assignee: KADEYA ENTERPRISE CO. , LTDInventor: Ting-Yu Lai
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Patent number: 12224285Abstract: An integrated circuit includes a set of active regions, a first contact, a set of gates, a first and second conductive line and a first and second via. The set of active regions extends in a first direction, and is on a first level. The first contact extends in a second direction, is on a second level, and overlaps at least a first active region. The set of gates extends in the second direction, overlaps the set of active regions, and is on a third level. The first conductive line and the second conductive line extend in the first direction, overlap the first contact, and are on a fourth level. The first via electrically couples the first contact and the first conductive line together. The second via electrically couples the first contact and the second conductive line together.Type: GrantFiled: May 31, 2022Date of Patent: February 11, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chin-Wei Hsu, Shun Li Chen, Ting Yu Chen, Hui-Zhong Zhuang, Chih-Liang Chen
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Publication number: 20250040039Abstract: A package assembly includes a substrate, an electronic component and a cover. The electronic component and the cover are disposed on the substrate, wherein the electronic component is located within a chamber between the cover and the substrate. A cooling liquid may be filled in a heat dissipation space of the cover, so as to dissipate the heat generated by the electronic component. Furthermore, the cooling liquid may be filled in the chamber where the electronic component is located, so as to directly dissipate the heat generated by the electronic component.Type: ApplicationFiled: October 10, 2024Publication date: January 30, 2025Applicant: Wiwynn CorporationInventors: Yi Cheng, Wei-Ching Chang, Kang-Bin Mah, Li-Wei Chen, Zi-Ping Wu, Ting-Yu Pai
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Publication number: 20250022932Abstract: Some embodiments relate to an integrated device, including a semiconductor film accommodating a two-dimensional carrier gas (2DCG) over a substrate; a first source/drain electrode over the semiconductor film; a second source/drain electrode over the semiconductor film; a semiconductor capping structure between the first source/drain electrode and the second source/drain electrode; a first gate overlying the semiconductor capping structure and between the first source/drain electrode and the second source/drain electrode in a first direction; a first helping gate overlying the semiconductor capping structure and bordering the first gate, wherein the first helping gate and the second source/drain electrode are arranged in a line extending in a second direction transverse to the first direction.Type: ApplicationFiled: July 13, 2023Publication date: January 16, 2025Inventors: Chiao-Chun Hsu, Chu Fu Chen, Ting-Yu Chen
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Patent number: 12198714Abstract: The disclosure relates to a voice signal analysis method and device and a chip design method and device. The voice signal analysis method includes: in a first updating gradient, training a resolution recovery model by using first voice training data meeting a same grouping condition in multiple mission sets; in a second updating gradient, training the resolution recovery model by interleavingly using second voice training data meeting different grouping conditions in the mission sets; iteratively executing the first and second updating gradients to set an initial model parameter of the resolution recovery model; and recovering a high-resolution snore signal from a low-resolution snore signal by using the resolution recovery model. The low-resolution snore signal has a lower resolution than the high-resolution snore signal.Type: GrantFiled: June 27, 2022Date of Patent: January 14, 2025Assignee: Industrial Technology Research InstituteInventors: Liang-Hsuan Tai, Hong-Yu Chen, Yen-Ting Wu, Ting-Yu Wang
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Standard and engineering change order (ECO) cell regions and semiconductor device including the same
Patent number: 12199037Abstract: A method of manufacturing an ECO base cell includes forming first and second active areas on opposite sides of, and having corresponding long axes arranged parallel to, a first axis of symmetry; forming non-overlapping first, second and third conductive structures having long axes in a second direction perpendicular to the first direction and parallel to a second axis of symmetry, each of the first, second and third conductive structures to correspondingly overlap the first and second active areas, the first conductive structure being between the second and third conductive structures; removing material from central regions of the second and third conductive structures; and forming a fourth conductive structure being over the central regions of the second and third conductive structures and occupying an area which substantially overlaps a first segment of the first conductive structure and a first segment of one of the second and third conductive structures.Type: GrantFiled: July 31, 2023Date of Patent: January 14, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Li-Chun Tien, Shun Li Chen, Ting-Wei Chiang, Ting Yu Chen, XinYong Wang -
Publication number: 20250010492Abstract: End effector tool changers for a robotic system are disclosed. The end effector tool changer is physically compact, mechanically robust, has high radial strength, prevents undesirable rotations, uses minimal sensory input, is suitable for a wide variety of tools, and operates quickly. The end effector tool changer includes a robotic arm attachment portion, including a first magnetic part and a first engagement part, and a tool attachment portion, including a second magnetic part and a second engagement part, where the first engagement part is configured to engage with the second engagement part, the first engagement part and the second engagement part are selected from the group consisting of a pin and a socket, and the first magnetic part spatially and magnetically corresponds to the second magnetic part.Type: ApplicationFiled: September 25, 2024Publication date: January 9, 2025Applicant: XYZ Robotics Global Inc.Inventors: Kuan-Ting Yu, Aaron Hwang
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Publication number: 20240425473Abstract: The invention relates to antiviral compounds, compositions comprising antiviral compounds, and methods of use. In particular, the antiviral compounds are cytidine triphosphate synthetase 1 (CTPS1) inhibitors that are effective in treating and/or preventing viral infection and in particular, SARS-CoV-2 infection and/or COVID-19 disease.Type: ApplicationFiled: February 1, 2022Publication date: December 26, 2024Applicant: UNIVERSITY OF SOUTHERN CALIFORNIAInventors: Pinghui FENG, Chao ZHANG, Jun ZHAO, Biancha ESPINOSA, Chao QIN, Ali SAVAS, Youliang RAO, Ting-Yu WANG
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Patent number: 12169679Abstract: A transmission gate structure includes first and second PMOS transistors positioned in a first active area, first and second NMOS transistors positioned in a second active area parallel to the first active area, and four metal segments parallel to the active areas. A first metal segment overlies the first active area, a fourth metal segment overlies the second active area, and second and third metal segments are a total of two metal segments positioned between the first and fourth metal segments. A first conductive path connects gates of the first PMOS and NMOS transistors, a second conductive path connects gates of the second PMOS and NMOS transistors, a third conductive path connects a source/drain (S/D) terminal of each of the first and second PMOS transistors and first and second NMOS transistors and includes a first conductive segment extending across at least three of the four metal segments.Type: GrantFiled: July 31, 2023Date of Patent: December 17, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shao-Lun Chien, Pin-Dai Sue, Li-Chun Tien, Ting-Wei Chiang, Ting Yu Chen
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Publication number: 20240402770Abstract: A fixing assembly is suitable for being arranged on a circuit board and configured to fix an expansion card. The fixing assembly includes a body and a buckle structure. The buckle structure includes a pressing part, a buckle part, an elastic member, and a base. The pressing part is away from the circuit board. An end of the buckle part is connected to the pressing part and has an inclined surface and a blocking surface connected to each other. The blocking surface has a gap with the top surface. The elastic member is connected to another end of the buckle part. When a first end of the expansion card is connected to the connector, a second end of the expansion card slides along the inclined surface to the top surface and is fixed in the gap by being abutted by the blocking surface.Type: ApplicationFiled: August 23, 2023Publication date: December 5, 2024Applicant: ASUSTeK COMPUTER INC.Inventors: Kunsu Zhang, Wen-Ting Yu, Zhaowei Sheng, Feng Huang
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Publication number: 20240400144Abstract: The invention relates to a bicycle (200), in particular an electric bicycle (200). The invention also relates to a light module (100) for use in a bicycle (200), in particular an electric bicycle (200) according to the invention. The invention further relates to a bicycle control unit (8) programmed to independently control a plurality of light sources (104) of at least one light module (100) for use in a bicycle (200), in particular an electric bicycle (200) according to the invention. The invention moreover relates to an assembly of at least one light module (100) according to the invention and at least one bicycle control unit (8) according to the invention.Type: ApplicationFiled: October 7, 2022Publication date: December 5, 2024Inventors: Marjolein Deun, Alexandre Phaneuf, Olivier Hébert, Wei-Ting Yu, Tzu-Jung Huang, Yu-Lin Chang, Job Hendrik Stehmann
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Publication number: 20240394459Abstract: A method of generating a layout diagram of a semiconductor device includes populating a conductive layer M(h) with segment patterns representing corresponding conductive segments in the semiconductor device. The segment patterns including first and second power grid (PG) patterns and first routing patterns, where h is an integer and h?1. Arranging long axes of the first and second PG patterns and the first routing patterns to extend in a first direction. Arranging the first and second PG patterns to be separated, relative to a second direction, by a PG gap having a midpoint. The second direction being substantially perpendicular to the first direction. Distributing the first routing patterns between the first and second PG patterns and substantially uniformly in the second direction with respect to the midpoint of the PG gap.Type: ApplicationFiled: July 31, 2024Publication date: November 28, 2024Inventors: Li-Chun TIEN, Shun Li CHEN, Ting-Wei CHIANG, Ting Yu CHEN, XinYong WANG
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Publication number: 20240387504Abstract: An integrated circuit (IC) device includes first to fourth circuits configured to perform corresponding functions. The first to fourth circuits correspondingly include first to fourth active regions extending along a first direction, and further include a plurality of gate regions extending along a second direction transverse to the first direction. Adjacent gate regions among the plurality of gate regions are spaced from each other along the first direction by one gate region pitch. The first active region and the second active region correspondingly have a first source/drain region and a second source/drain region spaced from each other, along the first direction, by one gate region pitch. The first source/drain region is a drain region. The plurality of gate regions includes a dummy gate region between the first source/drain region and the second source/drain region. The third active region and the fourth active region share a common source region.Type: ApplicationFiled: July 26, 2024Publication date: November 21, 2024Inventors: Chih-Liang CHEN, Shun Li CHEN, Li-Chun TIEN, Ting Yu CHEN, Hui-Zhong ZHUANG
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Publication number: 20240387373Abstract: An integrated circuit includes a cell that is between a substrate and a supply conductive line and that includes a source region, a contact conductive line, a power conductive line, and a power via. The contact conductive line extends from the source region. The power conductive line is coupled to the contact conductive line. The power via interconnects the supply conductive line and the power conductive line.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Inventors: Sheng-Hsiung Chen, Chung-Hsing Wang, Fong-yuan Chang, Lee-Chung Lu, Li-Chun Tien, Po-Hsiang Huang, Shao-huan Wang, Ting Yu Chen, Yen-Pin Chen, Chun-Chen Chen, Tzu-Hen Lin, Tai-Yu Cheng
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Publication number: 20240387197Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih, Ting-Yu Yeh, Chen-Hsuan Tsai
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Patent number: 12149405Abstract: Some aspects provide for establishing a radio connection for the wireless communication, determining a configuration for whether to segment one or more packets for the wireless communication using the established radio connection, and communicating the one or more packets based on the determined configuration. Some aspects provide for assembling a first frame comprising one or more packets, transmitting the first frame, determining whether a portion of one or more packets was truncated during the assembling of the first frame, and transmitting a second frame comprising at least the truncated portion of the one or more packets of the first frame. Some aspects provide for receiving a first frame comprising one or more packets, determining that a portion of one or more packets is truncated, and determining whether to ignore as padding at least the truncated portion of the one or more packets of the first frame.Type: GrantFiled: November 19, 2021Date of Patent: November 19, 2024Assignee: QUALCOMM IncorporatedInventors: Yu-Ting Yu, Gavin Bernard Horn, Anurag Vardhan, Rotem Cooper, Aziz Gholmieh, Keiichi Kubota
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Patent number: 12150243Abstract: A package assembly includes a substrate, an electronic component and a cover. The electronic component and the cover are disposed on the substrate, wherein the electronic component is located within a chamber between the cover and the substrate. A cooling liquid may be filled in a heat dissipation space of the cover, so as to dissipate the heat generated by the electronic component. Furthermore, the cooling liquid may be filled in the chamber where the electronic component is located, so as to directly dissipate the heat generated by the electronic component.Type: GrantFiled: November 21, 2022Date of Patent: November 19, 2024Assignee: Wiwynn CorporationInventors: Yi Cheng, Wei-Ching Chang, Kang-Bin Mah, Li-Wei Chen, Zi-Ping Wu, Ting-Yu Pai