Abstract: A fin-FET or other multi-gate transistor is disclosed. The transistor comprises a semiconductor substrate having a first lattice constant, and a semiconductor fin extending from the semiconductor substrate. The fin has a second lattice constant, different from the first lattice constant, and a top surface and two opposed side surfaces. The transistor also includes a gate dielectric covering at least a portion of said top surface and said two opposed side surfaces, and a gate electrode covering at least a portion of said gate dielectric. The resulting channel has a strain induced therein by the lattice mismatch between the fin and the substrate. This strain can be tuned by selection of the respective materials.

Abstract: An apparatus for video graphics array (VGA) testing includes a connector, a switch, and an output. The connector has at least one signal output pin. The signal output pin of the VGA connector is connected to the output via the switch. The output can be coupled with an oscilloscope or other similar signal analyzing device. It is simple and efficient to use the apparatus for coupling a VGA connector of a computer with an oscilloscope in the VGA testing process.

Abstract: A PCI Express interface testing apparatus for testing characteristics of signal transmissions of a PCI Express interface includes a printed circuit board, a plurality of sending signal connectors, and a plurality of receiving signals connectors. Both the sending signal connectors and the receiving signal connectors are electrically connected to the printed circuit board. A related method for testing the characteristics of signal transmissions of a PCI Express interface is also provided.

Abstract: An automatic method to maintain and correct overlay in the fabrication of integrated circuits is described. An overlay control table is automatically generated for lots run through a process tool. An overlay correction is calculated from the overlay control table and sent to the process tool for real-time or manual overlay correction.

Abstract: An apparatus (30) for testing a serial advanced technology architecture (SATA) port of a motherboard. The apparatus includes a flash memory chip (31), a first signal converting chip (33) electrically connected to the flash memory chip, and a second signal converting chip (35) electrically connected to the first signal converting chip. The first and second signal converting chips cooperate to convert a flash memory signal to a SATA interface signal.

Abstract: A method for fabricating a microelectronic product and a system for fabricating the microelectronic product each employ an in-line automatic photolithographic processing and overlay registration measurement for a pair of pilot lots of a new product order, prior to in-line automatic processing of an additional new product order lot within a photolithographic process tool. The method and the system provide for efficient production of new product order lots, absent need for an independent pilot lot qualification method or system.

Abstract: A method and system for automatically initializing a SATA controller, which is used to set up a specified SATA port as enable or disable, the method includes: inputting a value of the specified SATA port to an interface; automatically identifying ICH south bridge and the SATA controller by searching a table of vendor ID and device ID of the ICH south bridge and the SATA controller, an identified result being achieved; according to the identified result automatically rewriting values that the SATA controller exists in memory to enable the SATA controller; automatically setting values of offset address in a BIOS to achieve initialization of the SATA controller. The system stores a program of automatically initializing the SATA controller therein.

Abstract: An automatic method to maintain and correct overlay in the fabrication of integrated circuits is described. An overlay control table is automatically generated for lots run through a process tool. An overlay correction is calculated from the overlay control table and sent to the process tool for real-time or manual overlay correction.

Abstract: A method for fabricating a microelectronic product and a system for fabricating the microelectronic product each employ an in-line automatic photolithographic processing and overlay registration measurement for a pair of pilot lots of a new product order, prior to in-line automatic processing of an additional new product order lot within a photolithographic process tool. The method and the system provide for efficient production of new product order lots, absent need for an independent pilot lot qualification method or system.

Abstract: We provide an optical transceiver module and the method of arranging its optical path. The invention is used to send optical signals to an optic fiber and receives optical signals emitted from the optic fiber. The optical transceiver module contains an optical transmitting device and a circuit board. One side of the optical transmitting device is equipped with an optic fiber connecting terminal to connect with an optic fiber. A filter is used to deflect optical signals emitted from the optic fiber. After the optical signals enter the input terminal, they are converted by an opto-electrical conversion unit into electrical signals that are then sent to the circuit board. Likewise, an output terminal receives electrical signals generated by the circuit board. The opto-electrical conversion unit converts the electrical signals into optical signals, which directly penetrate through the filter to send the signals to the optic fiber.