Patents by Inventor Tofizur RAHMAN

Tofizur RAHMAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10326075
    Abstract: MTJ material stacks, pSTTM devices employing such stacks, and computing platforms employing such pSTTM devices. In some embodiments, perpendicular MTJ material stacks include a multi-layered filter stack disposed between a fixed magnetic layer and an antiferromagnetic layer or synthetic antiferromagnetic (SAF) stack. In some embodiments, non-magnetic layers of the filter stack include at least one of Ta, Mo, Nb, W, or Hf. These transition metals may be in pure form or alloyed with other constituents.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: June 18, 2019
    Assignee: Intel Corporation
    Inventors: Kaan Oguz, Kevin P. O'Brien, Christopher J. Wiegand, MD Tofizur Rahman, Brian S. Doyle, Mark L. Doczy, Oleg Golonzka, Tahir Ghani, Justin S. Brockman
  • Publication number: 20190140166
    Abstract: Material layer stack structures to provide a magnetic tunnel junction (MTJ) having improved perpendicular magnetic anisotropy (PMA) characteristics. In an embodiment, a free magnetic layer of the material layer stack is disposed between a tunnel barrier layer and a cap layer of magnesium oxide (Mg). The free magnetic layer includes a Cobalt-Iron-Boron (CoFeB) body substantially comprised of a combination of Cobalt atoms, Iron atoms and Boron atoms. A first Boron mass fraction of the CoFeB body is equal to or more than 25% (e.g., equal to or more than 27%) in a first region which adjoins an interface of the free magnetic layer with the tunnel barrier layer. In another embodiment, the first Boron mass fraction is more than a second Boron mass fraction in a second region of the CoFeB body which adjoins an interface of the free magnetic layer with the cap layer.
    Type: Application
    Filed: July 1, 2016
    Publication date: May 9, 2019
    Inventors: MD Tofizur RAHMAN, Christopher J. WIEGAND, Brian MAERTZ, Daniel G. OUELLETTE, Kevin P. O'BRIEN, Kaan OGUZ, Brian S. DOYLE, Mark L. DOCZY, Daniel B. BERGSTROM, Justin S. BROCKMAN, Oleg GOLONZKA, Tahir GHANI
  • Patent number: 10256395
    Abstract: An embodiment includes an apparatus comprising: a magnetic tunnel junction (MTJ), between first and second electrodes, comprising a dielectric layer between fixed and free layers; a dielectric film directly contacting sidewalls of the first electrode; and a metallic layer coupled to the sidewalls via the dielectric film; wherein (a) a vertical axis intersects the first and second electrodes and the MTJ but not the metallic layer, (b) a first horizontal axis intersects the metallic layer, the dielectric film, and the first electrode; and (c) a second horizontal axis, between the first horizontal axis and the MTJ, intersects the dielectric film and the first electrode but not the capping layer. Other embodiments are described herein.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: April 9, 2019
    Assignee: Intel Corporation
    Inventors: Daniel R. Lamborn, Oleg Golonzka, Christopher J. Wiegand, Philip E. Heil, M D Tofizur Rahman, Rebecca J. Castellano, Tarun Bansal
  • Publication number: 20190049514
    Abstract: Techniques are disclosed for carrying out ferromagnetic resonance (FMR) testing on whole wafers populated with one or more buried magnetic layers. The techniques can be used to verify or troubleshoot processes for forming the buried magnetic layers, without requiring the wafer to be broken. The techniques can also be used to distinguish one magnetic layer from others in the same stack, based on a unique frequency response of that layer. One example methodology includes moving a wafer proximate to a waveguide (within 500 microns, but without shorting), energizing a DC magnetic field near the target measurement point, applying an RF input signal through the waveguide, collecting resonance spectra of the frequency response of the waveguide, and decomposing the resonance spectra into magnetic properties of the target layer. One or both of the DC magnetic field and RF input signal can be swept to generate a robust set of resonance spectra.
    Type: Application
    Filed: April 1, 2016
    Publication date: February 14, 2019
    Applicant: INTEL CORPORATION
    Inventors: KEVIN P. O'BRIEN, KAAN OGUZ, CHRISTOPHER J. WIEGAND, MARK L. DOCZY, BRIAN S. DOYLE, MD TOFIZUR RAHMAN, OLEG GOLONZKA, TAHIR GHANI
  • Publication number: 20190036010
    Abstract: An apparatus including an array of memory cells arranged in a grid defined by word lines and bit lines in a generally orthogonal orientation relative to one another, a memory cell including a resistive memory component and an access transistor, wherein the access transistor includes a diffusion region disposed at an acute angle relative to an associated word line. A method including etching a substrate to form a plurality of fins each including a body having a length dimension including a plurality of first junction regions and a plurality of second junction regions that are generally parallel to one another and offset by angled channel regions displacing in the length dimension an end of a first junction region from the beginning of a second junction region; removing the spacer material; and introducing a gate electrode on the channel region of each of the plurality of fins.
    Type: Application
    Filed: April 1, 2016
    Publication date: January 31, 2019
    Inventors: Brian MAERTZ, Christopher J. WIEGAND, Daniel G. OEULLETTE, MD Tofizur RAHMAN, Oleg GOLONZKA, Justin S. BROCKMAN, Tahir GHANI, Brian S. DOYLE, Kevin P. O'BRIEN, Mark L. DOCZY, Kaan OGUZ
  • Publication number: 20190027536
    Abstract: Disclosed herein are electrical contacts for magnetoresistive random access memory (MRAM) devices and related memory structures, devices, and methods. For example, and electrical contact for an MRAM device may include: a tantalum region; a barrier region formed of a first material; and a passivation region formed of a second material and disposed between the tantalum region and the barrier region, wherein the second material includes tantalum nitride and is different from the first material.
    Type: Application
    Filed: November 23, 2015
    Publication date: January 24, 2019
    Applicant: Intel Corporation
    Inventors: Christopher J. Wiegand, Oleg Golonzka, Kaan Oguz, Kevin P. O'Brien, Tofizur Rahman, Brian S. Doyle, Tahir Ghani, Mark L. Doczy
  • Publication number: 20190027537
    Abstract: Approaches for an interconnect cladding process for integrating magnetic random access memory (MRAM) devices, and the resulting structures, are described. In an example, a memory structure includes an interconnect disposed in a trench of dielectric layer above a substrates, the interconnect including a diffusion barrier layer disposed at a bottom of and along sidewalls of the trench to an uppermost surface of the dielectric layer, a conductive fill layer disposed on the diffusion barrier layer and recessed below the uppermost surface of the dielectric layer and an uppermost surface of the diffusion barrier layer, and a conductive capping layer disposed on the conductive fill layer and between sidewall portions of the diffusion barrier layer. A memory element is disposed on the conductive capping layer of the interconnect.
    Type: Application
    Filed: March 28, 2016
    Publication date: January 24, 2019
    Inventors: Christopher J. WIEGAND, Oleg GOLONZKA, MD Tofizur RAHMAN, Brian S. DOYLE, Mark L. DOCZY, Kevin P. O'BRIEN, Kaan OGUZ, Tahir GHANI, Satyarth SURI
  • Publication number: 20190027679
    Abstract: Approaches for strain engineering of perpendicular magnetic tunnel junctions (pMTJs), and the resulting structures, are described. In an example, a memory structure includes a perpendicular magnetic tunnel junction (pMTJ) element disposed above a substrate. A lateral strain-inducing material layer is disposed on the pMTJ element. An inter-layer dielectric (ILD) layer is disposed laterally adjacent to both the pMTJ element and the lateral strain-inducing material layer. The ILD layer has an uppermost surface co-planar or substantially co-planar with an uppermost surface of the lateral strain-inducing material layer.
    Type: Application
    Filed: March 30, 2016
    Publication date: January 24, 2019
    Applicant: Intel Corporation
    Inventors: Daniel G. OUELLETTE, Christopher J. WIEGAND, MD Tofizur RAHMAN, Brian MAERTZ, Oleg GOLONZKA, Justin S. BROCKMAN, Kevin P. O'BRIEN, Brian S. DOYLE, Kaan OGUZ, Tahir GHANI, Mark L. DOCZY
  • Publication number: 20180322994
    Abstract: Embodiments of the disclosure are directed to a magnetic tunneling junction (MTJ) that includes a diffusion barrier. The diffusion barrier can be disposed between two ferromagnetic layers of the MTJ. More specifically, the diffusion barrier can be disposed between a first ferromagnetic layer, which is adjacent to a natural antiferromagnetic layer, and a second ferromagnetic layer; the first and second ferromagnetic layers and the diffusion barrier being part of a synthetic antiferromagnet. The diffusion barrier can be made of a refractory metal, such as tantalum. The diffusion barrier acts as a barrier for manganese diffusion from the natural antiferromagnetic layer into the synthetic antiferromagnet and other higher layers of the MTJ.
    Type: Application
    Filed: December 7, 2015
    Publication date: November 8, 2018
    Applicant: Intel Corporation
    Inventors: Tofizur RAHMAN, Christopher J. WIEGAND, Daniel B. BERGSTROM
  • Publication number: 20180287050
    Abstract: MTJ material stacks with a laterally strained free magnetic layer, STTM devices employing such stacks, and computing platforms employing such STTM devices. In some embodiments, perpendicular pMTJ material stacks included free magnetic layers that are compressively strained laterally by a surrounding material, which increases coercive field strength for a more stable device. In some embodiments, a pMTJ material stack is encased in a compressive-stressed material. In some further embodiments, a pMTJ material stack is encased first in a dielectric shell, permitting a conductive material to be deposited over the shell as the compressive-stressed, strain-inducing material layer.
    Type: Application
    Filed: September 25, 2015
    Publication date: October 4, 2018
    Applicant: Intel Corporation
    Inventors: Prashanth P. Madras, MD Tofizur Rahman, Christopher J. Wiegand, Brian Maertz, Oleg Golonzka, Kevin P. O'Brien, Mark L. Doczy, Brian S. Doyle, Tahir Ghani, Kaan Oguz
  • Patent number: 10079266
    Abstract: Embodiments of the present disclosure describe techniques and configurations associated with modulation of magnetic properties through implantation. In one embodiment, a method includes providing a substrate having an integrated circuit (IC) structure disposed on the substrate, the IC structure including a magnetizable material, implanting at least a portion of the magnetizable material with a dopant and magnetizing the magnetizable material, wherein said magnetizing is inhibited in the implanted portion of the magnetizable material. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: September 18, 2018
    Assignee: Intel Corporation
    Inventors: Christopher J. Wiegand, Md Tofizur Rahman, Oleg Golonzka, Anant H. Jahagirdar, Mengcheng Lu
  • Publication number: 20180248114
    Abstract: MTJ material stacks, pSTTM devices employing such stacks, and computing platforms employing such STTM devices. In some embodiments, perpendicular MTJ material stacks with free magnetic layers are magnetically coupled through a metal material layer for improved stability and low damping. In some advantageous embodiments, layers of a free magnetic material stack are magnetically coupled through a coupling layer of a metal comprising at least molybdenum (Mo). The Mo may be in pure form or alloyed with other constituents.
    Type: Application
    Filed: September 25, 2015
    Publication date: August 30, 2018
    Applicant: Intel Corporation
    Inventors: Kaan Oguz, Kevin P. O'Brien, Christopher J. Wiegand, MD Tofizur Rahman, Brian S. Doyle, Mark L. Doczy, Oleg Golonzka, Tahir Ghani, Justin S. Brockman
  • Publication number: 20180248115
    Abstract: MTJ material stacks, pSTTM devices employing such stacks, and computing platforms employing such pSTTM devices. In some embodiments, perpendicular MTJ material stacks include one or more electrode interface material layers disposed between a an electrode metal, such as TiN, and a seed layer of an antiferromagnetic layer or synthetic antiferromagnetic (SAF) stack. The electrode interface material layers may include either or both of a Ta material layer or CoFeB material layer. In some Ta embodiments, a Ru material layer may be deposited on a TiN electrode surface, followed by the Ta material layer. In some CoFeB embodiments, a CoFeB material layer may be deposited directly on a TiN electrode surface, or a Ta material layer may be deposited on the TiN electrode surface, followed by the CoFeB material layer.
    Type: Application
    Filed: September 25, 2015
    Publication date: August 30, 2018
    Applicant: Intel Corporation
    Inventors: Kaan Oguz, Kevin P. O'Brien, Christopher J. Wiegand, MD Tofizur Rahman, Brian S. Doyle, Mark L. Doczy, Oleg Golonzka, Tahir Ghani, Justin S. Brockman
  • Publication number: 20180240970
    Abstract: MTJ material stacks, pSTTM devices employing such stacks, and computing platforms employing such pSTTM devices. In some embodiments, perpendicular MTJ material stacks include a multi-layered filter stack disposed between a fixed magnetic layer and an antiferromagnetic layer or synthetic antiferromagnetic (SAF) stack. In some embodiments, non-magnetic layers of the filter stack include at least one of Ta, Mo, Nb, W, or Hf. These transition metals may be in pure form or alloyed with other constituents.
    Type: Application
    Filed: September 25, 2015
    Publication date: August 23, 2018
    Applicant: Intel Corporation
    Inventors: Kaan Oguz, Kevin P. O'Brien, Christopher J. Wiegand, MD Tofizur Rahman, Brian S. Doyle, Mark L. Doczy, Oleg Golonzka, Tahir Ghani, Justin S. Brockman
  • Publication number: 20180182952
    Abstract: An embodiment includes an apparatus comprising: a magnetic tunnel junction (MTJ), between first and second electrodes, comprising a dielectric layer between fixed and free layers; a dielectric film directly contacting sidewalls of the first electrode; and a metallic layer coupled to the side-walls via the dielectric film; wherein (a) a vertical axis intersects the first and second electrodes and the MTJ but not the metallic layer, (b) a first horizontal axis intersects the metallic layer, the dielectric film, and the first electrode; and (c) a second horizontal axis, between the first horizontal axis and the MTJ, intersects the dielectric film and the first electrode but not the capping layer. Other embodiments are described herein.
    Type: Application
    Filed: June 19, 2015
    Publication date: June 28, 2018
    Inventors: Daniel R. Lamborn, Oleg Golonzka, Christopher J. Wiegand, Philip E. Heil, MD Tofizur Rahman, Rebecca J. Castellano, Tarun Bansal
  • Patent number: 9823316
    Abstract: A magnetic biosensor can include a magnetic stack comprising a free layer, a fixed layer, and a nonmagnetic layer between the free layer and the fixed layer. At least one of the free layer or the fixed layer may have a magnetic moment oriented out of a major plane of the free layer or the fixed layer, respectively, in an absence of an external magnetic field. The magnetic biosensor also may include a sample container disposed over the magnetic stack, a plurality of capture antibodies attached to a bottom surface of the sample container above the magnetic stack, and a magnetic field generator configured to generate a magnetic field substantially perpendicular to the major plane of the free layer or fixed layer.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: November 21, 2017
    Assignee: REGENTS OF THE UNIVERSITY OF MINNESOTA
    Inventors: Jian-Ping Wang, Md Tofizur Rahman, Yi Wang
  • Publication number: 20170005136
    Abstract: Embodiments of the present disclosure describe techniques and configurations associated with modulation of magnetic properties through implantation. In one embodiment, a method includes providing a substrate having an integrated circuit (IC) structure disposed on the substrate, the IC structure including a magnetizable material, implanting at least a portion of the magnetizable material with a dopant and magnetizing the magnetizable material, wherein said magnetizing is inhibited in the implanted portion of the magnetizable material. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 28, 2014
    Publication date: January 5, 2017
    Inventors: Christopher J. WIEGAND, Md Tofizur RAHMAN, Oleg GOLONZKA, Anant H. JAHAGIRDAR, Mengcheng LU
  • Publication number: 20140292318
    Abstract: A magnetic biosensor can include a magnetic stack comprising a free layer, a fixed layer, and a nonmagnetic layer between the free layer and the fixed layer. At least one of the free layer or the fixed layer may have a magnetic moment oriented out of a major plane of the free layer or the fixed layer, respectively, in an absence of an external magnetic field. The magnetic biosensor also may include a sample container disposed over the magnetic stack, a plurality of capture antibodies attached to a bottom surface of the sample container above the magnetic stack, and a magnetic field generator configured to generate a magnetic field substantially perpendicular to the major plane of the free layer or fixed layer.
    Type: Application
    Filed: October 19, 2012
    Publication date: October 2, 2014
    Inventors: Jian-Ping Wang, Md Tofizur Rahman, Yi Wang
  • Patent number: 8604572
    Abstract: A magnetic tunnel junction device comprises a fixed magnetic layer having a first side and a second side, the fixed magnetic layer having a magnetic anisotropy that is out of the film plane of the fixed magnetic layer; a stack of a plurality of bilayers adjacent to the first side of the fixed magnetic layer, each bilayer comprising a first layer comprising at least one of cobalt, iron, a CoFeB alloy, or a CoB alloy and a second layer in contact with the first layer, the second layer comprising palladium or platinum, wherein the plurality of bilayers has a magnetic anisotropy that is out of the film plane of each of the bilayers, wherein the fixed magnetic layer is exchange coupled to the stack of the plurality of bilayers, and a tunnel barrier layer in contact with the second side of the fixed magnetic layer.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: December 10, 2013
    Assignee: Regents of the University of Minnesota
    Inventors: Jian-Ping Wang, Md. Tofizur Rahman
  • Publication number: 20110303997
    Abstract: A magnetic tunnel junction device comprises a fixed magnetic layer having a first side and a second side, the fixed magnetic layer having a magnetic anisotropy that is out of the film plane of the fixed magnetic layer; a stack of a plurality of bilayers adjacent to the first side of the fixed magnetic layer, each bilayer comprising a first layer comprising at least one of cobalt, iron, a CoFeB alloy, or a CoB alloy and a second layer in contact with the first layer, the second layer comprising palladium or platinum, wherein the plurality of bilayers has a magnetic anisotropy that is out of the film plane of each of the bilayers, wherein the fixed magnetic layer is exchange coupled to the stack of the plurality of bilayers, and a tunnel barrier layer in contact with the second side of the fixed magnetic layer.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 15, 2011
    Applicant: Regents of the University of Minnesota
    Inventors: Jian-Ping Wang, Md. Tofizur Rahman