Patents by Inventor Tohru Okabe

Tohru Okabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11659749
    Abstract: In a display region, each first power-source line and each second power-source line intersecting with the first power-source line are electrically connected together via a contact hole in a second inorganic insulating film. In addition, each source line and each second power-source line intersect with each other via the second inorganic insulating film and a first organic insulating film.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: May 23, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Shinsuke Saida, Hiroki Taniyama, Ryosuke Gunji, Shinji Ichikawa, Kohji Ariga, Akira Inoue, Yoshihiro Kohara, Koji Tanimura, Yoshihiro Nakada, Hiroharu Jinmura
  • Publication number: 20230117774
    Abstract: A display device, includes: a substrate; a thin film transistor layer including a plurality of thin film transistors; a light-emitting element layer including a plurality of light-emitting elements; a display region displaying an image; and an electronic componen being disposed on a back face side of the display region with respect to the substrate, wherein the display region includes a first display region and a second display region, each of the plurality of light-emitting elements includes a first light-emitting element and a second light-emitting element, each of the first light-emitting element and the second light-emitting element, the first electrode of the first light-emitting element includes a first reflective conductive layer, and a first upper transparent conductive layer, the first electrode of the second light-emitting element includes a second transparent conductive layer, and the second transparent conductive layer is crystallized and is thicker than the first upper transparent conductive laye
    Type: Application
    Filed: March 2, 2020
    Publication date: April 20, 2023
    Inventors: TOHRU OKABE, RYOSUKE GUNJI, SHINSUKE SAIDA, SHINJI ICHIKAWA
  • Publication number: 20230112543
    Abstract: A display region includes a second display region that transmits light used in a camera on the inner side of a first display region. A first electrode in the first display region has a structure in which a first lower transparent conductive layer, a first reflective conductive layer, and a first upper transparent conductive layer are layered in order. A first electrode in the second display region has a structure in which a second lower transparent conductive layer, a second reflective conductive layer, and a second upper transparent conductive layer are layered in order. The second reflective conductive layer is thinner than the first reflective conductive layer on the inner side of an opening of an edge cover.
    Type: Application
    Filed: March 2, 2020
    Publication date: April 13, 2023
    Inventors: TOHRU OKABE, RYOSUKE GUNJI, SHINSUKE SAIDA, SHINJI ICHIKAWA
  • Patent number: 11626449
    Abstract: In a display device, an inorganic insulating layer, a metal layer, a flattering film, a first electrode, an edge cover, a function layer, and a second electrode are formed, in that order, on a base substrate. The edge cover covers an edge of the first electrode and includes a first opening exposing the first electrode. The function layer is formed covering the first opening and an edge of the edge cover. The flattening film includes a first planar portion and a second planar portion having a film thickness smaller than that of the first planar portion, is configured to electrically connect the first electrode and the metal layer via a contact hole formed in the first planar portion, and overlaps the first opening of the edge cover at at least a portion of the second planar portion.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: April 11, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Ryosuke Gunji, Shinsuke Saida, Shinji Ichikawa, Kohji Ariga, Hiroki Taniyama, Yoshihiro Nakada, Koji Tanimura, Yoshihiro Kohara, Hiroharu Jinmura, Akira Inoue
  • Patent number: 11620922
    Abstract: In a cross section of a bending section of a frame region, a first opening opening upward is formed in at least one layer of inorganic film included in a TFT layer. A first organic film is provided to plug the first opening. A frame wiring line is provided on the first organic film. A second organic film is provided to cover the frame wiring line. A second opening opening upward is formed in the first organic film on an inner side with respect to the first opening.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: April 4, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shinji Ichikawa, Tohru Okabe, Shinsuke Saida, Ryosuke Gunji, Hiroki Taniyama, Yoshihiro Nakada, Hiroharu Jinmura, Akira Inoue
  • Publication number: 20230077957
    Abstract: A plurality of inner protrusions are provided in a non-display area so as to surround a through hole. Each of the plurality of inner protrusions includes: an underlying resin layer; and an underlying inorganic insulation layer provided on the underlying resin layer. Each underlying resin layer is separated by a plurality of inner slits formed on a surface of a resin substrate layer so as to surround the through hole. The underlying inorganic insulation layer is provided so as to project like an eave from the underlying resin layer to either one or both of a through hole side and a display area side.
    Type: Application
    Filed: February 13, 2020
    Publication date: March 16, 2023
    Inventors: TOHRU OKABE, SHINSUKE SAIDA, SHINJI ICHIKAWA, RYOSUKE GUNJI
  • Publication number: 20230062563
    Abstract: A display device includes: a substrate; a thin film transistor layer including a plurality of thin film transistors; a light-emitting element layer including a plurality of light-emitting elements; a display region; and an electronic component disposed on a back face side of the display region, wherein the light-emitting element layer includes a first electrode, an edge cover, a light-emitting function layer, and a second electrode, the plurality of light-emitting elements include a first light-emitting element and a second light-emitting element located in the second display region, an area of the first electrode of the second light-emitting element is smaller than an area of the first electrode of the first light-emitting element, a first contact hole is located at a position overlapping with the edge cover, and a second contact hole is located at a position corresponding to the opening of the edge cover.
    Type: Application
    Filed: January 30, 2020
    Publication date: March 2, 2023
    Inventors: TOHRU OKABE, SHINSUKE SAIDA, SHINJI ICHIKAWA, RYOSUKE GUNJI
  • Patent number: 11574982
    Abstract: A slit has ends each close to one of a display area and a terminal. The ends are each formed of a stepwise side face, including etch stop films.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: February 7, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Ryosuke Gunji, Hiroki Taniyama, Shinji Ichikawa, Takeshi Yaneda, Hiroharu Jinmura, Yoshihiro Nakada, Akira Inoue
  • Patent number: 11574983
    Abstract: In a display device, a second wiring line extends in a display region and includes an imaginary straight line that extends from the second wiring line in an extension direction of the second wiring line and intersects with an opening of an edge cover. The second wiring line extends along the peripheral edge of the opening without intersecting with the opening of the edge cover.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: February 7, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Ryosuke Gunji, Tohru Okabe, Shinsuke Saida, Shinji Ichikawa, Kohji Ariga, Hiroki Taniyama, Yoshihiro Nakada, Koji Tanimura, Yoshihiro Kohara, Hiroharu Jinmura, Akira Inoue
  • Patent number: 11557251
    Abstract: The present application discloses a current-driven display device capable of providing satisfactory display without flickering even when pause drive is performed. In a pixel circuit 15, a first initialization transistor T4 initializes a gate voltage Vg, and thereafter a voltage on a data signal line Di is written to a holding capacitor Cst via a write control transistor T2 and a drive transistor T1. Thereafter, emission control transistors T5 and T6 are turned on, so that a drive current I1 from the drive transistor T1 causes an organic EL element OL to emit light. During this emission period, even if the gate voltage Vg is decreased due to a leakage current through the first initialization transistor T4 in an OFF state, the decrease is compensated for by increasing a threshold control voltage being provided to a threshold control terminal TG of the drive transistor T1.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: January 17, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Takeshi Yaneda
  • Patent number: 11545541
    Abstract: A wiring line is provided on a TFT layer, in which the wiring line is formed in the same layer and formed of the same material as those of a reflection electrode. The reflection electrode includes a plurality of metallic conductive layers made up of a low resistance metallic material, an oxide-based lower transparent conductive layer provided on a lower surface side of a lowermost metallic conductive layer constituting a lowermost layer, an oxide-based upper transparent conductive layer having light reflectivity and provided on an upper surface side of an uppermost metallic conductive layer constituting an uppermost layer, and an oxide-based intermediate transparent conductive layer provided between the plurality of metallic conductive layers.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: January 3, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Ryosuke Gunji, Hiroki Taniyama, Shinsuke Saida, Hiroharu Jinmura, Yoshihiro Nakada, Akira Inoue
  • Publication number: 20220415999
    Abstract: A first connection wire electrically connected to a first electrode via a first through-hole formed in a second flattening film, and a second connection wire electrically connected to the first connection wire via a second through-hole formed in a first flattening film are provided, and a second interlayer insulating film has a contact opening so as to pass through the second interlayer insulating film to overlap the first connection wire, and such that the edge of the contact opening surrounds the first through-hole and the second through-hole in a plan view.
    Type: Application
    Filed: December 27, 2019
    Publication date: December 29, 2022
    Inventors: TOHRU OKABE, TAKAO SAITOH, YOHSUKE KANZAKI, SHINJI ICHIKAWA, RYOSUKE GUNJI, SHINSUKE SAIDA, SEIJI KANEKO
  • Publication number: 20220415997
    Abstract: A display device includes a thin film transistor layer including a first interlayer insulation film, a first wiring layer, a second interlayer insulation film, a second wiring layer, a third interlayer insulation film, a third wiring layer, a first planarization film, a fourth wiring layer, and a second planarization film; and a first damming wall in a frame area separated from the first and second planarization film in a display area by a first slit. There is provided a fourth interlayer insulation film between the third and fourth wiring layer. The fourth interlayer insulation film covers an edge of either one or both of a first frame line and a second frame line as the third wiring layer in a region where the first frame line is located opposite the second frame line in a plan view, the edge facing the display area and being exposed in the first slit.
    Type: Application
    Filed: October 21, 2019
    Publication date: December 29, 2022
    Inventors: Tohru OKABE, Takeshi YANEDA
  • Publication number: 20220376032
    Abstract: A display device according to an aspect of the disclosure includes a first metal protrusion being in contact with a first power-source trunk wire, and a second metal protrusion being in contact with a second power-source trunk wire. A first bank defining the end of an organic sealing film includes the first metal protrusion, the second metal protrusion, and a first resin protrusion. The first resin protrusion overlaps the first and second metal protrusions. The first resin protrusion has a frame shape.
    Type: Application
    Filed: September 19, 2019
    Publication date: November 24, 2022
    Inventors: Tohru OKABE, Shinsuke SAIDA, Shinji ICHIKAWA, Ryosuke GUNJI, Akira INOUE, Yoshihiro NAKADA, Hiroharu JINMURA
  • Patent number: 11508792
    Abstract: In a display region, etching stopper layers are provided between a plurality of inorganic insulating films, openings are formed in the inorganic insulating films located closer to a light-emitting element than the etching stopper layers so as to expose the upper surfaces of the etching stopper layers, and flattening films are provided in the openings such that the openings are filed with the flattening films.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: November 22, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Ryosuke Gunji, Shinji Ichikawa, Kohji Ariga, Shinsuke Saida, Hiroki Taniyama, Hiroharu Jinmura, Yoshihiro Nakada, Koji Tanimura, Yoshihiro Kohara, Akira Inoue
  • Publication number: 20220344423
    Abstract: In a TFT layer forming step, first, a semiconductor layer on a resin substrate is formed by performing a semiconductor layer forming step, and subsequently a gate insulating film is formed to cover the semiconductor layer by performing a gate insulating film forming step, and then a first metal layer is formed by performing a first metal film deposition step, a first photo step, and a first etching step, and a second metal layer is formed by performing a second metal film deposition step, a second photo step, and a second etching step, thereby forming a gate layer in which the first metal layer and the second metal layer are layered.
    Type: Application
    Filed: February 27, 2019
    Publication date: October 27, 2022
    Inventors: TOHRU OKABE, TAKESHI YANEDA
  • Publication number: 20220293714
    Abstract: Contact holes related to routed wires electrically connected to data signal lines running through the corner portions of a display region are larger in number than contact holes related to routed wires electrically connected to data signal lines running through the center portion of the display region.
    Type: Application
    Filed: September 27, 2019
    Publication date: September 15, 2022
    Inventors: Ryosuke GUNJI, Shinsuke SAIDA, Shinji ICHIKAWA, Tohru OKABE, Akira INOUE, Yoshihiro NAKADA, Hiroharu JINMURA
  • Patent number: 11430857
    Abstract: The display device includes a non-display area. The non-display area includes: a slit formed in an edge cover; a first conductive layer formed in the same layer as an anode, and being in contact with a cathode; and a second conductive layer formed in the same layer as a capacitance electrode and provided to overlap the slit.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: August 30, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Shinsuke Saida, Shinji Ichikawa, Hiroki Taniyama, Ryosuke Gunji, Takeshi Yaneda, Yoshihiro Nakada, Hiroharu Jinmura, Akira Inoue
  • Patent number: 11398542
    Abstract: In a step of forming a plurality of control lines composed of a first metal layer a first metal layer branch line is formed. In a step of forming a plurality of power source lines composed of a second metal layer a second metal layer connecting portion is formed that connects each power source line with the first metal layer branch line via an opening of a first insulating film. In a step of forming a plurality of data signal lines composed of a third metal layer that is formed on a second insulating film the first metal layer branch line formed in the opening of the first insulating and the second metal layer connecting portion formed in an opening of the second insulating film are etched.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: July 26, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Shinsuke Saida, Shinji Ichikawa, Hiroki Taniyama, Ryosuke Gunji, Kohji Ariga, Yoshihiro Nakada, Koji Tanimura, Yoshihiro Kohara, Hiroharu Jinmura, Akira Inoue
  • Publication number: 20220216288
    Abstract: A TFT layer of a display device includes: an initialization power source wiring line; a second interlayer insulating film provided covering the initialization power source wiring line; a source wiring line provided on the second interlayer insulating film; a low-level power source wiring line provided below the initialization power source wiring line; and a frame capacitor. The frame capacitor includes: a first frame capacitance electrode formed by the same material in the same layer as the initialization power source wiring line; and a second frame capacitance electrode formed by the same material in the same layer as the source wiring line and facing the first frame capacitance electrode with the second interlayer insulating film interposed therebetween. The first frame capacitance electrode is electrically connected to the high-level power source wiring line, and the second frame capacitance electrode is electrically connected to the low-level power source wiring line.
    Type: Application
    Filed: March 28, 2019
    Publication date: July 7, 2022
    Inventors: TOHRU OKABE, TAKESHI YANEDA