Patents by Inventor Tohru Okabe

Tohru Okabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220173182
    Abstract: A display device (2) includes: a planarization film; and a light-emitting-element layer including an anode, an edge cover, an EL active layer, and a cathode in this sequence. The display device further includes: a first photospacer and a second photospacer each having a surface thereof covered by the cathode; and a lightning rod photospacer (44) including a second projection portion (44b) that is a part of the planarization film and having a surface thereof covered by a first metal film (44c) made of the same material and in the same layer as the anode.
    Type: Application
    Filed: April 4, 2019
    Publication date: June 2, 2022
    Inventors: SHOJI OKAZAKI, TOHRU OKABE
  • Publication number: 20220165823
    Abstract: An organic EL display (1) has a bend (B) where a slit (81) is bored in a base coat film (23), gate insulating film (27), first interlayer insulating film (31) and second interlayer insulating film (35). The bend is provided with a filler layer (83) filling the slit and covering both edges of the slit. The filler layer has a protrusion (85) overlapping each edge in the width direction of the slit. A routed wire (7) routed from the display region (D) and then routed over the filler layer to reach a terminal section (T) extends over the protrusion.
    Type: Application
    Filed: April 4, 2019
    Publication date: May 26, 2022
    Inventors: SHINJI ICHIKAWA, SHINSUKE SAIDA, RYOSUKE GUNJI, HIROKI TANIYAMA, TOHRU OKABE, Akira INOUE, Hiroharu JINMURA, Yoshihiro NAKADA, Koji TANIMURA
  • Patent number: 11335237
    Abstract: A pixel circuit including a drive transistor and a capacitor electrically connected to a control terminal of the drive transistor, a light-emitting element, a first power supply voltage line intersecting a data signal line, and a second power supply voltage line electrically connected to the control terminal via the capacitor are provided, and in a writing period in which a scanning signal line becomes active, the first power supply voltage line and a second conduction terminal of the drive transistor are not conductive with each other, and in a light emission period of the light-emitting element, the first power supply voltage line and the second conduction terminal of the drive transistor are conductive with each other.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: May 17, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Takeshi Yaneda
  • Publication number: 20220149121
    Abstract: A separation wall is provided in a frame-like shape along a peripheral edge of a through-hole in a non-display region which is defined to be in an island shape inside a display region and in which the through-hole is formed, the separation wall includes an inner metal layer provided in a frame-like shape on a first inorganic insulating film on a side of the through-hole, and a resin layer provided in a frame-like shape on the first inorganic insulating film and the inner metal layer, and the resin layer includes an inner protrusion portion provided in an eaves shape and protruding from the inner metal layer.
    Type: Application
    Filed: March 1, 2019
    Publication date: May 12, 2022
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: TOHRU OKABE, RYOSUKE GUNJI, SHINSUKE SAIDA, SHINJI ICHIKAWA, HIROHARU JINMURA, YOSHIHIRO NAKADA, AKIRA INOUE, TAKESHI YANEDA
  • Publication number: 20220130929
    Abstract: A separation wall is provided in a frame shape along a circumferential edge of a through-hole in a non-display region, in which the through-hole is formed, defined in an island shape inside a display region. The separation wall includes a wall base portion provided in a frame shape by a part of a second interlayer insulating film and a resin layer provided in an eave shape on the wall base portion to extend to a through-hole side and a display region side. Opening portions opening upward are provided on peripheries of the wall base portion on the through-hole side and the display region side in the second interlayer insulating film.
    Type: Application
    Filed: March 29, 2019
    Publication date: April 28, 2022
    Inventors: SHINSUKE SAIDA, SHINJI ICHIKAWA, RYOSUKE GUNJI, TOHRU OKABE, AKIRA INOUE, YOSHIHIRO NAKADA, HIROHARU JINMURA
  • Publication number: 20220115475
    Abstract: A TFT layer and an organic EL element layer are provided in this order on a resin substrate layer, the TFT layer includes source wiring lines, high-level power source wiring lines, conductive portions including connection wiring lines between TFTs, and a flattening film covering the conductive portions provided on the interlayer insulating film, a frame region is provided with a bending portion including a portion where a slit is formed in an inorganic insulating film including the interlayer insulating film, and a flattening auxiliary film is provided between each adjacent ones of the conductive portions, formed of a material identical to a material of the frame flattening film that fills the slit of the bending portion, in a layer identical to a layer of the frame flattering film, and covered with the flattening film together with the conductive portions.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 14, 2022
    Inventors: RYOSUKE GUNJI, TOHRU OKABE, SHINSUKE SAIDA, HIROKI TANIYAMA, SHINJI ICHIKAWA, AKIRA INOUE, YOSHIHIRO NAKADA, HIROHARU JINMURA, KOJI TANIMURA, YOSHIHIRO KOHARA
  • Publication number: 20220059638
    Abstract: A display device includes the following: a resin substrate; a TFT layer disposed on the resin substrate, the TFT layer having a stack of, in sequence, a base coat film, a semiconductor film, a gate insulating film, a first metal film, an interlayer insulating film, a second metal film, and a flattening film; a light-emitting element disposed on the TFT layer and forming a display region; and a plurality of TFTs disposed in the TFT layer in the display region. The base coat film includes an amorphous silicon film disposed at least all over the display region.
    Type: Application
    Filed: September 21, 2018
    Publication date: February 24, 2022
    Inventors: TOKUO YOSHIDA, TOHRU OKABE
  • Publication number: 20220020958
    Abstract: A display device includes: a base substrate; a thin-film transistor layer provided on the base substrate, a light-emitting element layer provided on the thin-film transistor layer; and a sealing film provided on the light-emitting element. Each of light-emitting elements includes: a first electrode; a functional layer; and a second electrode stacked on top of another in a stated order. The display device includes: a display region; a frame region; and a non-display region. The non-display region includes a through hole. The display device includes a separation wall shaped into a frame and provided to the non-display region along an edge of the through hole. The separation wall includes: a first resin layer: and a first metal layer provided on the first resin layer. The first metal layer includes a first protrusion shaped into a canopy, and protruding from the first resin layer toward the display region.
    Type: Application
    Filed: February 27, 2019
    Publication date: January 20, 2022
    Inventors: TOHRU OKABE, SHINSUKE SAIDA, RYOSUKE GUNJI, SHINJI ICHIKAWA, HIROHARU JINMURA, AKIRA INOUE, YOSHIHIRO NAKADA
  • Publication number: 20210367027
    Abstract: In a display region, each first power-source line and each second power-source line intersecting with the first power-source line are electrically connected together via a contact hole in a second inorganic insulating film. In addition, each source line and each second power-source line intersect with each other via the second inorganic insulating film and a first organic insulating film.
    Type: Application
    Filed: May 10, 2018
    Publication date: November 25, 2021
    Inventors: Tohru OKABE, Shinsuke SAIDA, Hiroki TANIYAMA, Ryosuke GUNJI, Shinji ICHIKAWA, Kohji ARIGA, Akira INOUE, Yoshihiro KOHARA, Koji TANIMURA, Yoshihiro NAKADA, Hiroharu JINMURA
  • Publication number: 20210351263
    Abstract: According to an aspect of the disclosure, a lead wiring line provided in a frame region to extend therein while intersecting with a frame-shaped dam wall, formed of a same material and in a same layer as each of display wiring lines in which a first metal layer, a second metal layer, and a third metal layer are layered in sequence, electrically connected to the display wiring line on a display region side, and electrically connected to a terminal on a terminal portion side, the third metal layer is provided to cover a side surface of the first metal layer, and a side surface and an upper face of the second metal layer.
    Type: Application
    Filed: September 25, 2018
    Publication date: November 11, 2021
    Inventors: TOHRU OKABE, TAKESHI YANEDA
  • Publication number: 20210343226
    Abstract: A pixel circuit including a drive transistor and a capacitor electrically connected to a control terminal of the drive transistor, a light-emitting element, a first power supply voltage line intersecting a data signal line, and a second power supply voltage line electrically connected to the control terminal via the capacitor are provided, and in a writing period in which a scanning signal line becomes active, the first power supply voltage line and a second conduction terminal of the drive transistor are not conductive with each other, and in a light emission period of the light-emitting element, the first power supply voltage line and the second conduction terminal of the drive transistor are conductive with each other.
    Type: Application
    Filed: September 28, 2018
    Publication date: November 4, 2021
    Inventors: TOHRU OKABE, TAKESHI YANEDA
  • Publication number: 20210343238
    Abstract: The present application discloses a current-driven display device capable of providing satisfactory display without flickering even when pause drive is performed. In a pixel circuit 15, a first initialization transistor T4 initializes a gate voltage Vg, and thereafter a voltage on a data signal line Di is written to a holding capacitor Cst via a write control transistor T2 and a drive transistor T1. Thereafter, emission control transistors T5 and T6 are turned on, so that a drive current I1 from the drive transistor T1 causes an organic EL element OL to emit light. During this emission period, even if the gate voltage Vg is decreased due to a leakage current through the first initialization transistor T4 in an OFF state, the decrease is compensated for by increasing a threshold control voltage being provided to a threshold control terminal TG of the drive transistor T1.
    Type: Application
    Filed: September 28, 2018
    Publication date: November 4, 2021
    Inventors: TOHRU OKABE, TAKESHI YANEDA
  • Publication number: 20210327996
    Abstract: A display device includes a short ring TFT, wherein the short ring TFT includes a semiconductor layer, a first gate electrode, a second gate electrode, a first gate insulating film provided between the semiconductor layer and the first gate electrode, and a second gate insulating film provided between the semiconductor layer and the second gate electrode, one of a pair of adjacent lead-out wiring lines is electrically connected to a source region of the semiconductor layer, the other of the pair of adjacent lead-out wiring lines is electrically connected to a drain region of the semiconductor layer, one of the first gate electrode and the second gate electrode is electrically connected to the source region or the drain region, and the other of the first gate electrode and the second gate electrode is electrically connected to a threshold value control wiring line.
    Type: Application
    Filed: August 31, 2018
    Publication date: October 21, 2021
    Inventors: TOHRU OKABE, TAKESHI YANEDA
  • Publication number: 20210313412
    Abstract: A display devise includes: a resin substrate; a TFT layer; and a light-emitting element. A bending portion is provided with a first resin film formed of the same material and in the same layer as those of a first flattening film, and the first resin film fills a slit. An upper face of the first resin film is provided with a plurality of first connection wiring lines formed of a third metal film, and the plurality of first connection wiring lines extend in parallel to each other in a direction intersecting the extending direction of the bending portion. The plurality of first connection wiring lines are electrically connected to a plurality of first lead-out wiring lines, respectively in a display region side of the slit, and electrically connected to a plurality of second lead-out wiring lines, respectively in a terminal portion side of the slit.
    Type: Application
    Filed: August 28, 2018
    Publication date: October 7, 2021
    Inventors: TOHRU OKABE, RYOSUKE GUNJI, SHINJI ICHIKAWA, SHINSUKE SAIDA, SHOJI OKAZAKI, TOKUO YOSHIDA, HIROKI TANIYAMA, KOHJI ARIGA, HIROHARU JINMURA, AKIRA INOUE, YOSHIHIRO NAKADA, YOSHIHIRO KOHARA, KOJI TANIMURA
  • Publication number: 20210288286
    Abstract: A display device includes: a sealing film provided so as to cover light-emitting elements at least partially constituting a display area and including a first inorganic film, an organic film, and a second inorganic film stacked in this order; and a first damming wall in a frame area around the display area, the first damming wall surrounding the display area and overlapping a peripheral portion of the organic film, wherein at least one inorganic insulation film in a TFT layer has an upwardly open, first opening at least in a part of an area between the display area and the first damming wall, and the organic film is provided so as to fill in the first opening.
    Type: Application
    Filed: August 2, 2018
    Publication date: September 16, 2021
    Inventors: TOHRU OKABE, SHOJI OKAZAKI, RYOSUKE GUNJI, SHINSUKE SAIDA, SHINJI ICHIKAWA, TOKUO YOSHIDA, HIROHARU JINMURA, AKIRA INOUE, YOSHIHIRO NAKADA, KOJI TANIMURA, YOSHIHIRO KOHARA
  • Publication number: 20210288129
    Abstract: A display device includes: a plurality of control lines; a plurality of power supply lines; a plurality of data signal lines; an oxide semiconductor layer; a first metal layer; a gate insulation film; a first inorganic insulation film; a second metal layer; a second inorganic insulation film; and a third metal layer. The oxide semiconductor layer, in a plan view, contains therein insular semiconductor lines between a plurality of drivers and a display area. The semiconductor lines cross the plurality of control lines and the plurality of power supply lines, are in contact with the plurality of control lines via an opening in a gate insulation film, are in contact with the plurality of power supply lines via an opening in the first inorganic insulation film, and have a plurality of waisted portions.
    Type: Application
    Filed: July 30, 2018
    Publication date: September 16, 2021
    Inventors: TOHRU OKABE, SHINSUKE SAIDA, SHINJI ICHIKAWA, HIROKI TANIYAMA, RYOSUKE GUNJI, KOHJI ARIGA, YOSHIHIRO NAKADA, KOJI TANIMURA, YOSHIHIRO KOHARA, HIROHARU JINMURA, AKIRA INOUE
  • Patent number: 11114522
    Abstract: A display device includes a plurality of picture elements, wherein a first electrode is formed in each of the plurality of picture elements, a cover layer is formed such that an opening of the first electrode is formed, a spacer in a layer identical to the cover layer is provided between two of the first electrodes, the spacer is formed with a height greater than a height of the cover layer, and an outer edge portion of the spacer is spaced from an outer edge portion of the cover layer.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: September 7, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shinji Ichikawa, Hiroki Taniyama, Shinsuke Saida, Ryosuke Gunji, Tohru Okabe, Yoshihiro Nakada, Hiroharu Jinmura, Akira Inoue
  • Patent number: 11107845
    Abstract: A Thin Film Transistor (TFT) substrate includes a first semiconductor film, a first electrically conductive member provided in a layer higher than the first semiconductor film, an interlayer insulating film provided in a layer higher than the first electrically conductive member and including a first through hole, a second semiconductor film provided in a layer higher than the interlayer insulating film, a second electrically conductive member provided in a layer higher than the second semiconductor film, an organic insulating film provided in a layer higher than the second electrically conductive member and including a second through hole, and a third electrically conductive member provided in a layer higher than the organic insulating film. A contact hole extends through the first and the second through hole to the first electrically conductive member.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: August 31, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Hirohiko Nishiki, Takeshi Yaneda
  • Publication number: 20210257579
    Abstract: A display area is provided with a plurality of first conductive layers formed of the same material and in the same layer as first electrodes. The first conductive layers are each positioned under a corresponding one of plurality of first photo spacers. A frame area is provided with a second conductive layer formed of the same material and in the same layer as the first electrodes. The second conductive layer includes a plurality of openings each formed under a corresponding one of a plurality of second photo spacers.
    Type: Application
    Filed: August 23, 2018
    Publication date: August 19, 2021
    Inventors: TOHRU OKABE, TAKESHI YANEDA
  • Publication number: 20210225881
    Abstract: An active matrix substrate including a resin substrate including a plurality of external connection terminals arranged near a display region, the active matrix substrate includes: a plurality of first lead wires each extending from one of the external connection terminals to the display region; and a plurality of second lead wires each extending from one of the external connection terminals to a separation line, the second lead wires being arranged with an arrangement pitch along the separation line, and the arrangement pitch of the second lead wires being greater than an arrangement pitch of the first lead wires.
    Type: Application
    Filed: August 23, 2018
    Publication date: July 22, 2021
    Inventors: TOHRU OKABE, RYOSUKE GUNJI, SHINJI ICHIKAWA, SHINSUKE SAIDA, SHOJI OKAZAKI, TOKUO YOSHIDA, HIROKI TANIYAMA, KOHJI ARIGA, HIROHARU JINMURA, AKIRA INOUE, YOSHIHIRO NAKADA, YOSHIHIRO KOHARA, KOJI TANIMURA