Abstract: An optical semiconductor device includes a light emitting element having a first surface and a second surface, the first surface having a first electrode provided thereon, the second surface being located on the opposite side from the first surface and having a second electrode provided thereon; a first conductive member connected to the first surface; a second conductive member connected to the second surface; a first external electrode connected to the first conductive member; a second external electrode connected to the second conductive member; and an enclosure sealing the light emitting element, the first conductive member, and the second conductive member between the first external electrode and the second external electrode, and being configured to transmit light emitted from the light emitting element.

Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating ma

Abstract: An optical semiconductor device includes a light emitting element having a first surface and a second surface, the first surface having a first electrode provided thereon, the second surface being located on the opposite side from the first surface and having a second electrode provided thereon; a first conductive member connected to the first surface; a second conductive member connected to the second surface; a first external electrode connected to the first conductive member; a second external electrode connected to the second conductive member; and an enclosure sealing the light emitting element, the first conductive member, and the second conductive member between the first external electrode and the second external electrode, and being configured to transmit light emitted from the light emitting element.

Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating ma

Abstract: According to one embodiment, a surface mount diode including a diode chip including a first main surface and a second main surface, a cathode electrode including a first internal electrode portion on the first main surface and a first external electrode portion on the first internal electrode portion, an anode electrode including a second internal electrode portion on the second main surface and a second external electrode portion on the second internal electrode portion, a thickness of the second external electrode portion being the same as a thickness of the first external electrode portion, a first covering member covering a periphery surface of one of the internal electrode portions and a periphery surface of the diode chip, and a second covering member covering a periphery surface of the other of the internal electrode portions, the second covering member being different in color from the first covering member.

Abstract: An aspect of the present disclosure, there is provided An electrical inspection probe, including, a leading end portion of the electrical inspection probe, the leading end portion contacting with a solder bump located outward the electrical inspection probe, a base material configured at the leading end portion, the base material being constituted with a conductive material, a gold layer on a surface of the base material at least in the leading end portion, a rhodium layer on a surface of the gold layer at least in the leading end portion, and a ruthenium layer on a surface of the rhodium layer at least in the leading end portion.

Abstract: An optical semiconductor device includes a light emitting element having a first surface and a second surface, the first surface having a first electrode provided thereon, the second surface being located on the opposite side from the first surface and having a second electrode provided thereon; a first conductive member connected to the first surface; a second conductive member connected to the second surface; a first external electrode connected to the first conductive member; a second external electrode connected to the second conductive member; and an enclosure sealing the light emitting element, the first conductive member, and the second conductive member between the first external electrode and the second external electrode, and being configured to transmit light emitted from the light emitting element.

Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a semiconductor element, a first electrode of the semiconductor chip being configured on a first surface of the semiconductor element, a second electrode of the semiconductor element being configured on a second surface opposed to the first surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, a first hole and a second hole being configured in the encapsulating material, a portion of the first electrode and a portion of the second electrode being exposed, a first conductive material being connected to the first surface of the semiconductor chip via the first hole, a second conductive material being connected to the second surface of the semiconductor chip via the second hole, and a plating film covering five surfaces of the first conductive material other than one surface contacting with the encapsulating material and five surfaces of

Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating ma

Abstract: A semiconductor device includes a semiconductor element, a lead, and a gold wire electrically connecting an electrode of the semiconductor element and the lead. In the semiconductor device, the gold wire is covered with a metal and is a continuous film formed by plating.

Abstract: An example of the invention is a method of manufacturing a semiconductor device including, pressing a part of the connection conductor having a plate-like shape or a belt-like shape against a lead terminal which is formed on a lead frame, is formed into a thin and long plate-like shape, and is supported only at one end in a longitudinal direction of the terminal, in such a manner that the part of the conductor is brought into contact with the lead terminal, and applying ultrasonic vibration substantially in the longitudinal direction in a plane perpendicular to the pressing direction to the connection conductor in the state where the part of the connection conductor is pressed against the lead terminal.

Abstract: A semiconductor device includes a semiconductor element, a lead, and a gold wire electrically connecting an electrode of the semiconductor element and the lead. In the semiconductor device, the gold wire is covered with a metal and is a continuous film formed by plating.

Abstract: A semiconductor apparatus (1) includes a semiconductor device (2), a first lead (3) having an electrode for connection with a source electrode (S) of the semiconductor device (2), a second lead (4) having an electrode for connection with a gate electrode (G) of the semiconductor device (2), a third lead (5) having an electrode for connection with a drain electrode (D) of the semiconductor device (2), and a strap member (6) covered with a metallic film for electrical interconnection between the drain electrode (D) of the semiconductor device (2) and the electrode of the third lead (5).

Abstract: A semiconductor device includes a semiconductor chip 5 having a first surface 5a on which a first pole 5a1 of a semiconductor element is arranged and a second surface 5b on which a second pole 5b1 is arranged and which is opposed to the first surface 5a, a first conductive member 6a connected to the first surface 5a, a second conductive member 6b connected to the second surface 5b, a first external electrode 2a connected to the first conductive member 6a and having a contact area larger than the member 6a, a second external electrode 2b connected to the second conductive member 6b and having a contact area larger than the conductive member 6b and a sealing member 3 sealing up the semiconductor chip 6 and the conductive members 6 between the first external electrode 2a and the second external electrode 2b. The sealing member 3 is provided as a result of heating a sealing material for melting and subsequent hardening.

Abstract: A manufacturing method for semiconductor devices includes a process of forming a conductive layer 4 on the other principle surface of a semiconductor wafer 10 having circuit elements 2 formed in one principle surface of the semiconductor wafer, a process of forming a protecting layer 5 on at least a part of the conductive layer, the protecting layer 5 being made from material having hard-to-shave characteristics in comparison with the conductive layer and a process of cutting the semiconductor wafer 10 into pieces with respect to each of the semiconductor devices 1. By the manufacturing method, each semiconductor device 1 is provided with a semiconductor substrate 3 having the circuit elements 2 formed in one principle surface of the semiconductor substrate 3, the conductive layer 4 formed on the other principle surface of the semiconductor substrate 3 and the protecting layer 5 formed on the conductive layer 4 in lamination to have hard-to-shave characteristics in comparison with the conductive layer 4.

Abstract: A semiconductor device (3) is provided with a first electrode (A), a lead (4) has a second electrode (B), and a metallic film (6) electrically interconnects the first electrode (A) and the second electrode (B), allowing for a more reduced internal resistance, high reliability, and facilitated fabrication.

Abstract: In order to provide a highly reliable thermoelectric device, in a thermoelectric device, a plurality of heat-radiating-side electrodes, arranged in accordance with positions where respective thermoelectric elements are to be arranged, are arrayed in an array fashion on a planer surface of a heat-radiating-side board. Heat-radiating-side end surfaces of the plurality of p-type thermoelectric elements and n-type thermoelectric elements and the heat-radiating-side electrodes are joined together by solders. Heat-absorbing-side electrodes are brought into sliding contact with heat-absorbing-side end surfaces of these thermoelectric elements.

Abstract: In order to provide a highly reliable thermoelectric device, in a thermoelectric device, a plurality of heat-radiating-side electrodes, arranged in accordance with positions where respective thermoelectric elements are to be arranged, are arrayed in an array fashion on a planer surface of a heat-radiating-side board. Heat-radiating-side end surfaces of the plurality of p-type thermoelectric elements and n-type thermoelectric elements and the heat-radiating-side electrodes are joined together by solders. Heat-absorbing-side electrodes are brought into sliding contact with heat-absorbing-side end surfaces of these thermoelectric elements.

Abstract: According to a method of manufacturing a semiconductor wafer and a semiconductor device, a rear surface of the semiconductor wafer is ground, and is dry- or wet-etched so that rear surfaces of semiconductor chips on the segmented semiconductor wafer have substantially equal surface roughness. The semiconductor chips are bonded onto a lead frame via bumps using thermo-compression and ultrasonic vibrations.

Abstract: An LED chip of the present invention includes a columnar GaP substrate in which a tapered portion whose outer shape is narrowed toward an upper bottom surface side is formed in an outer wall surface thereof, an upper-surface electrode provided in an upper bottom surface of the GaP substrate, a light-emitting layer provided in a lower bottom surface of the GaP substrate, and a lower-surface electrode provided in a surface opposite to the GaP substrate with respect to the light-emitting layer, the lower-surface electrode being arranged in an annular region outside the region opposite to the upper-surface electrode.