Abstract: A snubber circuit has a voltage detection circuit which detects that a voltage between first and second terminals exceeds a predetermined voltage, a protection circuit which performs control to prevent an overvoltage between the first and second terminals when the voltage detection circuit detects that the voltage between the first and second terminals exceeds the predetermined voltage, and a voltage control circuit which bypasses a portion of a main current flowing between the first and second terminals to the protection circuit when the voltage detection circuit detects that the voltage between the first and second terminals exceeds the predetermined voltage.

Abstract: A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.

Abstract: The connector clip for verifying complete connection includes a connection verifying portion, more specifically, a pair of restraining portions having an assistance structure to certainly detect incomplete connection between the connector and the pipe. The assistance structure may be constructed so as to remove a sealing property between the connector and the pipe in incomplete connection relation with one another.

Abstract: A semiconductor device comprises a first base layer of a first conductivity type; a plurality of second base layers of a second conductivity type, provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers, and formed to be deeper than the second base layers; an emitter layer formed along the trench on a surface of the second base layers; a collector layer of the second conductivity type, provided on a second surface of the first base layer opposite to the first surface; an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated from the second base layers and the emitter layer by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being deeper than the second base layers and being electrically isolated from the emitter layer and t

Abstract: In a photoelectric converting film stack type solid-state image pickup device, a plurality of photoelectric converting film are stacked on a semiconductor substrate in which a signal readout circuit is formed, each of the photoelectric converting films is sandwiched between a common electrode film and pixel electrode films corresponding to respective pixels, and photo-charges generated in the photoelectric converting films are taken out through the pixel electrode films. In the solid-state image pickup device, a common electrode film for a first photoelectric converting film is used also as a common electrode film for a second photoelectric converting film, the first photoelectric converting film is stacked below the common electrode film, and the second photoelectric converting film is stacked above the common electrode film.

Abstract: A semiconductor device includes a base layer of a first conductivity type, a barrier layer of a first conductivity type formed on the base layer, a trench formed from the surface of the barrier layer to such a depth as to reach a region in the vicinity of an interface between the barrier layer and the base layer, a gate electrode formed in the trench via a gate insulating film, a contact layer of a second conductivity type selectively formed in a surface portion of the barrier layer, a source layer of the first conductivity type selectively formed in the surface portion of the barrier layer so as to contact the contact layer and a side wall of the gate insulating film in the trench, and a first main electrode formed so as to contact the contact layer and the source layer.

Abstract: A semiconductor device comprises a first base layer of a first conductive type which has a first surface and a second surface; a second base layer of a second conductive type which is formed on the first surface; first and second gate electrodes which are formed by embedding an electrically conductive material into a plurality of trenches via gate insulating films, the plurality of trenches being formed such that bottoms of the trenches reach the first base layer; source layers of the first conductive type which are formed on a surface area of the second base layer so as to be adjacent to both side walls of the trench provided with the first gate electrode and one side wall of the trench provided with the second gate electrode, respectively; an emitter layer of the second conductive type which is formed on the second surface; emitter electrodes which are formed on the second base layer and the source layers; a collector electrode which is formed on the emitter layer; and first and second terminals which are e

Abstract: A vertical semiconductor device including a first conductivity type base layer having resistance higher then of a first conductivity type buffer layer, the first conductivity type buffer layer formed in one surface portion of the first conductivity type base layer, a second conductivity type drain layer selectively formed in a surface portion of the first conductivity type buffer layer, a second conductivity type base layer selectively formed in the other surface portion of the first conductivity type base layer, a first conductivity type source layer selectively formed in a surface portion of the second conductivity type base layer, a gate insulating film formed on the second conductivity type base layer between the first conductivity type source layer and the first conductivity type base layer, a gate electrode formed on the second conductivity type base layer via the gate insulating film, a drain electrode electrically connected to the second conductivity type drain layer, and a source electrode electrical

Abstract: A semiconductor device includes: a base layer of a first conductivity type, a barrier layer of a first conductivity type formed on the base layer, a well layer of a second conductivity type formed on the barrier layer; a trench formed from the surface of the well layer to such a depth as to reach a region in the vicinity of a junction surface between the barrier layer and the base layer, a gate electrode formed in the trench via a gate insulating film, a contact layer of the second conductivity type selectively formed in a surface portion of the well layer, a source layer of the first conductivity type selectively formed in the surface portion of the well layer so as to contact a side wall of the gate insulating film in the trench and the contact layer, and a first main electrode formed so as to contact the contact layer and the source layer, wherein assuming that a total sum of impurity densities in the region of the barrier layer between the trenches is Qn, the Qn has a relation of the following equation: Q

Abstract: A semiconductor device including a base layer of a first conductivity type having a first main surface and a second main surface opposite the first main surface, a first main electrode layer connected to the first main surface, control regions arranged inside grooves penetrating the first main electrode layer and reach inside the base layer, and a second main electrode layer of the first conductivity type and connected to the second main surface.

Abstract: The present invention is a bracket for a fluid transport tube including an elongated bracket body having a length in a longitudinal direction, a tube clamp for holding the fluid transport tube in a direction transverse to the longitudinal direction, a mounting component for securing the bracket body and tube clamp to the side of a car wherein the mounting component comprises a bolt passage hole for passing a bolt having a bolt head through the passage hole to secure the mounting component to the side of the car and a vibration-absorbing bushing 9 made of a rubber-like resilient material with an annular fitting groove 15 in the middle of its outer circumference in the thickness direction thereof fitted to the mounting component 5 in such a manner to clamp part of said bushing between the bolt head and said mounting component, and another part of said bushing between said mounting component and the car body.

Abstract: A semiconductor device disclosed herein comprises: a first base region which is of a first conductivity type; a second base region which is of a second conductivity type and which is selectively formed on a major surface of the first base region; a stopper region which is of a first conductivity type and which is formed on the major surface of the first base region, the stopper region being a predetermined distance away from the second base region and surrounding the second base region; and a ring region which is of a second conductivity type which is formed on the major surface of the first base region between the second base region and the stopper region, the ring region being spirally around the second base region and electrically connected to the second base region and the stopper region.

Abstract: A connector clip integrally comprises a holder portion and a C-shaped clamp on one longitudinal end portion of the holder portion. The holder portion is mounted to a length from a connector to a curved portion of a pipe. The C-shaped clamp clips a tube connected to a tube connecting portion of the connector. The holder portion comprises a holding portion to hold a length from a tubular holder portion of the connector to an annular projection of the pipe therein, a first receiving portion formed on an opposite longitudinal side from the holding portion to receive a straight pipe portion of the pipe, and a second receiving portion formed on an opposite longitudinal side from the first receiving portion to receive a curved portion of the pipe.

Abstract: A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.

Abstract: A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.

Abstract: The connector clip for verifying complete connection integrally includes a clip body of U-shape in cross-section to receive a tubular holding portion and a connection verifying portion of U-shape in cross-section to receive an opposite axial side of an annular verification projection with respect to the pipe. The connection verifying portion has a verifying body and a snap-fit portion. The clip body and the verifying body are connected via a connection part, while the verifying body and the snap-fit portion are connected via a joint part. Reinforcement ribs are formed along an entire circumference of outer surface of the verifying body.

Abstract: The connector clip for verifying complete connection includes a connection verifying portion, more specifically, a pair of restraining portions having an assistance structure to certainly detect incomplete connection between the connector and the pipe. The assistance structure may be constructed so as to remove a sealing property between the connector and the pipe in incomplete connection relation with one another.

Abstract: A connector cover for providing a water shield between a connector and a pipe comprises two cover elements. The cover elements are joined each other to construct a tubular water shield, which internally has a connector receiving portion on one axial side thereof for receiving a pipe inserting portion of a connector, and a pipe receiving portion on an opposite axial side thereof for receiving a pipe. The pipe receiving portion has a pipe receiving section on an opposite axial side thereof for receiving an opposite axial side from an annular projection of the pipe, and a projection receiving section on one axial side thereof for receiving annular projection. An inner diameter of the pipe receiving section is designed generally identical to an outer diameter of the pipe.

Abstract: An IGBT has a p-emitter layer and p-base layer, which are arranged on both sides of an n-base layer. A pair of main trenches are formed to extend through the p-base layer and reach the n-base layer. In a current path region interposed between the main trenches, a pair of n-emitter layers are formed on the surface of the p-base layer. A narrowing trench is formed to extend through the p-base layer and reach the n-base layer. The narrowing trench narrows a hole flow path formed from the n-base layer to the emitter electrode through the p-base layer, thereby increasing the hole current resistance.

Abstract: A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.