Abstract: A semiconductor device include a plurality of active element cells including first element regions of a first conductivity type and second element regions of a second conductivity type, the second element regions disposed between the first element regions; and isolation regions disposed between the active element cells so as to isolate the active element cells from each other, the isolation regions being filled with a plurality of semi-insulating particles including granular insulators covered by semiconductor films.

Abstract: A semiconductor substrate has a second conductivity type cathode layer formed thereon. The cathode layer has a first conductivity type base layer formed thereon. A first anode region of the second conductivity type is formed in the surface of the base layer. A second anode region of the first conductivity type is formed in the first anode region. A first semiconductor region of the first conductivity type is formed in contact with the semiconductor substrate. A second semiconductor region of the second conductivity type is formed adjacent to the first semiconductor region and in contact with the cathode layer. An intermediate electrode is formed on the surfaces of the first semiconductor region and the contact region.

Abstract: In a photoelectric converting film stack type solid-state image pickup device, a plurality of photoelectric converting film are stacked on a semiconductor substrate in which a signal readout circuit is formed, each of the photoelectric converting films is sandwiched between a common electrode film and pixel electrode films corresponding to respective pixels, and photo-charges generated in the photoelectric converting films are taken out through the pixel electrode films. In the solid-state image pickup device, a common electrode film for a first photoelectric converting film is used also as a common electrode film for a second photoelectric converting film, the first photoelectric converting film is stacked below the common electrode film, and the second photoelectric converting film is stacked above the common electrode film.

Abstract: EMI filter 20 includes input terminal Vin, output terminal Vout, resistor component R1 and diodes D1 and D2. Resistor component R1 is composed of polycrystalline resistor component Rp and ring resistor components R11 and R12. Polycrystalline resistor component Rp is connected between input and output terminals Vin and Vout. Ring resistor components R11 and R12 are provided on one and the other sides of polycrystalline resistor component at a prescribed distance, respectively. Further, diode D1 has cathode and anode electrodes connected to input terminal Vin and reference potential Vss, respectively. Likewise, diode D2 has cathode and anode electrodes connected to output terminal Vout and reference potential Vss, respectively. Ring resistor components R11 and R12 are rectangular in shape to electromagnetically couple to polycrystalline resistor component Rp.

Abstract: A solid-state image sensing device provided with photoelectric conversion films stacked above a semiconductor substrate, comprising: first impurity regions as defined herein; second impurity regions as defined herein; signal charge reading regions as defined herein; and third impurity regions as defined herein.

Abstract: A solid-state imaging device is provided and has; three photoelectric conversion layers stacked above a semiconductor substrate 1, each detecting a different color; three signal charge accumulators in a semiconductor substrate for accumulating signal charges generated in each of the three photoelectric conversion layers: and a signal readout circuit in the semiconductor substrate for reading out signals corresponding to the signal charges accumulated in the signal charge accumulators. The three signal charge accumulators are arranged in a direction in the surface of the semiconductor substrate as a pixel and a plurality of the pixels are arranged in a square lattice pattern both in the direction and a direction perpendicular thereto. The three signal charge accumulators arranged in each pixel in an odd row are arranged such that an array of the signal charge accumulators in the first sub-row of each pixel has all of the three signal charge accumulators.

Abstract: A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.

Abstract: A snubber circuit has a voltage detection circuit which detects that a voltage between first and second terminals exceeds a predetermined voltage, a protection circuit which performs control to prevent an overvoltage between the first and second terminals when the voltage detection circuit detects that the voltage between the first and second terminals exceeds the predetermined voltage, and a voltage control circuit which bypasses a portion of a main current flowing between the first and second terminals to the protection circuit when the voltage detection circuit detects that the voltage between the first and second terminals exceeds the predetermined voltage.

Abstract: Connection verifying device for a pipe and a connector has a body portion, a stop and verification arm and an abutment finger. The body portion includes an abutment plate and a fit-on portion. The stop and verification arm extends from an outer periphery of the abutment plate in one axial direction, while the abutment finger protrudes from one axial end of the fit-on portion in one axial direction. The abutment finger is arranged so as to abut and urge an annular projection of a pipe into an engagement slit of a retainer when the pipe and the connector are in half-fitting relation.

Abstract: A driving section 4 supplies a reading pulse of ‘H’ to electrodes V1 and V5 simultaneously with completion of exposure to read out electric charges to empty packets below electrodes V1, V2, V5, and V6. Then, the driving section 4 supplies a driving pulse of ‘M’ to electrodes V3 and V7 and a multiplication pulse to the electrodes V2 and V6. At this time, a level of the multiplication pulse supplied to the electrodes V2 and V6 is set so that a potential difference between the electrodes V1 and V3 and the electrode V2 and a potential difference between the electrodes V5 and V7 and the electrode V6 become values required to cause avalanche multiplication. Electric charges accumulated below the electrodes V1 to V3 move into packets formed below the electrodes V2 and V6. The avalanche multiplication occurs at the time of movement. Thus, the electric charges are multiplied.

Abstract: A semiconductor device includes a base layer of a first conductivity type, a barrier layer of a first conductivity type formed on the base layer, a trench formed from the surface of the barrier layer to such a depth as to reach a region in the vicinity of an interface between the barrier layer and the base layer, a gate electrode formed in the trench via a gate insulating film, a contact layer of a second conductivity type selectively formed in a surface portion of the barrier layer, a source layer of the first conductivity type selectively formed in the surface portion of the barrier layer so as to contact the contact layer and a side wall of the gate insulating film in the trench, and a first main electrode formed so as to contact the contact layer and the source layer.

Abstract: A solid-state imaging device is provided and includes: a semiconductor substrate; a plurality of photoelectric conversion films stacked above the semiconductor layer and absorbing different wavelength regions of light; and a transmission-blocking film at least one between the plurality of photoelectric conversion films, the transmission-blocking film blocking a transmission of a particular region of light, the particular region of light having a wavelength in a region to be absorbed in a photoelectric conversion film located above and nearest to the transmission-blocking film.

Abstract: A semiconductor device includes a base layer of a first conductivity type, a barrier layer of a first conductivity type formed on the base layer, a trench formed from the surface of the barrier layer to such a depth as to reach a region in the vicinity of an interface between the barrier layer and the base layer, a gate electrode formed in the trench via a gate insulating film, a contact layer of a second conductivity type selectively formed in a surface portion of the barrier layer, a source layer of the first conductivity type selectively formed in the surface portion of the barrier layer so as to contact the contact layer and a side wall of the gate insulating film in the trench, and a first main electrode formed so as to contact the contact layer and the source layer.

Abstract: An ESD protection device includes: a semiconductor substrate of a first conductivity type having a first major surface and a second major surface; a signal input electrode formed on the first major surface of the semiconductor substrate; a base region of a second conductivity type formed on a surface region of the second major surface of the semiconductor substrate; a diffusion region of the first conductivity type; a resistor layer formed on the second major surface of the semiconductor substrate of the first conductivity type; a signal output electrode electrically connected to the diffusion region of the first conductivity type; and a ground electrode electrically connected to the resistor layer. The diffusion region is selectively formed on a surface region of the base region of the second conductivity type in the semiconductor substrate of the first conductivity type. The resistor layer is electrically connected to the diffusion region of the first conductivity type.

Abstract: A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.

Abstract: EMI filter 20 includes input terminal Vin, output terminal Vout, resistor component R1 and diodes D1 and D2. Resistor component R1 is composed of polycrystalline resistor component Rp and ring resistor components R11 and R12. Polycrystalline resistor component Rp is connected between input and output terminals Vin and Vout. Ring resistor components R11 and R12 are provided on one and the other sides of polycrystalline resistor component at a prescribed distance, respectively. Further, diode D1 has cathode and anode electrodes connected to input terminal Vin and reference potential Vss, respectively. Likewise, diode D2 has cathode and anode electrodes connected to output terminal Vout and reference potential Vss, respectively. Ring resistor components R11 and R12 are rectangular in shape to electromagnetically couple to polycrystalline resistor component Rp.

Abstract: Anti-rotation device for a pipe and a connector has a pipe connecting portion and a connector connecting portion constructed integrally on the pipe connecting portion. The anti-rotation device is mounted on the pipe and the connector while the pipe connecting portion clips a straight tubular inserting side portion of the pipe in anti-rotating relation and the connector connecting portion is connected to the connector in anti-rotating relation. Thereby the pipe is connected to the connector in anti-rotating relation.

Abstract: According to an embodiment of the invention, there is provided a semiconductor device comprising: a semiconductor element having a first main electrode, a second main electrode and a control electrode, a current flowing between the first and second main electrodes being controlled by a control signal which is input between the control electrode and the second main electrode; and a capacitor formed by providing an insulating layer between the second main electrode and the control electrode of the semiconductor element.

Abstract: According to an embodiment of the invention, there is provided a semiconductor device comprising: a semiconductor element having a first main electrode, a second main electrode and a control electrode, a current flowing between the first and second main electrodes being controlled by a control signal which is input between the control electrode and the second main electrode; and a capacitor formed by providing an insulating layer between the second main electrode and the control electrode of the semiconductor element.

Abstract: A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.