Patents by Inventor Tomonori Tanoue

Tomonori Tanoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8546939
    Abstract: A technology is provided so that RF modules used for cellular phones etc. can be reduced in size. Over a wiring board constituting an RF module, there are provided a first semiconductor chip in which an amplifier circuit is formed and a second semiconductor chip in which a control circuit for controlling the amplifier circuit is formed. A bonding pad over the second semiconductor chip is connected with a bonding pad over the first semiconductor chip directly by a wire without using a relay pad. In this regard, the bonding pad formed over the first semiconductor chip is not square but rectangular (oblong).
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: October 1, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Sasaki, Tomonori Tanoue, Sakae Kikuchi, Toshifumi Makino, Takeshi Sato, Tsutomu Kobori, Yasunari Umemoto, Takashi Kitahara
  • Patent number: 8396430
    Abstract: Disclosed are a semiconductor integrated circuit device and a wireless communication system that are capable of improving reception sensitivity. The wireless communication system includes, for instance, a first duplexer, a second duplexer, a first low-noise amplifier circuit, and a second low-noise amplifier circuit. A transmission band compliant with a communication standard is split into two segments for use, namely, low- and high-frequency transmission bands. A reception band compliant with the communication standard is split into two segments for use, namely, low- and high-frequency reception bands. The first duplexer uses the low-frequency transmission band and low-frequency reception band as passbands. The second duplexer uses the high-frequency transmission band and high-frequency reception band as passbands.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: March 12, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Taizo Yamawaki, Tomonori Tanoue, Kazuaki Hori
  • Patent number: 8306490
    Abstract: A high frequency power amplifier maintains an excellent linearity regardless of a fluctuation of a load impedance and is downsized. The high frequency power amplifier detects an AC voltage amplitude at an output terminal of a final amplification stage transistor, and suppresses an input signal amplitude of a power amplifier when the voltage amplitude exceeds a predetermined threshold value.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: November 6, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Tomonori Tanoue, Hidetoshi Matsumoto
  • Publication number: 20120208476
    Abstract: A high frequency power amplifier maintains an excellent linearity regardless of a fluctuation of a load impedance and is downsized. The high frequency power amplifier detects an AC voltage amplitude at an output terminal of a final amplification stage transistor, and suppresses an input signal amplitude of a power amplifier when the voltage amplitude exceeds a predetermined threshold value.
    Type: Application
    Filed: April 20, 2012
    Publication date: August 16, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Tomonori Tanoue, Hidetoshi Matsumoto
  • Patent number: 8229373
    Abstract: A high frequency power amplifier maintains an excellent linearity regardless of a fluctuation of a load impedance and is downsized. The high frequency power amplifier detects an AC voltage amplitude at an output terminal of a final amplification stage transistor, and suppresses an input signal amplitude of a power amplifier when the voltage amplitude exceeds a predetermined threshold value.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: July 24, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Tomonori Tanoue, Hidetoshi Matsumoto
  • Publication number: 20110304388
    Abstract: Disclosed are a semiconductor integrated circuit device and a wireless communication system that are capable of improving reception sensitivity. The wireless communication system includes, for instance, a first duplexer, a second duplexer, a first low-noise amplifier circuit, and a second low-noise amplifier circuit. A transmission band compliant with a communication standard is split into two segments for use, namely, low- and high-frequency transmission bands. A reception band compliant with the communication standard is split into two segments for use, namely, low- and high-frequency reception bands. The first duplexer uses the low-frequency transmission band and low-frequency reception band as passbands. The second duplexer uses the high-frequency transmission band and high-frequency reception band as passbands.
    Type: Application
    Filed: May 24, 2011
    Publication date: December 15, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Taizo YAMAWAKI, Tomonori TANOUE, Kazuaki HORI
  • Patent number: 8076974
    Abstract: An RF power amplifier has a final-stage amplifier stage which generates an RF transmit output signal, a signal detector which detects an RF transmit output level, a first detector, a second detector and a control circuit. The final-stage amplifier stage includes a transistor and a load element and performs saturation type nonlinear amplification and non-saturation type linear amplification. The first detector and the control circuit maintain the RF transmit output signal approximately constant with respect to a variation in load at an antenna at the saturation type nonlinear amplification. The second detector and the control circuit reduce an increase in the output voltage of the final stage transistor with respect to an overload state of the antenna at the non-saturation type linear amplification.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: December 13, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Satoshi Tanaka, Tomonori Tanoue
  • Publication number: 20110248389
    Abstract: An upper module board on which an integrated chip component with a low upper temperature limit is mounted and a lower module board on which a heat-generating semiconductor chip, a single chip component and an integrated chip component are mounted are electrically and mechanically connected via a plurality of conductive connecting members, and these are sealed together with mold resin. In such a circumstance, a shield layer made up of a stacked film of a Cu plating film and a Ni plating film is formed on side surfaces of the upper and lower module boards and surfaces (upper and side surfaces) of the mold resin, thereby realizing the electromagnetic wave shield structure.
    Type: Application
    Filed: March 17, 2011
    Publication date: October 13, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Chiko YORITA, Tsutomu HARA, Hiroshi OKABE, Tomonori TANOUE, Yuji SHIRAI
  • Publication number: 20110095827
    Abstract: An RF power amplifier has a final-stage amplifier stage which generates an RF transmit output signal, a signal detector which detects an RF transmit output level, a first detector, a second detector and a control circuit. The final-stage amplifier stage includes a transistor and a load element and performs saturation type nonlinear amplification and non-saturation type linear amplification. The first detector and the control circuit maintain the RF transmit output signal approximately constant with respect to a variation in load at an antenna at the saturation type nonlinear amplification. The second detector and the control circuit reduce an increase in the output voltage of the final stage transistor with respect to an overload state of the antenna at the non-saturation type linear amplification.
    Type: Application
    Filed: December 29, 2010
    Publication date: April 28, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Satoshi TANAKA, Tomonori TANOUE
  • Patent number: 7876156
    Abstract: An RF power amplifier has a final-stage amplifier stage which generates an RF transmit output signal, a signal detector which detects an RF transmit output level, a first detector, a second detector and a control circuit. The final-stage amplifier stage includes a transistor and a load element and performs saturation type nonlinear amplification and non-saturation type linear amplification. The first detector and the control circuit maintain the RF transmit output signal approximately constant with respect to a variation in load at an antenna at the saturation type nonlinear amplification. The second detector and the control circuit reduce an increase in the output voltage of the final stage transistor with respect to an overload state of the antenna at the non-saturation type linear amplification.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: January 25, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Satoshi Tanaka, Tomonori Tanoue
  • Publication number: 20100230789
    Abstract: A technology is provided which allows a reduction in the size of a semiconductor device without degrading an electromagnetic shielding effect and reliability against reflow heating. After a plurality of components are mounted over a component mounting surface of a module substrate, a resin is formed so as to cover the mounted components. Further, over surfaces (upper and side surfaces) of the resin, a shield layer including a laminated film of a Cu plating film and an Ni plating film is formed. In the shield layer, a plurality of microchannel cracks are formed randomly along grain boundaries and in a net-like configuration without being coupled to each other in a straight line, and form a plurality of paths extending from the resin to a surface of the shield layer by the microchannel cracks.
    Type: Application
    Filed: March 15, 2010
    Publication date: September 16, 2010
    Inventors: Chiko Yorita, Yuji Shirai, Hirokazu Nakajima, Hiroshi Ozaku, Tomonori Tanoue, Hiroshi Okabe, Tsutomu Hara
  • Publication number: 20090289717
    Abstract: An RF power amplifier has a final-stage amplifier stage which generates an RF transmit output signal, a signal detector which detects an RF transmit output level, a first detector, a second detector and a control circuit. The final-stage amplifier stage includes a transistor and a load element and performs saturation type nonlinear amplification and non-saturation type linear amplification. The first detector and the control circuit maintain the RF transmit output signal approximately constant with respect to a variation in load at an antenna at the saturation type nonlinear amplification. The second detector and the control circuit reduce an increase in the output voltage of the final stage transistor with respect to an overload state of the antenna at the non-saturation type linear amplification.
    Type: Application
    Filed: March 27, 2009
    Publication date: November 26, 2009
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Satoshi TANAKA, Tomonori TANOUE
  • Patent number: 7589588
    Abstract: A high-frequency power amplifier comprising: a plurality of power amplifiers arranged in parallel; an inductance element inserted in series in an input signal line of said each power amplifier; an input matching circuit for performing matching of inputs of a parallel connection which connected each series connection of said power amplifier and said inductance element in parallel; an output matching circuit for performing matching of outputs of the parallel connection; and a control unit for controlling said power amplifiers in such a manner that one of said power amplifiers is always brought to an operation condition and the remainder of said power amplifiers are brought to an operation or non-operation condition.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: September 15, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Masami Ohnishi, Tomonori Tanoue, Hidetoshi Matsumoto
  • Patent number: 7547929
    Abstract: The present invention provides a semiconductor device which comprises active components, passive components, wiring lines and electrodes and are satisfactory in terms of mechanical strength, miniaturization and thermal stability. In the semiconductor device, openings are formed just below active components. These openings are filled with conductor layers. Conductor layers are also formed where openings are not formed.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: June 16, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Kenichi Tanaka, Hidetoshi Matsumoto, Isao Ohbu, Kazuhiro Mochizuki, Tomonori Tanoue, Chisaki Takubo, Hiroyuki Uchiyama
  • Patent number: 7482875
    Abstract: The invention provides a wide-band, low-noise, and small-sized high frequency power amplifier that has small temperature dependence of the gain and is excellent in input matching. A parallel circuit consisting of a resistor whose resistance depends strongly on temperature and a conventional resistor is inserted serially into a signal path in an input matching circuit of an amplification unit, and resistances of the resistors are set to appropriate values, for example, about 2/3 times an input impedance of the amplification unit.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: January 27, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Tomonori Tanoue, Masami Ohnishi
  • Patent number: 7408405
    Abstract: For use in an amplifier configuration including a high-power amplifier and a low-power amplifier which are always interconnected in terms of high frequencies and between which switching is made using no switches, a highly stable high-frequency power amplifier module with high isolation between the amplifiers is provided. To reduce wrapping around from a low-power amplifier section in an activated state to a high-power amplifier section in a deactivated state or from the high-power amplifier section in an activated state to the low-power amplifier section in a deactivated state, an input matching circuit having high isolation characteristics is included in an input matching circuit portion which does not have much to do with amplifier efficiency. Switching of each of the amplifier sections between an activated state and a deactivated state is effected by control using bias input terminals.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: August 5, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Masami Ohnishi, Tomonori Tanoue, Hidetoshi Matsumoto
  • Patent number: 7368996
    Abstract: Disclosed is a power amplifier having highly stable and excellent controllability, and having low noise in comparison with conventional power amplifiers. With the power amplifier, a differential amplifier made up of transistors Q1, Q2 is provided in the initial stage thereof, and baluns doubling as inter-stage matching circuits, comprised of Cp1, Cp2, Lp1, and Ct1, Ct2, Lt1, respectively, are provided between the initial stage, and a second stage while an unbalanced single-ended circuit is provided in the second stage. The differential amplifier has an emitter-coupled type configuration for coupling both emitters with each other, and output control of the amplifier in the initial stage is executed by varying current of a current source coupled to both the emitters.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: May 6, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Tomonori Tanoue, Masami Ohnishi, Hidetoshi Matsumoto, Akira Kuriyama
  • Patent number: 7368988
    Abstract: In a base-bias-control-type high-frequency power amplifier with a plural stage configuration, a rising voltage of a base bias current supplied to an initial stage transistor is made lower than a rising voltage of a base bias current supplied to a second stage transistor by a bias circuit, and a difference between the both voltages is set to be smaller than a base-emitter voltage of an amplifying stage transistor. Also, a rising voltage of a base bias current supplied to a third stage transistor is made equal to the rising voltage of the base bias current supplied to an initial stage transistor. Accordingly, a technology capable of improving the power control linearity can be provided in a high-frequency power amplifier used in a polar-loop transmitter or the like.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: May 6, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Hidetoshi Matsumoto, Tomonori Tanoue, Isao Ohbu
  • Patent number: 7276744
    Abstract: This invention is intended to provide an HBT capable of achieving, if the HBT is a collector-up HBT, the constriction of the emitter layer disposed directly under an external base layer, and reduction in base-emitter junction capacity, or if the HBT is an emitter-up HBT, reduction in base-collector junction capacity. For the collector-up HBT, window structures around the sidewalls of a collector are used to etch either the emitter layer disposed directly under the external base layer, or an emitter contact layer For the emitter-up HBT, window structures around the sidewalls of an emitter are used to etch either the collector layer disposed directly under the external base layer, or a collector contact layer. In both HBTs, the external base layer is supported by a columnar structure to ensure mechanical strength.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: October 2, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kenichi Tanaka, Tomonori Tanoue, Hidetoshi Matsumoto, Hiroshi Ohta, Kazuhiro Mochizuki, Hiroyuki Uchiyama
  • Publication number: 20070190962
    Abstract: A technology is provided so that RF modules used for cellular phones etc. can be reduced in size. Over a wiring board constituting an RF module, there are provided a first semiconductor chip in which an amplifier circuit is formed and a second semiconductor chip in which a control circuit for controlling the amplifier circuit is formed. A bonding pad over the second semiconductor chip is connected with a bonding pad over the first semiconductor chip directly by a wire without using a relay pad. In this regard, the bonding pad formed over the first semiconductor chip is not square but rectangular (oblong).
    Type: Application
    Filed: December 29, 2006
    Publication date: August 16, 2007
    Inventors: Kenji Sasaki, Tomonori Tanoue, Sakae Kikuchi, Toshifumi Makino, Takeshi Sato, Tsutomu Kobori, Yasunari Umemoto, Takashi Kitahara