Patents by Inventor Tomonori Tanoue
Tomonori Tanoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20040071225Abstract: A linear system and an EER system are used in combination such that the EER system can also be used in a cellular phone with a wide output dynamic range. In the EER system, linear control of an amplifier becomes difficult in a low output range. Thus, use of the EER system is limited to a high output range, and the linear system is used in the low output range as in the past. A power efficiency is improved while requirements of linearity are satisfied by this structure. An effective circuit structure is proposed for a switching control system for two systems. In addition, an up-converter is constituted in combination with a step-down element with high responsiveness, whereby a power supply voltage control circuit for the EER system with a wide control range and high responsiveness is provided.Type: ApplicationFiled: September 5, 2003Publication date: April 15, 2004Inventors: May Suzuki, Satoshi Tanaka, Taizo Yamawaki, Tomonori Tanoue
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Publication number: 20040065900Abstract: The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.Type: ApplicationFiled: April 23, 2003Publication date: April 8, 2004Applicant: Hitachi, Ltd.Inventors: Yasunari Umemoto, Hideyuki Ono, Tomonori Tanoue, Yasuo Ohsone, Isao Ohbu, Chushiro Kusano, Atsushi Kurokawa, Masao Yamane
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Patent number: 6710649Abstract: A power amplifier module comprises a plurality of amplifier stages, each including a reference amplifier for emulating the operation of the amplifier. The current flowing to the base of a bipolar transistor that forms each reference amplifier depending on an input power level is detected, amplified, and supplied as base current of the transistor of the corresponding amplifier.Type: GrantFiled: November 21, 2002Date of Patent: March 23, 2004Assignee: Renesas Technology CorporationInventors: Hidetoshi Matsumoto, Tomonori Tanoue, Satoshi Tanaka, Kiichi Yamashita
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Publication number: 20040026713Abstract: A semiconductor device with high structural reliability and low parasitic capacitance is provided. In one example, the semiconductor device has a surface. The semiconductor device comprises a semiconductor region, wherein an emitter region, a base region, and a collector region are laminated from a side near a substrate of the semiconductor region; an insulating protection layer disposed on the surface; and a wiring layer disposed on the surface, the insulating protection layer forming a via hole from the side of the substrate of the semiconductor region, the via hole being formed to allow the wiring layer to make a contact to an electrode of the emitter region from a side of the substrate where the emitter region, the base region, and the collector region are laminated and where the semiconductor region is isolated.Type: ApplicationFiled: May 20, 2003Publication date: February 12, 2004Applicant: Hitachi, Ltd.Inventors: Tomonori Tanoue, Kazuhiro Mochizuki, Hiroji Yamada
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Patent number: 6674323Abstract: To provide a small-sized high frequency power amplifier for preventing oscillation by a small number of switching circuits and outputting high power and low power with high efficiencies, a high frequency power amplifier module and a portable telephone, the high frequency power amplifier is constituted by an amplifying circuit A and an amplifying circuit B connected in parallel, a size of a transistor at an output stage of the amplifying circuit B is made to be equal to or smaller than ¼ of a size of a transistor of an output stage of the amplifying circuit A and a switching circuit is connected between a signal line forward from the output stage of the amplifying circuit A and a ground terminal.Type: GrantFiled: July 11, 2002Date of Patent: January 6, 2004Assignee: Renesas Technology CorporationInventors: Osamu Kagaya, Masami Ohnishi, Kenji Sekine, Tomonori Tanoue
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Publication number: 20030218185Abstract: A first aspect of the invention is to realize a power amplifier having high power adding efficiency and high power gain at low cost. For that purpose, in a semiconductor device using an emitter top heterojunction bipolar transistor formed above a semiconductor substrate and having a planar shape in a ring-like shape, a structure is provided in which a base electrode is present only on an inner side of a ring-like emitter-base junction region. In this way, as a result of enabling to reduce base/collector junction capacitance per unit emitter area without using a collector top structure having complicated fabricating steps, a semiconductor device having high power adding efficiency and high-power gain and suitable for a power amplifier can be realized.Type: ApplicationFiled: April 9, 2003Publication date: November 27, 2003Applicant: Hitachi, Ltd.Inventors: Isao Ohbu, Tomonori Tanoue, Chushiro Kusano, Yasunari Umemoto, Atsushi Kurokawa, Kazuhiro Mochizuki, Masami Ohnishi, Hidetoshi Matsumoto
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Publication number: 20030186509Abstract: The present invention provides a method of manufacturing semiconductor devices, by which InGaAs-base C-top HBTs are manufactured at low cost. Helium ions with a smaller radius are implanted into a p-type InGaAs layer (in external base regions) not covered with a lamination consisting of an undoped InGaAs spacer layer, n-type InP collector layer, n-type InGaAs cap layer, and collector electrode from a direction vertical to the surface of the external base layer or within an angle of 3 degrees off the vertical. In consequence, the p-type InGaAs in the external base regions remains p-type conductive and low resistive and the n-type InAlAs layer in the external emitter regions can be made highly resistive. By this method, InGaAs-base C-top HBTs can be fabricated on a smaller chip at low cost without increase of the number of processes.Type: ApplicationFiled: February 26, 2003Publication date: October 2, 2003Inventors: Kazuhiro Mochizuki, Kiyoshi Ouchi, Tomonori Tanoue
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Publication number: 20030102924Abstract: A power amplifier module comprises a plurality of amplifier stages, each including a reference amplifier for emulating the operation of the amplifier. The current flowing to the base of a bipolar transistor that forms each reference amplifier depending on an input power level is detected, amplified, and supplied as base current of the transistor of the corresponding amplifier.Type: ApplicationFiled: November 21, 2002Publication date: June 5, 2003Inventors: Hidetoshi Matsumoto, Tomonori Tanoue, Satoshi Tanaka, Kiichi Yamashita
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Publication number: 20030076174Abstract: In a radio frequency amplifier, a value of a matching device is changed in one matching circuit so as to constitute a matching circuit which realizes a load impedance optimized by a plurality of frequency bands, outputs, and signal modulation systems. When the matching device value is changed, a plurality of devices are connected onto the matching circuit via a micro mechanical switch. Alternatively, two points disposed apart from each other on a transmission line are connected using a micro mechanical switch. The micro mechanical switch is controlled to be on/off so that a device value or transmission line length is changed.Type: ApplicationFiled: October 18, 2002Publication date: April 24, 2003Inventors: Tomonori Tanoue, Kenji Sekine, Akira Kuriyama
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Publication number: 20030060172Abstract: A radio frequency module includes a first circuit board and a second circuit board. A first circuit element group is placed in a cavity formed on the upper surface of the first circuit board, and a second circuit element group is placed on the upper surface of the second circuit board. The first and second circuit boards are provided with terminal electrodes by which electrical connection is established. The radio frequency module is formed by vertically connecting the two circuit boards together. Heat emitted by the first circuit element group is transferred to a heat radiation section, which is formed on the lower surface of the first circuit board, via through-holes connecting the bottom of the cavity with the heat radiation section.Type: ApplicationFiled: September 24, 2002Publication date: March 27, 2003Inventors: Akira Kuriyama, Tomonori Tanoue, Kenji Sekine, Masami Ohnishi, Osamu Kagaya, Atsushi Isobe
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Publication number: 20030048132Abstract: To provide a small-sized high frequency power amplifier for preventing oscillation by a small number of switching circuits and outputting high power and low power with high efficiencies, a high frequency power amplifier module and a portable telephone, the high frequency power amplifier is constituted by an amplifying circuit A and an amplifying circuit B connected in parallel, a size of a transistor at an output stage of the amplifying circuit B is made to be equal to or smaller than ¼ of a size of a transistor of an output stage of the amplifying circuit A and a switching circuit is connected between a signal line forward from the output stage of the amplifying circuit A and a ground terminal.Type: ApplicationFiled: July 11, 2002Publication date: March 13, 2003Applicant: Hitachi, LtdInventors: Osamu Kagaya, Masami Ohnishi, Kenji Sekine, Tomonori Tanoue
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Publication number: 20030048133Abstract: To provide a high frequency amplifying apparatus for reducing a phase change caused in switching to a different output level, a variable phase shifter is provided at at least one location of respective paths rearward from a branching circuit for switching a path on a high output side having an amplifier using a first semiconductor device at an output stage and a path on a low output side having an amplifier using a second semiconductor device with a smaller output than the first semiconductor device on an output stage in accordance with a desired output level. After branching and a phase length of the variable phase shifter is set to a pre-determined value such that passing phase lengths of the respective paths become substantially the same by passing either of the paths.Type: ApplicationFiled: August 19, 2002Publication date: March 13, 2003Inventors: Kenji Sekine, Tomonori Tanoue, Osamu Kagaya
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Publication number: 20030025555Abstract: The present invention provides a radio frequency power amplifier which may not introduce radio frequency loss during switching power amplifier units between high and low output power levels. By connecting a first-stage matching network M12 and first-stage matching network M13 to respective output nodes of a power amplifier unit A11 and power amplifier unit A12 that either one operate by switching, connecting the output nodes of the first-stage matching network M12 and M13 in parallel, connecting a last-stage matching network M11 between the junction of M12 and M13 and the output terminal OUT, the first-stage matching networks M12, M13, and last-stage matching network M11 are formed, for both power amplifier units A11 and A12, so that impedance matching is established between the output terminal OUT and the power amplifier unit in operation when one unit is in operation the other is in stop of operation.Type: ApplicationFiled: June 5, 2002Publication date: February 6, 2003Applicant: Hitachi, Ltd.Inventors: Masami Ohnishi, Hidetoshi Matsumoto, Tomonori Tanoue, Osamu Kagaya, Kenji Sekine
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Publication number: 20020024390Abstract: There is provided a power amplifier module which is provided with a function of protecting an amplifying device against destruction caused by a standing wave by reflection from an antenna end in load variation, having a high tolerance level of device destruction and is highly efficient.Type: ApplicationFiled: August 20, 2001Publication date: February 28, 2002Applicant: Hitachi, Ltd.Inventors: Kiichi Yamashita, Tomonori Tanoue, Isao Ohbu, Kenji Sekine
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Patent number: 5949097Abstract: The present invention relates to a contact structure not only for a semiconductor device having a hetero-junction bipolar transistor or a hetero-insulated gate field effect transistor but also for semiconductor devices at large. In a semiconductor layer of a polycrystalline or amorphous undoped III-V compound semiconductor or an alloy thereof, a through hole is formed for contact. The size of the through hole is set to permit exposure of at least part of a first conductor layer and a dielectric layer, such as an Si compound, present around the first conductor layer, and a second conductor layer is formed within the through hole so as to contact the first conductor layer. Since the semiconductor layer can be subjected to a selective dry etching for the dielectric layer, the dielectric layer is not etched at the time of forming the above through hole in the semiconductor layer.Type: GrantFiled: September 17, 1997Date of Patent: September 7, 1999Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Co.Inventors: Koji Hirata, Tomonori Tanoue, Hiroshi Masuda, Hiroyuki Uchiyama, Kazuhiro Mochizuki
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Patent number: 5604835Abstract: An integrated optical waveguide device includes a substrate, and an optical waveguide which is formed in the form of projection or is formed in a trench formed in the substrate. Each optical waveguide has a first optical area made of a first optical material and a second optical area which is made of a second optical material and is surrounded by the first optical area. The optical waveguides are arranged on both side faces of the projection or trench.Type: GrantFiled: December 22, 1994Date of Patent: February 18, 1997Assignee: Hitachi, Ltd.Inventors: Tohru Nakamura, Tomonori Tanoue, Takeshi Kato, Mitsuo Takeda
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Patent number: 5598015Abstract: A hetero-junction bipolar transistor having an emitter composed of a semiconductor having a wider forbidden band width than that of a semiconductor constituting a base is disclosed. In the transistor, the emitter and the electrode leader area composed of a single crystalline semiconductor are provided being extended from the upper part of the emitter to the surface of the base through an insulating layer, for the purpose of making it possible to miniaturize the transistor and to operate the transistor at a high-speed by decreasing the emitter resistance.Type: GrantFiled: December 15, 1994Date of Patent: January 28, 1997Assignee: Hitachi, Ltd.Inventors: Tomonori Tanoue, Hiroshi Masuda, Tohru Nakamura, Takahiro Onai, Katsuyoshi Washio
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Patent number: 5481120Abstract: Disclosed is a semiconductor device using a polycrystalline compound semiconductor with a low resistance as a low resistance layer, and its fabrication method. The above polycrystalline compound semiconductor layer is doped with C or Be as impurities in a large amount, and is extremely low in resistance. The polycrystalline compound semiconductor layer is formed by either of a molecular beam epitaxy method, an organometallic vapor phase epitaxy method and an organometallic molecular beam epitaxy method under the condition that a substrate temperature is 450.degree. C. or less and the ratio of partial pressure of a V-group element to a III-group element is 50 or more.Type: GrantFiled: December 10, 1993Date of Patent: January 2, 1996Assignee: Hitachi, Ltd.Inventors: Kazuhiro Mochizuki, Tomoyoshi Mishima, Tohru Nakamura, Hiroshi Masuda, Tomonori Tanoue, Tooru Haga, Yoshihisa Fujisaki
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Patent number: 5381027Abstract: This invention discloses a heterojunction type field effect transistor such as 2DEG-FET and a heterojunction type bipolar transistor such as 2DEG-HBT. The former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by intoduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators, metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered. The latter is fabricated by applying either of the techniques described above to a base ohmic contact region. These semiconductor devices can reduce the source-gate resistance and the parasitic base resistance.Type: GrantFiled: October 12, 1993Date of Patent: January 10, 1995Assignee: Hitachi, Ltd.Inventors: Toshiyuki Usagawa, Kenji Hiruma, Masahiko Kawata, Shigeo Goto, Katsuhiko Mitani, Masao Yamane, Susumu Takahashi, Tomonori Tanoue, Yoshinori Imamura
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Patent number: 5258631Abstract: This invention discloses a heterojunction type field effect transistor such as 2DEG-FET and a heterojunction type bipolar transistor such as 2DEG-HBT. The former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by introduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators, metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered. The latter is fabricated by applying either of the techniques described above to a base ohmic contact region. These semiconductor devices can reduce the source-gate resistance and the parasitic base resistance.Type: GrantFiled: May 18, 1992Date of Patent: November 2, 1993Assignee: Hitachi, Ltd.Inventors: Toshiyuki Usagawa, Kenji Hiruma, Masahiko Kawata, Shigeo Goto, Katsuhiko Mitani, Masao Yamane, Susumu Takahashi, Tomonori Tanoue, Yoshinori Imamura