Patents by Inventor Tomoyuki Ikeda

Tomoyuki Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11715698
    Abstract: A wiring substrate includes a core substrate, and a build-up part formed on the core substrate and including insulating layers and conductor layers. The conductor layers include one or more conductor layers each having a first wiring and a second wiring such that the second wiring has a conductor thickness smaller than a conductor thickness of the first wiring and that a minimum value of a line width of a wiring pattern of the second wiring is smaller than a minimum value of a line width of a wiring pattern of the first wiring.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: August 1, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Tomoyuki Ikeda, Yoshinori Takenaka
  • Publication number: 20230069980
    Abstract: A method for manufacturing a wiring substrate includes forming a resin insulating layer on a first conductor layer such that the resin insulating layer covers the first conductor layer, applying a roughening treatment on a surface of the resin insulating layer on the opposite side with respect to the first conductor layer, forming an opening in the resin insulating layer after the roughening treatment on the surface of the resin insulating layer such that the opening penetrates through the resin insulating layer and exposes a portion of the first conductor layer, and forming a second conductor layer on the surface of the resin insulating layer such that the second conductor layer is formed in contact with the surface of the resin insulating layer and that a via conductor is formed in the opening of the resin insulating layer.
    Type: Application
    Filed: August 29, 2022
    Publication date: March 9, 2023
    Applicant: IBIDEN CO., LTD.
    Inventors: Tomoyuki IKEDA, Keisuke SHIMIZU, Hiroyuki WATANABE
  • Publication number: 20230076560
    Abstract: A semiconductor package includes a printed wiring board, a logic IC mounted on a first surface of the board, a connector mounted on a second surface of the board on the opposite side with respect to the first surface, an optical element that converts an optical signal and an electrical signal and positioned on the opposite side with respect to the first surface such that the optical element is at least partially embedded in the board, a path that is formed in the board and electrically connects the logic IC on the first surface and the optical element on the opposite side with respect to the first surface, and an optical waveguide that is embedded on the opposite side with respect to the first surface and optically connects the connector on the second surface and the optical element on the opposite side with respect to the first surface.
    Type: Application
    Filed: August 23, 2022
    Publication date: March 9, 2023
    Applicant: IBIDEN CO., LTD.
    Inventors: Keisuke SHIMIZU, Tomoyuki IKEDA
  • Publication number: 20220404564
    Abstract: A semiconductor package includes a printed wiring board, a logic IC mounted on the printed wiring board, a connector mounted on the printed wiring board, an optical element that is accommodated inside the printed wiring board and converts an optical signal to an electrical signal and/or the electrical signal to the optical signal, an optical waveguide formed between the optical element inside the printed wiring board and the connector on the printed wiring board such that the optical waveguide optically connects the optical element and the connector, and an electrical path formed between the optical element and the logic IC such that the electrical path connects the logic IC and the optical element and that a length of the electrical path is 1 mm or less.
    Type: Application
    Filed: May 25, 2022
    Publication date: December 22, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Keisuke SHIMIZU, Tomoyuki IKEDA
  • Publication number: 20220377883
    Abstract: A printed wiring board includes resin insulating layers, and conductor layers including a conductor layer such that the conductor layer includes a conductor circuit and that the conductor circuit has a surface index X/Y in a range of 1.00 to 2.20 where X is a length of an outer circumference of cross section of the conductor circuit, and Y is a length of an outer circumference of a reference quadrangle in the cross section of the conductor circuit. The reference quadrangle has a first reference line drawn with reference to bottom of deepest recess on first side, a second reference line is drawn with reference to bottom of deepest recess on second side, a third reference line is drawn with reference to bottom of deepest recess on third side, and a fourth reference line is drawn with reference to bottom of deepest recess on fourth side of the outer circumference.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 24, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Shigeto IYODA, Tomoyuki IKEDA
  • Publication number: 20220377884
    Abstract: A printed wiring board includes resin insulating layers, and conductor layers laminated on the resin insulating layers, respectively. The conductor layers includes a conductor layer including a conductor circuit formed such that the conductor circuit has recesses each having a depth of 2.0 ?m or more and a bottom whose diameter is larger than a diameter of an opening part of a respective one of the recesses.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 24, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Shigeto IYODA, Tomoyuki IKEDA
  • Publication number: 20220369456
    Abstract: A wiring substrate includes a first insulating layer, a conductor layer formed on the first insulating layer, a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer, and a coating film formed on a surface of the conductor layer such that the coating film is adhering the conductor layer and the second insulating layer. The conductor layer includes a conductor pad and a wiring pattern, and the conductor pad of the conductor layer has a mounting surface including a first region and a component mounting region formed such that the second insulating layer has a through hole exposing the component mounting region and that the first region is covered by the second insulating layer and roughened to have a surface roughness higher than a first surface roughness of a surface of the wiring pattern facing the second insulating layer.
    Type: Application
    Filed: April 27, 2022
    Publication date: November 17, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Tomoyuki IKEDA, Kentaro WADA
  • Publication number: 20220223532
    Abstract: A wiring substrate includes a core substrate, and a build-up part formed on the core substrate and including insulating layers and conductor layers. The conductor layers include one or more conductor layers each having a first wiring and a second wiring such that the second wiring has a conductor thickness smaller than a conductor thickness of the first wiring and that a minimum value of a line width of a wiring pattern of the second wiring is smaller than a minimum value of a line width of a wiring pattern of the first wiring.
    Type: Application
    Filed: January 6, 2022
    Publication date: July 14, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Tomoyuki IKEDA, Yoshinori TAKENAKA
  • Patent number: 11277910
    Abstract: A wiring substrate includes a multilayer core substrate including a core layer, core conductor layers, and core insulating layers, a first laminate formed on first surface of the substrate and including insulating layers and conductor layers such that each insulating layer includes resin without reinforcing material, and a second laminate formed on second surface of the substrate and including insulating layers and conductor layers such that each insulating layer includes resin without reinforcing material.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: March 15, 2022
    Assignee: IBIDEN CO., LTD.
    Inventors: Shigemitsu Kunikane, Tomoyuki Ikeda
  • Patent number: 11089674
    Abstract: A wiring substrate includes a substrate including conductor layers and core insulating layers, and a laminate including insulating layers and conductor layers such that the conductor layers include first layer including first line pattern. The laminate includes first strip line including the first pattern, a pair of interlayer insulating layers sandwiching the first pattern, and a pair of conductor layers sandwiching the interlayer layers, the conductor layers in the substrate include second layer including second line pattern such that the substrate includes second strip line including the second pattern, a pair of core insulating layers sandwiching the second pattern, and a pair of conductor layers sandwiching the core insulating layers, and the pair of core insulating layers is thicker than the pair of interlayer layers, the second pattern is thicker than the first pattern, and line width of the second pattern is larger than line width of the first pattern.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: August 10, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Tomoyuki Ikeda, Shigemitsu Kunikane
  • Publication number: 20210045238
    Abstract: A wiring substrate includes a multilayer core substrate including a core layer, core conductor layers, and core insulating layers, a first laminate formed on first surface of the substrate and including insulating layers and conductor layers such that each insulating layer includes resin without reinforcing material, and a second laminate formed on second surface of the substrate and including insulating layers and conductor layers such that each insulating layer includes resin without reinforcing material.
    Type: Application
    Filed: July 29, 2020
    Publication date: February 11, 2021
    Applicant: IBIDEN CO., LTD.
    Inventors: Shigemitsu Kunikane, Tomoyuki Ikeda
  • Publication number: 20200389969
    Abstract: A wiring substrate includes a substrate including conductor layers and core insulating layers, and a laminate including insulating layers and conductor layers such that the conductor layers include first layer including first line pattern. The laminate includes first strip line including the first pattern, a pair of interlayer insulating layers sandwiching the first pattern, and a pair of conductor layers sandwiching the interlayer layers, the conductor layers in the substrate include second layer including second line pattern such that the substrate includes second strip line including the second pattern, a pair of core insulating layers sandwiching the second pattern, and a pair of conductor layers sandwiching the core insulating layers, and the pair of core insulating layers is thicker than the pair of interlayer layers, the second pattern is thicker than the first pattern, and line width of the second pattern is larger than line width of the first pattern.
    Type: Application
    Filed: June 4, 2020
    Publication date: December 10, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Tomoyuki IKEDA, Shigemitsu KUNIKANE
  • Patent number: 10344661
    Abstract: A radiator chamber is provided in a top compartment of a package, whereas an engine is provided in a bottom compartment. Outside the package, a battery unit is attached to an external wall panel (e.g., lower panel) of the bottom compartment. The battery unit includes a dedicated unit ventilation fan and a unit ventilating section that introduces outside air into an enclosure of the battery unit. The enclosure has a lower portion thereof divided to accommodate a package ventilating section that ventilates the bottom compartment of the package. There is provided a detachable bottom compartment inspection window in the external wall panel below the battery unit.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: July 9, 2019
    Assignee: YANMAR CO., LTD.
    Inventors: Tomoyuki Ikeda, Satoshi Abe, Yosuke Tahara
  • Patent number: 10291100
    Abstract: A package has its internal space divided into a top compartment and a bottom compartment. The bottom compartment contains the engine. The top compartment is further divided by a partition wall into a first top compartment (e.g., a radiator chamber) and a second top compartment (e.g., a device installation chamber). The partition wall has a spatial connection port. The second top compartment has an external wall panel (e.g., the rear, upper panel) located facing the spatial connection port, the external wall panel having a vent (e.g., a gallery) formed therethrough. There is provided a duct-shaped heatsink to deliver outside air introduced through the vent to the spatial connection port. Electric components, such as an inverter, are disposed directly on an external surface of the heatsink (on the top face).
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: May 14, 2019
    Assignee: YANMAR CO., LTD.
    Inventors: Tomoyuki Ikeda, Satoshi Abe, Yosuke Tahara
  • Patent number: 9807885
    Abstract: A wiring board includes electronic components, a multilayer core substrate including insulating layers and conductive layers such that the insulating layers include a central insulating layer in the center position of the core in the thickness direction, a first build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core, and a second build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core. The core has cavities accommodating the electronic components, respectively, and including a first cavity and a second cavity such that the first and second cavities have different lengths in the thickness direction and are penetrating through the central layer at centers of the first and second cavities in the thickness direction.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: October 31, 2017
    Assignee: IBIDEN CO., LTD.
    Inventors: Kenji Sakai, Tomoyuki Ikeda, Toshiki Furutani
  • Publication number: 20160316566
    Abstract: A wiring board includes electronic components, a multilayer core substrate including insulating layers and conductive layers such that the insulating layers include a central insulating layer in the center position of the core in the thickness direction, a first build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core, and a second build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core. The core has cavities accommodating the electronic components, respectively, and including a first cavity and a second cavity such that the first and second cavities have different lengths in the thickness direction and are penetrating through the central layer at centers of the first and second cavities in the thickness direction.
    Type: Application
    Filed: April 26, 2016
    Publication date: October 27, 2016
    Applicant: IBIDEN CO., LTD.
    Inventors: Kenji SAKAI, Tomoyuki IKEDA, Toshiki FURUTANI
  • Publication number: 20160090893
    Abstract: A radiator chamber is provided in a top compartment of a package, whereas an engine is provided in a bottom compartment. Outside the package, a battery unit is attached to an external wall panel (e.g., lower panel) of the bottom compartment. The battery unit includes a dedicated unit ventilation fan and a unit ventilating section that introduces outside air into an enclosure of the battery unit. The enclosure has a lower portion thereof divided to accommodate a package ventilating section that ventilates the bottom compartment of the package. There is provided a detachable bottom compartment inspection window in the external wall panel below the battery unit.
    Type: Application
    Filed: July 27, 2015
    Publication date: March 31, 2016
    Inventors: Tomoyuki Ikeda, Satoshi Abe, Yosuke Tahara
  • Publication number: 20160043611
    Abstract: A package has its internal space divided into a top compartment and a bottom compartment. The bottom compartment contains the engine. The top compartment is further divided by a partition wall into a first top compartment (e.g., a radiator chamber) and a second top compartment (e.g., a device installation chamber). The partition wall has a spatial connection port. The second top compartment has an external wall panel (e.g., the rear, upper panel) located facing the spatial connection port, the external wall panel having a vent (e.g., a gallery) formed therethrough. There is provided a duct-shaped heatsink to deliver outside air introduced through the vent to the spatial connection port. Electric components, such as an inverter, are disposed directly on an external surface of the heatsink (on the top face).
    Type: Application
    Filed: July 27, 2015
    Publication date: February 11, 2016
    Inventors: Tomoyuki Ikeda, Satoshi Abe, Yosuke Tahara
  • Publication number: 20150216055
    Abstract: A method for manufacturing a printed wiring board including providing a starting material including an insulating resin substrate having first and second surfaces, irradiating laser upon the first surface of the insulating resin substrate such that a first opening portion having an opening on the first surface is formed, irradiating laser upon the second surface of the insulating resin substrate such that a second opening portion having an opening on the second surface and communicated to the first opening portion is formed and that a penetrating-hole having the first and second opening portions is formed, forming a first conductor on the first surface of the insulating resin substrate, forming a second conductor on the second surface of the insulating resin substrate, and forming a through hole conductor structure in the penetrating-hole to electrically connecting the first conductor and the second conductor.
    Type: Application
    Filed: April 10, 2015
    Publication date: July 30, 2015
    Applicant: IBIDEN CO., LTD.
    Inventor: Tomoyuki IKEDA
  • Patent number: 9040843
    Abstract: A multilayered printed circuit board including a substrate, a multilayered structure formed on the substrate and including multiple conductor circuits and multiple interlaminar resin insulating layers, and a stack-via structure having multiple via-holes and formed in the multilayered structure such that the via-holes are piled through the interlaminar resin insulating layers in the multilayered structure. The interlaminar resin insulating layers include an outermost interlaminar resin insulating layer forming an outermost layer of the interlaminar resin insulating layers and having a coefficient of linear expansion which is equal to or smaller than coefficients of linear expansion of the interlaminar resin insulating layers other than the outermost interlaminar resin insulating layer.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: May 26, 2015
    Assignee: IBIDEN CO., LTD.
    Inventors: Yukihiko Toyoda, Yoichiro Kawamura, Tomoyuki Ikeda