Patents by Inventor Tomoyuki Ikeda

Tomoyuki Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100089632
    Abstract: A printed wiring board has an insulating resin substrate having a first surface and a second surface, the insulating resin substrate having one or more penetrating-holes passing through the insulating resin substrate from the first surface to the second surface, a first conductor formed on the first surface of the insulating resin substrate, a second conductor formed on the second surface of the insulating resin substrate, and a through-hole conductor structure formed in the penetrating-hole of the insulating resin substrate and electrically connecting the first conductor and the second conductor. The penetrating-hole has a first portion having an opening on the first surface and a second portion having an opening on the second surface. The first portion and the second portion are connected such that the first portion and the second portion are set off from each other.
    Type: Application
    Filed: December 18, 2009
    Publication date: April 15, 2010
    Applicant: IBIDEN, CO., LTD
    Inventor: Tomoyuki Ikeda
  • Publication number: 20080257591
    Abstract: A printed wiring board has an insulating resin substrate having a first surface and a second surface, the insulating resin substrate having one or more penetrating-holes passing through the insulating resin substrate from the first surface to the second surface, a first conductor formed on the first surface of the insulating resin substrate, a second conductor formed on the second surface of the insulating resin substrate, and a through-hole conductor structure formed in the penetrating-hole of the insulating resin substrate and electrically connecting the first conductor and the second conductor. The penetrating-hole has a first portion having an opening on the first surface and a second portion having an opening on the second surface. The first portion and the second portion are connected such that the first portion and the second portion are set off from each other.
    Type: Application
    Filed: May 5, 2008
    Publication date: October 23, 2008
    Applicant: IBIDEN, CO., LTD.
    Inventor: Tomoyuki IKEDA
  • Publication number: 20080190658
    Abstract: An object of the present invention is to provide a multilayered printed circuit board having a short wiring distance of the conductor circuits, wide option of the design of the conductor circuits and additionally excellent in reliability since cracking scarcely takes place in the interlaminar resin insulating layers in the vicinity of via-holes. The present invention is a multilayered printed circuit board comprising: a conductor circuit and an interlaminar resin insulating layer serially formed on a substrate in alternate fashion and in repetition, wherein a connection of the conductor circuits through the interlaminar resin insulating layers is performed by a via-hole, wherein via-holes in different level layers among the via-holes are formed so as to form a stack-via structure, and wherein at least one of the land diameters of the above-mentioned via-holes in different level layers having the stack via structure is different from the land diameters of other via-holes.
    Type: Application
    Filed: April 9, 2008
    Publication date: August 14, 2008
    Applicant: IBIDEN Co., LTD
    Inventors: Yukihiko TOYODA, Yoichiro Kawamura, Tomoyuki Ikeda
  • Patent number: 7378602
    Abstract: A multilayer core board 10 includes tapered first via hole conductors 51 extending from the outer surface of a first insulating layer 24 to conductive portions 42a of a power source layer 42, second via hole conductors 52 extending from the outer surface of a second insulating layer 26 to the conductive portions 42a of the power source layer 42, tapered third via hole conductors 53 extending form the outer surface of the second insulating layer 26 to conductive portions 40a of a ground layer 40, and fourth via hole conductors 54 extending from the outer surface of a center insulating layer 22 to the conductive portions 40a of the ground layer 40. The first via hole conductors 51 are tapered, and thus the interval distance to the adjacent first via hole conductor 51 is shorter than straight-shaped first via hole conductors, and thus the pitch of the first via hole conductor 51 at the positive pole side and the fourth via hole conductor 54 at the negative pole side can be sufficiently reduced.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: May 27, 2008
    Assignee: Ibiden Co., Ltd.
    Inventor: Tomoyuki Ikeda
  • Patent number: 7371974
    Abstract: A multilayered printed circuit board includes a substrate and, as serially built up thereon, a conductor circuit and an interlaminar resin insulating layer in an alternate fashion and in repetition. The conductor circuits between which the interlaminar resin insulating layer is sandwiched are connected by a via-hole. The via-hole includes at least one of Cu, Ni, Pd, Co, W and their alloys. Via-holes in different level layers among the via-holes are formed so as to form the stack-via structure. At least one of the land diameters of the via-holes in different level layers is different from the land diameters of other via-holes in different level layers.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: May 13, 2008
    Assignee: Ibiden Co., Ltd.
    Inventors: Yukihiko Toyoda, Yoichiro Kawamura, Tomoyuki Ikeda
  • Publication number: 20080107863
    Abstract: A multilayered printed wiring board includes a multilayered core substrate having multiple insulation layers and one or more stacked via structure formed through the multiple insulation layers, and a build-up structure formed over the multilayered core substrate and including multiple interlaminar insulation layers and multiple conductor circuits. The stacked via structure has multiple vias formed in the multiple insulation layers, respectively. Each of the interlaminar insulation layers includes a resin material without a core material. The multiple insulation layers in the multilayered core substrate have three or more insulation layers and each of the insulation layers in the multilayered core substrate includes a core material impregnated with a resin.
    Type: Application
    Filed: November 5, 2007
    Publication date: May 8, 2008
    Applicant: IBIDEN CO., LTD
    Inventors: Tomoyuki Ikeda, Naoaki Fujii, Seiji Izawa
  • Publication number: 20070271783
    Abstract: A multilayer core board 10 includes tapered first via hole conductors 51 extending from the outer surface of a first insulating layer 24 to conductive portions 42a of a power source layer 42, second via hole conductors 52 extending from the outer surface of a second insulating layer 26 to the conductive portions 42a of the power source layer 42, tapered third via hole conductors 53 extending from the outer surface of the second insulating layer 26 to conductive portions 40a of a ground layer 40, and fourth via hole conductors 54 extending from the outer surface of a center insulating layer 22 to the conductive portions 40a of the ground layer 40. The first via hole conductors 51 are tapered, and thus the interval distance to the adjacent first via hole conductor 51 is shorter than straight-shaped first via hole conductors, and thus the pitch of the first via hole conductor 51 at the positive pole side and the fourth via hole conductor 54 at the negative pole side can be sufficiently reduced.
    Type: Application
    Filed: August 1, 2007
    Publication date: November 29, 2007
    Applicant: IBIDEN CO., LTD.
    Inventor: Tomoyuki IKEDA
  • Publication number: 20060083895
    Abstract: A multilayer core board 10 includes tapered first via hole conductors 51 extending from the outer surface of a first insulating layer 24 to conductive portions 42a of a power source layer 42, second via hole conductors 52 extending from the outer surface of a second insulating layer 26 to the conductive portions 42a of the power source layer 42, tapered third via hole conductors 53 extending form the outer surface of the second insulating layer 26 to conductive portions 40a of a ground layer 40, and fourth via hole conductors 54 extending from the outer surface of a center insulating layer 22 to the conductive portions 40a of the ground layer 40. The first via hole conductors 51 are tapered, and thus the interval distance to the adjacent first via hole conductor 51 is shorter than straight-shaped first via hole conductors, and thus the pitch of the first via hole conductor 51 at the positive pole side and the fourth via hole conductor 54 at the negative pole side can be sufficiently reduced.
    Type: Application
    Filed: October 11, 2005
    Publication date: April 20, 2006
    Applicant: IBIDEN CO., LTD.
    Inventor: Tomoyuki Ikeda
  • Publication number: 20030178229
    Abstract: An object of the present invention is to provide a multilayered printed circuit board having a short wiring distance of the conductor circuits, wide option of the design of the conductor circuits and additionally excellent in reliability since cracking scarcely takes place in the interlaminar resin insulating layers in the vicinity of via-holes. The present invention is a multilayered printed circuit board comprising: a conductor circuit and an interlaminar resin insulating layer serially formed on a substrate in alternate fashion and in repetition, wherein a connection of the conductor circuits through the interlaminar resin insulating layers is performed by a via-hole, wherein via-holes in different level layers among the via-holes are formed so as to form a stack-via structure, and wherein at least one of the land diameters of the above-mentioned via-holes in different level layers having the stack via structure is different from the land diameters of other via-holes.
    Type: Application
    Filed: May 7, 2003
    Publication date: September 25, 2003
    Inventors: Yukihiko Toyoda, Yoichiro Kawamura, Tomoyuki Ikeda
  • Patent number: 6254973
    Abstract: Fluorine-containing polyfunctional (meth)acrylate represented by the formula (1), a monomer composition containing the (meth)acrylate, a low refractivity material prepared by curing the monomer composition, and a reflection reducing film provided with the low refractivity material. wherein R1, R2, R3, and R4 are the same or different groups, and each stands for a hydrogen atom, an acryloyl group, or a methacryloyl group, at least one of R1 and R2 and at least one of R3 and R4 stand for an acryloyl group or a methacryloyl group, R stands for a fluoroalkylene group having 2 to 12 carbon atoms and 2 or more fluorine atoms.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: July 3, 2001
    Assignee: NOF Corporation
    Inventors: Tatsurou Yoshida, Yasuhiro Kimura, Kenji Watanabe, Tomoyuki Ikeda, Tetsuya Itoh, Yoshitaka Goto
  • Patent number: 6087010
    Abstract: Fluorine-containing polyfunctional (meth)acrylate represented by the formula (1), as well as a composition, a low refractivity material and a reflection reducing film in which the (meth)acrylate is utilized: ##STR1## wherein X stands for a fluoroalkyl group of C1-14 having 3 or more F, or a fluorocycloalkyl group of C3-14 having 4 or more F; Y.sup.1, Y.sup.2, and Y.sup.3 stand for H, an acryloyl group or a methacryloyl group, and at least two of Y.sup.1, Y.sup.2, and Y.sup.3 stand for an acryloyl group or a methacryloyl group; Z stands for H or an alkyl group of C1-3; and n and m is an integer of 0 or 1, and n+m=1.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: July 11, 2000
    Assignee: NOF Corporation
    Inventors: Tatsurou Yoshida, Yasuhiro Kimura, Kenji Watanabe, Tomoyuki Ikeda, Tetsuya Itoh, Yoshitaka Goto