Patents by Inventor Tomoyuki Yamazaki
Tomoyuki Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8531007Abstract: A semiconductor device is disclosed which includes active section 100, edge termination section 110 having a voltage blocking structure and disposed around active section 100, and separation section 120 having a device separation structure and disposed around edge termination section 110. A surface device structure is formed on the first major surface of active section 100, trench 23 is formed in separation section 120 from the second major surface side, and p+-type separation region 24 is formed on the side wall of trench 23 such that p+-type separation region 24 is in contact with p-type channel stopper region 21 formed in the surface portion on the first major surface side and p-type collector layer 9 formed in the surface portion on the second major surface side. The semiconductor device and the method for manufacturing the semiconductor device according to the invention facilitate preventing the reverse blocking voltage from decreasing and shorten the manufacturing time of the semiconductor device.Type: GrantFiled: May 20, 2010Date of Patent: September 10, 2013Assignees: Octec, Inc., Fuji Electric Co., Ltd.Inventors: Katsuya Okumura, Hiroki Wakimoto, Kazuo Shimoyama, Tomoyuki Yamazaki
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Publication number: 20120193749Abstract: In a semiconductor device having a pn-junction diode structure that includes anode diffusion region including edge area, anode electrode on anode diffusion region, and insulator film on edge area of anode diffusion region, the area of anode electrode above anode diffusion region with insulator film interposed between anode electrode and anode diffusion region is narrower than the area of insulator film on edge area of anode diffusion region.Type: ApplicationFiled: April 16, 2012Publication date: August 2, 2012Applicant: Fuji Electric Device Technology Co., Ltd.Inventors: Ryouichi KAWANO, Tomoyuki Yamazaki, Michio Nemoto, Mituhiro Kakefu
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Patent number: 8178941Abstract: In a semiconductor device having a pn-junction diode structure that includes anode diffusion region including edge area, anode electrode on anode diffusion region, and insulator film on edge area of anode diffusion region, the area of anode electrode above anode diffusion region with insulator film interposed between anode electrode and anode diffusion region is narrower than the area of insulator film on edge area of anode diffusion region.Type: GrantFiled: July 22, 2009Date of Patent: May 15, 2012Assignee: Fuji Electric Co., Ltd.Inventors: Ryouichi Kawano, Tomoyuki Yamazaki, Michio Nemoto, Mituhiro Kakefu
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Publication number: 20120018100Abstract: A fractionating and refining device includes a solution sending flow path for supplying a solution including a fractionated target component from a tip end thereof, a gas supply flow path for supplying gas from a tip end thereof, a collecting vessel, and a warming mechanism for warming the collecting vessel to such a temperature as to facilitate evaporation of a solvent in the solution in the vessel. The collecting vessel includes a vessel main body having a bottom and a lid which closes an opening portion of the vessel main body and which can be opened and closed.Type: ApplicationFiled: March 31, 2009Publication date: January 26, 2012Applicant: Shimadzu CorporationInventors: Yosuke Iwata, Tomoyuki Yamazaki
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Patent number: 8089134Abstract: A semiconductor device equipped with a primary semiconductor element and a temperature detecting element for detecting a temperature of the primary semiconductor element. The device includes a first semiconductor layer of a first conductivity type that forms the primary semiconductor element. A second semiconductor region of a second conductivity type is provided in the first semiconductor layer. A third semiconductor region of the first conductivity type is provided in the second semiconductor region. The temperature detecting element is provided in the third semiconductor region and is separated from the first semiconductor layer by a PN junction.Type: GrantFiled: January 30, 2009Date of Patent: January 3, 2012Assignee: Fuji Electric Sytems Co., Ltd.Inventors: Koh Yoshikawa, Tomoyuki Yamazaki, Yuichi Onozawa
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Patent number: 8004037Abstract: A surface between gate electrodes in an MOS gate structure is patterned so that missing portions are partially provided in surfaces of n+ emitter regions to thereby enlarge surface areas of p+ contact regions surrounded by the surfaces of the n+ emitter regions. In this manner, a highly reliable MOS type semiconductor device is provided which is improved in breakdown tolerance by suppressing an increase in the gain of a parasitic transistor caused by photo pattern defects produced easily in accordance with minute patterning in a process design rule.Type: GrantFiled: June 5, 2009Date of Patent: August 23, 2011Assignee: Fuji Electric Co., Ltd.Inventor: Tomoyuki Yamazaki
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Publication number: 20110198272Abstract: The present invention aims at providing a preparative separation/purification system for vaporizing an eluate in a short period of time, while enhancing the efficiency of collecting the target substance by accelerating the initiation of collecting the eluate.Type: ApplicationFiled: February 10, 2011Publication date: August 18, 2011Applicant: SHIMADZU CORPORATIONInventor: Tomoyuki YAMAZAKI
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Publication number: 20110006403Abstract: A semiconductor device is disclosed which includes active section 100, edge termination section 110 having a voltage blocking structure and disposed around active section 100, and separation section 120 having a device separation structure and disposed around edge termination section 110. A surface device structure is formed on the first major surface of active section 100, trench 23 is formed in separation section 120 from the second major surface side, and p+-type separation region 24 is formed on the side wall of trench 23 such that p+-type separation region 24 is in contact with p-type channel stopper region 21 formed in the surface portion on the first major surface side and p-type collector layer 9 formed in the surface portion on the second major surface side. The semiconductor device and the method for manufacturing the semiconductor device according to the invention facilitate preventing the reverse blocking voltage from decreasing and shorten the manufacturing time of the semiconductor device.Type: ApplicationFiled: May 20, 2010Publication date: January 13, 2011Applicant: FUJI ELECTRIC SYSTEMS CO. LTD.Inventors: Katsuya OKUMURA, Hiroki WAKIMOTO, Kazuo SHIMOYAMA, Tomoyuki YAMAZAKI
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Patent number: 7859315Abstract: A driver circuit facilitates reducing noises and losses and improving the driving performances thereof without connecting a series circuit of capacitor and a resistor to the gate of IGBT. The driver circuit includes a slope setting circuit that sets the gate voltage waveform of IGBT; and an operational amplifier that includes a non-inverting input terminal, to which an output voltage V* from slope setting circuit is inputted, and an inverting input terminal, to which a divided voltage Vgsf divided by resistors is inputted; and the operational amplifier outputs an output voltage Vout, proportional to the difference between the output voltage V* and the divided voltage Vgsf, to the gate of IGBT.Type: GrantFiled: December 8, 2008Date of Patent: December 28, 2010Assignee: Fuji Electric Systems Co., Ltd.Inventors: Akira Nakamori, Takahiro Mori, Tomoyuki Yamazaki
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Publication number: 20100019342Abstract: In a semiconductor device having a pn-junction diode structure that includes anode diffusion region including edge area, anode electrode on anode diffusion region, and insulator film on edge area of anode diffusion region, the area of anode electrode above anode diffusion region with insulator film interposed between anode electrode and anode diffusion region is narrower than the area of insulator film on edge area of anode diffusion region.Type: ApplicationFiled: July 22, 2009Publication date: January 28, 2010Applicant: Fuji Electric Device Technology Co., Ltd.Inventors: Ryouichi KAWANO, Tomoyuki YAMAZAKI, Michio NEMOTO, Mituhiro KAKEFU
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Publication number: 20090302346Abstract: A surface between gate electrodes in an MOS gate structure is patterned so that missing portions are partially provided in surfaces of n+ emitter regions to thereby enlarge surface areas of p+ contact regions surrounded by the surfaces of the n+ emitter regions. In this manner, a highly reliable MOS type semiconductor device is provided which is improved in breakdown tolerance by suppressing an increase in the gain of a parasitic transistor caused by photo pattern defects produced easily in accordance with minute patterning in a process design rule.Type: ApplicationFiled: June 5, 2009Publication date: December 10, 2009Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.Inventor: Tomoyuki YAMAZAKI
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Publication number: 20090230500Abstract: A semiconductor device equipped with a primary semiconductor element and a temperature detecting element for detecting a temperature of the primary semiconductor element. The device includes a first semiconductor layer of a first conductivity type that forms the primary semiconductor element. A second semiconductor region of a second conductivity type is provided in the first semiconductor layer. A third semiconductor region of the first conductivity type is provided in the second semiconductor region. The temperature detecting element is provided in the third semiconductor region and is separated from the first semiconductor layer by a PN junction.Type: ApplicationFiled: January 30, 2009Publication date: September 17, 2009Applicant: Fuji Electric Device Technology Co., LtdInventors: Koh Yoshikawa, Tomoyuki Yamazaki, Yuichi Onozawa
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Publication number: 20090146714Abstract: A driver circuit facilitates reducing noises and losses and improving the driving performances thereof without connecting a series circuit of capacitor and a resistor to the gate of IGBT. The driver circuit includes a slope setting circuit that sets the gate voltage waveform of IGBT; and an operational amplifier that includes a non-inverting input terminal, to which an output voltage V* from slope setting circuit is inputted, and an inverting input terminal, to which a divided voltage Vgsf divided by resistors is inputted; and the operational amplifier outputs an output voltage Vout, proportional to the difference between the output voltage V* and the divided voltage Vgsf, to the gate of IGBT.Type: ApplicationFiled: December 8, 2008Publication date: June 11, 2009Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.Inventors: Akira NAKAMORI, Takahiro MORI, Tomoyuki YAMAZAKI
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Patent number: 7538408Abstract: A semiconductor device includes a surface layer on the side of a first principal surface of a p-semiconductor substrate, a high side n-isolation-diffused region and a low side n-isolation-diffused region formed apart from each other by a distance that is shorter than the diffusion length of electrons in the p-semiconductor substrate. In a region between the high side n-isolation-diffused region and the low side n-isolation-diffused region, a p-region is formed which has a higher impurity concentration than the p-semiconductor substrate. A first electrode in contact with the p-region and a second electrode in contact with a second principal surface of the p-semiconductor substrate are brought to be at the ground potential. This, at switching of a low side IGBT, makes a charging or discharging current flowing from the high side n-isolation-diffused region flow toward the back surface of the substrate to be taken out from the second electrode.Type: GrantFiled: June 6, 2006Date of Patent: May 26, 2009Assignee: Fuji Electric Device Technology Co., Ltd.Inventor: Tomoyuki Yamazaki
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Patent number: 7507023Abstract: A temperature measurement device of a power semiconductor device includes a plurality of temperature detecting diodes formed on a first chip having a power semiconductor device; and a detection circuit that is formed on a second chip having an integrated circuit that controls the power semiconductor device and is connected to the temperature detecting diodes; wherein the detection circuit detects a temperature of the power semiconductor device based on a difference between the forward voltages of the temperature detecting diodes when different values of current flow to the respective temperature detecting diodes.Type: GrantFiled: April 14, 2006Date of Patent: March 24, 2009Assignee: Fuji Electric Device Technology Co., Ltd.Inventors: Kazunori Oyabe, Tomoyuki Yamazaki, Yasushi Miyasaka
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Publication number: 20090035151Abstract: There are provided a vacuum pump self-diagnosis method, a vacuum pump self-diagnosis system, a vacuum pump central monitoring system capable of making self-diagnosis of a dry vacuum pump. A vacuum pump self-diagnosis method decides the occurrence of failure and generates an alarm when a predetermined alarm set value is exceeded by an integrated value or an average value of a current of a motor for rotating a rotor of said vacuum pump. In a vacuum pump self-diagnosis system for making self-diagnosis of a vacuum pump which comprises a casing and a rotor rotatably arranged in the casing for sucking and discharging a gas through rotations of the rotor, the rotor comprises a plurality of stages and a pressure sensor is provided between the rotor stages.Type: ApplicationFiled: April 7, 2006Publication date: February 5, 2009Applicant: EBARA CORPORATIONInventors: Tetsuro Sugiura, Keiji Tanaka, Toshiharu Nakazawa, Koichi Kido, Tomoyuki Yamazaki
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Patent number: 7291891Abstract: A voltage is applied across gate electrodes (103A) and (103B) in a two-dimensional electronic system (101) placed under a magnetic field, and the polarity of an electric current passed between ohmic electrodes (102D) and (102S) is selected to bring about inversion of electron spins based on a non-equilibrium distribution of electrons in a quantum Hall edge state and to initialize the polarization of nuclear spins. An oscillatory electric field of a nuclear magnetic resonance frequency is applied to coplanar waveguides (104A) and (104B) to control the nuclear spin polarization. The controlled spin polarization is read out by measuring the Hall resistance from ohmic electrodes (102VA) and (102VB).Type: GrantFiled: December 5, 2002Date of Patent: November 6, 2007Assignee: Japan Science and Technology AgencyInventors: Tomoki Machida, Susumu Komiyama, Tomoyuki Yamazaki
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Publication number: 20070023782Abstract: A semiconductor device includes a surface layer on the side of a first principal surface of a p-semiconductor substrate, a high side n-isolation-diffused region and a low side n-isolation-diffused region formed apart from each other by a distance that is shorter than the diffusion length of electrons in the p-semiconductor substrate. In a region between the high side n-isolation-diffused region and the low side n-isolation-diffused region, a p-region is formed which has a higher impurity concentration than the p-semiconductor substrate. A first electrode in contact with the p-region and a second electrode in contact with a second principal surface of the p-semiconductor substrate are brought to be at the ground potential. This, at switching of a low side IGBT, makes a charging or discharging current flowing from the high side n-isolation-diffused region flow toward the back surface of the substrate to be taken out from the second electrode.Type: ApplicationFiled: June 6, 2006Publication date: February 1, 2007Applicant: Juji Electric DeviceInventor: Tomoyuki Yamazaki
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Publication number: 20060255361Abstract: A temperature measurement device of a power semiconductor device includes a plurality of temperature detecting diodes formed on a first chip having a power semiconductor device; and a detection circuit that is formed on a second chip having an integrated circuit that controls the power semiconductor device and is connected to the temperature detecting diodes; wherein the detection circuit detects a temperature of the power semiconductor device based on a difference between the forward voltages of the temperature detecting diodes when different values of current flow to the respective temperature detecting diodes.Type: ApplicationFiled: April 14, 2006Publication date: November 16, 2006Inventors: Kazunori Oyabe, Tomoyuki Yamazaki, Yasushi Miyasaka
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Publication number: 20050021927Abstract: A voltage is applied across gate electrodes (103A) and (103B) in a two-dimensional electronic system (101) placed under a magnetic field, and the polarity of an electric current passed between ohmic electrodes (102D) and (102S) is selected to bring about inversion of electron spins based on a non-equilibrium distribution of electrons in a quantum Hall edge state and to initialize the polarization of nuclear spins. An oscillatory electric field of a nuclear magnetic resonance frequency is applied to coplanar waveguides (104A) and (104B) to control the nuclear spin polarization. The controlled spin polarization is read out by measuring the Hall resistance from ohmic electrodes (102VA) and (102VB).Type: ApplicationFiled: December 5, 2002Publication date: January 27, 2005Inventors: Tomoki Machida, Susumu Komiyama, Tomoyuki Yamazaki