Patents by Inventor Tong Lin

Tong Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9429806
    Abstract: A display device is provided. The display device includes an array substrate including a substrate and a first electrode having an opening, wherein the opening has an edge. The array substrate further includes a second electrode disposed over the first electrode and including a first finger portion having a first side and a second side opposite to the first side. The second electrode further includes a connection portion connecting the first finger portion at the edge, wherein the connection portion has a first concavity at the first side and a second concavity at the second side, and a length of the first concavity is greater than a length of the second concavity. The display device further includes an opposite substrate and a display medium.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: August 30, 2016
    Assignee: INNOLUX CORPORATION
    Inventors: Shun-Chen Yang, Ying-Tong Lin, Yu-Lun Hsu
  • Patent number: 9403866
    Abstract: The present invention relates to methods and compositions for increasing telomerase activity in cells. Such compositions include pharmaceutical formulations. The methods and compositions are useful for treating diseases subject to treatment by an increase in telomerase activity in cells or tissue of a patient. They are also useful for enhancing replicative capacity of cells in culture, as in ex vivo cell therapy and for enhancing proliferation of stem and progenitor cells.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: August 2, 2016
    Assignee: TELOMERASE ACTIVATION SCIENCES, INC.
    Inventors: Calvin Bruce Harley, Soo-Peang Khor, Mahesh Ramaseshan, Premchandran H. Ramiya, Zhu Z. Pirot, Steven Fauce, Tong Lin
  • Publication number: 20160170275
    Abstract: A display device is provided. The display device includes an array substrate including a substrate and a first electrode having an opening, wherein the opening has an edge. The array substrate further includes a second electrode disposed over the first electrode and including a first finger portion having a first side and a second side opposite to the first side. The second electrode further includes a connection portion connecting the first finger portion at the edge, wherein the connection portion has a first concavity at the first side and a second concavity at the second side, and a length of the first concavity is greater than a length of the second concavity. The display device further includes an opposite substrate and a display medium.
    Type: Application
    Filed: March 23, 2015
    Publication date: June 16, 2016
    Inventors: Shun-Chen Yang, Ying-Tong LIN, Yu-Lun HSU
  • Patent number: 9360606
    Abstract: An embodiment of the invention provides a color filter substrate which includes: a substrate having a surface; a light-shielding layer disposed on the surface; a first color filter layer; and a second color filter layer disposed on the surface, the light-shielding layer has a first sidewall in direct contact with the first color filter layer, the first sidewall and the surface form a first angle, the light-shielding layer has a second sidewall in direct contact with the second color filter layer, the second sidewall and the surface form a second angle, and the second angle is less than the first angle.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: June 7, 2016
    Assignee: INNOLUX CORPORATION
    Inventors: Yao-Teng Tseng, Tsung-Han Tsai, Ying-Tong Lin
  • Publication number: 20160091744
    Abstract: A display panel includes a thin film transistor substrate, an opposite substrate and a liquid crystal layer. A thin film transistor is disposed on a substrate and has a drain. A first insulating layer is disposed on the drain and has a first via above the drain. A planarization layer is disposed on the first insulating layer and has a second via above the drain. The first via and the second via are partially overlapped to form an overlap portion. A second insulating layer is disposed on the planarization layer. A pixel electrode layer is disposed on the second insulating layer and in the overlap portion to connect to the drain. The opposite substrate is disposed opposite to the thin film transistor substrate. The liquid crystal layer is disposed between the thin film transistor substrate and the opposite substrate.
    Type: Application
    Filed: December 8, 2015
    Publication date: March 31, 2016
    Inventors: Kuan-Feng LEE, Ming-Chang LIN, Ying-Tong LIN
  • Publication number: 20160056182
    Abstract: An array substrate of display panel comprises a substrate, a first and second transistors disposed on the substrate. The first and second transistors are electrically connected and share a semiconducting layer which comprises a first lateral portion, a turning portion and a bottom portion. The turning portion connects to the first lateral portion. The bottom portion connects to the turning portion. In one embodiment, a first outer edge extending line of the first lateral portion, a second outer edge extending line of the bottom portion and a third outer edge of the turning portion defines a first region. A first inner edge extending line of the first lateral portion, a second inner edge extending line of the bottom portion and a third inner edge of the turning portion defines a second region. The area of the first region is smaller than that of the second region.
    Type: Application
    Filed: October 30, 2014
    Publication date: February 25, 2016
    Inventors: I-Che LEE, Ying-Tong LIN
  • Patent number: 9268189
    Abstract: A display panel includes a thin film transistor substrate, an opposite substrate and a liquid crystal layer. A thin film transistor is disposed on a substrate and has a drain. A first insulating layer is disposed on the drain and has a first via above the drain. A planarization layer is disposed on the first insulating layer and has a second via above the drain. The first via and the second via are partially overlapped to form an overlap portion. A second insulating layer is disposed on the planarization layer. A pixel electrode layer is disposed on the second insulating layer and in the overlap portion to connect to the drain. The opposite substrate is disposed opposite to the thin film transistor substrate. The liquid crystal layer is disposed between the thin film transistor substrate and the opposite substrate.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: February 23, 2016
    Assignee: InnoLux Corporation
    Inventors: Kuan-Feng Lee, Ming-Chang Lin, Ying-Tong Lin
  • Publication number: 20160011347
    Abstract: An embodiment of the invention provides a color filter substrate which includes: a substrate having a surface; a light-shielding layer disposed on the surface; a first color filter layer; and a second color filter layer disposed on the surface, the light-shielding layer has a first sidewall in direct contact with the first color filter layer, the first sidewall and the surface form a first angle, the light-shielding layer has a second sidewall in direct contact with the second color filter layer, the second sidewall and the surface form a second angle, and the second angle is less than the first angle.
    Type: Application
    Filed: September 15, 2014
    Publication date: January 14, 2016
    Inventors: Yao-Teng TSENG, Tsung-Han TSAI, Ying-Tong LIN
  • Publication number: 20150293412
    Abstract: A display panel comprises a first substrate, a second substrate opposite to the first substrate, and a display medium layer disposed between the first and second substrates. The first substrate comprises a conductive layer formed on the first base plate and extending along a first direction. Along the first direction, the conductive layer comprises a first plane correspondingly at a first height, a tilted plane, and a second plane correspondingly at a second height in sequential order. The first height is greater than the second height. A position of the first plane adjacent to the tilted plane of the conductive layer has a first line width along the second direction. A position of the tilted plane adjacent to the second plane of the conductive layer has a second line width along the second direction. The first line width is shorter than the second line width.
    Type: Application
    Filed: June 18, 2014
    Publication date: October 15, 2015
    Inventors: Shun-Fu Chiu, Ming-Chang Lin, Ying-Tong Lin
  • Publication number: 20150278744
    Abstract: Described herein is a reporting framework. In accordance with one aspect of the framework, data is modeled into business-oriented data, wherein the data utilizes flat-table data modules. A subset is selected from the business-oriented data, and a dataset may be retrieved based on the subset. The retrieved dataset may be converted into structured query language (SQL) expression, which is then used to report the dataset.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 1, 2015
    Inventors: Yonghui WANG, Jingjing GUO, Tong LIN, Peter Enrico VITTORIA, Judith RĂ–SS, Stefan EHRLER, Alexander SCHMITT
  • Publication number: 20150124675
    Abstract: Disclosed are methods, systems and/or devices to calibrate a network time by acquisition of satellite positioning system (SPS) signals and different instances of time, and time-tagging SPS times according to the network time. In particular, the network time may be calibrated based, at least in part, on a first difference between first and second SPS times obtained at two SPS position fixes and a second difference between corresponding first and second time stamps.
    Type: Application
    Filed: September 30, 2014
    Publication date: May 7, 2015
    Inventors: Dominic Gerard Farmer, Jie Wu, William James Morrison, Tong Lin, Krishnaranjan S. Rao
  • Publication number: 20150123844
    Abstract: Disclosed are methods, systems and/or devices to calibrate a network time by acquisition of satellite positioning system (SPS) signals and different instances of time, and time-tagging SPS times according to the network time. In particular, the network time may be calibrated based, at least in part, on a first difference between first and second SPS times obtained at two SPS position fixes and a second difference between corresponding first and second time stamps.
    Type: Application
    Filed: September 30, 2014
    Publication date: May 7, 2015
    Inventors: Dominic Gerard Farmer, Jie Wu, William James Morrison, Tong Lin, Krishnaranjan S. Rao
  • Publication number: 20150123847
    Abstract: Techniques for managing power consumption of a Global Navigation Satellite System (GNSS) receiver of a mobile device are provided. These techniques include a method that includes deriving a GNSS search window for the GNSS receiver based on a position uncertainty (PUNC) and a time uncertainty (TUNC), selecting a GNSS search mode based on the GNSS search window and resources available for searching for signals from GNSS satellite vehicles (SVs), wherein an estimated power consumption associated with execution of a GNSS search associated with the GNSS search mode does not exceed a power consumption limit specified for the GNSS receiver conducting the GNSS search using the GNSS search mode, and estimating a position of the mobile device.
    Type: Application
    Filed: September 8, 2014
    Publication date: May 7, 2015
    Inventors: Dominic Gerard FARMER, William James MORRISON, Jie WU, Krishnaranjan RAO, Tong LIN
  • Publication number: 20150109742
    Abstract: A display device is provided, including a display panel, a back frame, a circuit board and a cover film. The display panel includes a first substrate and a second substrate, wherein the first substrate includes an upper surface. The back frame supports the display panel and includes an outer surface. The cover film includes a film base, a first adhesive and a second adhesive. The film base includes a first portion, a second portion and an intermediate portion located therebetween, wherein the film base covers an edge of the upper surface and a portion of the outer surface. The first adhesive is disposed on the first portion and is attached to the edge of the upper surface. The second adhesive is disposed on the second portion and is attached to the outer surface, wherein the intermediate portion and the outer surface define a receiving space receiving the circuit board.
    Type: Application
    Filed: September 23, 2014
    Publication date: April 23, 2015
    Inventors: Kun-Sheng Tsai, Ying-Tong Lin
  • Publication number: 20140264985
    Abstract: The present invention relates to a process for the preparation of fibres and fibres prepared by the process. The process can provide discontinuous colloidal polymer fibres in a process that employs a low viscosity dispersion medium.
    Type: Application
    Filed: October 18, 2012
    Publication date: September 18, 2014
    Applicant: CYTOMATRIX PTY LTD.
    Inventors: Alessandra Sutti, Tong Lin, Mark Alexander Kirkland
  • Patent number: 8747093
    Abstract: A spinneret for producing nanofibers from a viscous liquid using electrostatic spinning in an electric field is described. The spinneret includes one or more narrow annular bodies radially centered about and axially spaced along a central axis. The annular bodies may be discs, rings, or coils.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: June 10, 2014
    Assignee: Deakin University
    Inventors: Tong Lin, Xungai Wang, Xin Wang, Haitao Niu
  • Publication number: 20140088055
    Abstract: The present invention relates to methods and compositions for increasing telomerase activity in cells. Such compositions include pharmaceutical formulations. The methods and compositions are useful for treating diseases subject to treatment by an increase in telomerase activity in cells or tissue of a patient. They are also useful for enhancing replicative capacity of cells in culture, as in ex vivo cell therapy and for enhancing proliferation of stem and progenitor cells.
    Type: Application
    Filed: July 8, 2013
    Publication date: March 27, 2014
    Applicant: TELOMERASE ACTIVATION SCIENCES, INC.
    Inventors: Calvin Bruce HARLEY, Soo-Peang KHOR, Mahesh RAMASESHAN, Premchandran H. RAMIYA, Zhu Z. PIROT, Steven FAUCE, Tong LIN
  • Publication number: 20140063396
    Abstract: A display panel includes a thin film transistor substrate, an opposite substrate and a liquid crystal layer. A thin film transistor is disposed on a substrate and has a drain. A first insulating layer is disposed on the drain and has a first via above the drain. A planarization layer is disposed on the first insulating layer and has a second via above the drain. The first via and the second via are partially overlapped to form an overlap portion. A second insulating layer is disposed on the planarization layer. A pixel electrode layer is disposed on the second insulating layer and in the overlap portion to connect to the drain. The opposite substrate is disposed opposite to the thin film transistor substrate. The liquid crystal layer is disposed between the thin film transistor substrate and the opposite substrate.
    Type: Application
    Filed: August 30, 2013
    Publication date: March 6, 2014
    Applicant: InnoLux Corporation
    Inventors: Kuan-Feng Lee, Ming-Chang Lin, Ying-Tong Lin
  • Publication number: 20140028498
    Abstract: Techniques are provided to quickly estimate a temporal shift of a GPS signal based on an analysis of a GLONASS signal. The shift can be a result of applied leap-second adjustments affecting GLONASS signals but not GPS signals. By identifying this shift, GPS and GLONASS signals can be considered together in order to estimate locations. The temporal shift can be determined, e.g., by estimating a separation between a GPS-signal frame feature (e.g., frame onset) and a GLONASS-signal frame feature (e.g., frame onset), or identifying coinciding frame features (e.g., a GPS-signal subframe coinciding with a GLONASS-signal string number). The techniques allow the temporal shift to be estimated based on an analysis of just a portion of the GPS-signal and GLONASS-signal frames, such that a speed of location estimations can be improved.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 30, 2014
    Applicant: QUALCOMM INCORPORATED
    Inventor: Tong Lin
  • Patent number: 8482128
    Abstract: A flash memory storage apparatus is provided. The flash memory storage apparatus includes a substrate, a control and storage circuit unit, a ground lead, at least a signal lead, and a power lead. The control and storage circuit unit, the power lead, the signal lead, and the ground lead are disposed on the substrate, in which the power lead, the signal lead, and the ground lead respectively electrically connect to the control and storage circuit unit. Moreover, the flash memory storage apparatus further includes an extra ground lead electrically connected to the ground lead or a protrusion on the substrate, such that the ground lead first electrically connects to a host when the flash memory storage apparatus is plugged into the host.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: July 9, 2013
    Assignee: Phison Electronics Corp.
    Inventors: Yu-Fong Lin, Hung-Yi Chung, Yu-Tong Lin, Yun-Chieh Chen