Patents by Inventor Tongshang Su

Tongshang Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210167181
    Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor is formed on a substrate and includes: an active layer on the substrate, the active layer including a source region, a drain region, and a channel region between the source region and the drain region; a first gate electrode on a side of the active layer away from the substrate; and a second gate electrode on a side of the first gate electrode away from the substrate, wherein a thickness of the first gate electrode is smaller than a thickness of the second gate electrode.
    Type: Application
    Filed: December 18, 2019
    Publication date: June 3, 2021
    Inventors: Tongshang Su, Dongfang Wang, Qinghe Wang, Ning Liu, Yongchao Huang, Yu Ji, Zheng Wang, Liangchen Yan
  • Publication number: 20210159279
    Abstract: An array substrate is provided, including a base substrate, a semiconductor active layer, a gate electrode, a source electrode, and a drain electrode that are sequentially provided, and further including a first insulating layer, a second insulating layer, a third insulating layer, at least one first via, and at least one second via. Each first via penetrates through the third insulating layer, and in each pixel unit with plural chromatic color resists, each first via is between adjacent two chromatic color resists and filled by one of the adjacent two chromatic color resists. Each second via penetrates through the second insulating layer, the at least one second via is in one-to-one correspondence with the at least one first via, each second via is filled by a chromatic color resist having a same color as that of the chromatic color resist in the corresponding first via.
    Type: Application
    Filed: April 22, 2020
    Publication date: May 27, 2021
    Inventors: Jun LIU, Liangchen YAN, Bin ZHOU, Wei LI, Tongshang SU, Yongchao HUANG, Biao LUO, Xuehai GUI
  • Patent number: 11018236
    Abstract: The present disclosure provides a thin film transistor, including a base substrate, an active layer and a source/drain, and a conductive layer. The active layer and an outer edge of the conductive layer are formed in the same etching process. The present disclosure further provides a method for manufacturing a thin film transistor, including forming an active material layer and a conductive material layer, forming a photoresist on the conductive material layer, exposing and developing the photoresist by means of a halftone mask, removing segments of the active material layer and the conductive material layer corresponding to a photoresist completely-removed region by a same etching process, partially removing the photoresist in a photoresist completely-retained region and completely removing the photoresist in a photoresist partially-retained region, and removing a segment of the conductive material layer corresponding to the photoresist partially-retained region.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: May 25, 2021
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Tongshang Su, Dongfang Wang, Ce Zhao, Bin Zhou, Liangchen Yan
  • Publication number: 20210134852
    Abstract: The present disclosure provides a thin film transistor, a display substrate, a method for preparing the same, and a display device including the display substrate. The method for preparing the thin film transistor includes: forming an inorganic insulating film layer in contact with an electrode of the thin film transistor by a plasma enhanced chemical vapor deposition process at power of 9 kW to 25 kW, at a temperature of 190° C. to 380° C. and by using a mixture of gases N2, NH3 and SiH4 in a volume ratio of N2:NH3:SiH4=(10˜20):(5˜10):(1˜2), such that a stress value of the inorganic insulating film layer is reduced to be less than or equal to a threshold, and the inorganic insulating layer comprises silicon nitride.
    Type: Application
    Filed: October 18, 2019
    Publication date: May 6, 2021
    Inventors: Tongshang SU, Dongfang WANG, Qinghe WANG, Liangchen YAN
  • Patent number: 10978539
    Abstract: An array substrate includes a base substrate, a transistor on the base substrate, a planarization layer on a side of the transistor away from the base substrate, a recessed portion on the planarization layer, and a light blocking portion in the recessed portion. The light blocking portion is configured to prevent a light from being incident upon an active layer.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: April 13, 2021
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jun Liu, Liangchen Yan, Bin Zhou, Jun Wang, Tongshang Su, Biao Luo, Yang Zhang
  • Patent number: 10976281
    Abstract: Embodiments of the present disclosure relate to the field of electronic sensing technologies, and provide a chemical sensing unit, a chemical sensor, and a chemical sensing device. The chemical sensing unit includes a thin film transistor arranged on a substrate, and a light emitting diode coupled to the thin film transistor. The thin film transistor includes a semiconductor active layer, a source, and a drain, and the semiconductor active layer is mainly composed of a chemically sensitive semiconductor material. The chemical sensing unit is provided with a via hole in a region between the source and the drain, such that the semiconductor active layer is exposed at a position corresponding to the via hole. The light emitting diode includes a first electrode, a light-emitting functional layer, and a second electrode which are stacked in sequence, wherein the first electrode is coupled to the drain.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: April 13, 2021
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qinghe Wang, Liangchen Yan, Dongfang Wang, Tongshang Su, Leilei Cheng, Yongchao Huang, Yang Zhang, Guangyao Li, Guangcai Yuan
  • Patent number: 10971523
    Abstract: The present disclosure provides a pixel array and a fabrication method thereof. The pixel array includes a plurality of gate lines and a plurality of data lines which are arranged intersected and insulated and a pixel unit disposed at a position where each of the plurality of gate lines and each of the plurality of data lines are intersected. The pixel unit includes a thin film transistor (TFT). The width-to-length ratios of channels of the TFTs are sequentially increased in such a manner that the width-to-length ratios of the channels of the TFTs in the pixel units positioned in a same row (and/or a same column) are sequentially increased along a scanning direction of the gate line coupled to gate electrodes of the TFTs in the same row (and/or along a data writing direction of the data line coupled to the source electrodes of the TFTs in the same column).
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: April 6, 2021
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang Su, Dongfang Wang, Jun Cheng, Jun Liu, Qinghe Wang, Guangyao Li, Liangchen Yan
  • Publication number: 20210097910
    Abstract: Provided are a detection method and a detection device, the detection method includes: in a first writing stage, providing an active voltage to each data line, each power supply terminal, both ends of a first gate line to-be-detected, an absolute value of the active voltage of each data line is smaller than that of the active voltage of the power supply terminal, an absolute value of the active voltage of the first gate line to-be-detected is smaller than that of the active voltage of each data line; in a first detection stage, maintaining the active voltage of the power supply terminal, providing an inactive voltage to the first gate line to-be-detected and providing an active voltage to the data line, detecting voltages at second electrodes of storage capacitors corresponding to the first gate line to-be-detected, determining whether the first gate line to-be-detected has breakpoint according to the detected voltages.
    Type: Application
    Filed: September 25, 2020
    Publication date: April 1, 2021
    Inventors: Jun WANG, Dongfang WANG, Guangyao LI, Haitao WANG, Qinghe WANG, Tongshang SU, Chen SHEN, Xiaoning ZHANG, Youpeng GAN
  • Publication number: 20210074946
    Abstract: The present invention relates to the field of display technologies, and provides an array substrate, a manufacturing method thereof, and a display device. The array substrate includes a first electrode layer. The first electrode layer may include an indium tin oxide layer and a planarization layer. The indium tin oxide layer is disposed on a substrate and includes indium tin oxide particles; the planarization layer is disposed on a side of the indium tin oxide layer away from the substrate, and fills at least part of gaps between the indium tin oxide particles, and the planarization layer can conduct electricity.
    Type: Application
    Filed: March 2, 2020
    Publication date: March 11, 2021
    Inventors: Leilei CHENG, Tongshang SU, Qinghe WANG, Guangyao LI, Wei SONG, Ning LIU, Yang ZHANG, Yongchao HUANG
  • Publication number: 20210066353
    Abstract: An array substrate and a display device are provided in embodiments of the present disclosure. The array substrate includes a base substrate, a buffer layer, an active layer, a gate insulating layer, a gate electrode, an interlayer insulating layer, a source-drain electrode electrically conductive layer, a passivation layer, and a first light shielding layer. The first light shielding layer is disposed on a side of the passivation layer facing away from the interlayer insulating layer. An orthographic projection of the first light shielding layer on the base substrate at least partially overlaps with an orthographic projection of the active layer on the base substrate, and the first light shielding layer is formed by a photoresist material.
    Type: Application
    Filed: July 14, 2020
    Publication date: March 4, 2021
    Inventors: Tongshang Su, Dongfang Wang, Jun Liu, Qinghe Wang, Jun Wang, Ning Liu, Guangyao Li
  • Publication number: 20210057459
    Abstract: A capacitor, an array substrate and a method for manufacturing the same, and a display panel are provided. The capacitor includes a main body including a first pole plate and a second pole plate disposed opposite to each other, and the capacitor further includes at least one auxiliary body. Any one of the at least one auxiliary body includes a third pole plate and a fourth pole plate disposed opposite to each other, and neither the third pole plate nor the fourth pole plate extends in a plane where the first pole plate is located or a plane where the second pole plate is located. The main body is connected in parallel with the at least one auxiliary body. The array substrate includes a transistor and the capacitor provided by the present disclosure, and the transistor is electrically connected to the capacitor.
    Type: Application
    Filed: May 28, 2020
    Publication date: February 25, 2021
    Inventors: Tongshang SU, Dongfang WANG, Qinghe WANG
  • Patent number: 10930726
    Abstract: Provided are a display substrate and a preparation method thereof, a display panel, and a display device. The display substrate includes a substrate and a plurality of pixel units on the substrate. The pixel unit comprises a plurality of functional layers that are sequentially arranged in a direction away from the substrate. At least one of the plurality of functional layers, which is close to the substrate, constitutes a vertical thin film transistor (VTFT). At least one of the plurality of functional layers, which is away from the substrate, constitutes an organic light-emitting transistor (OLET). An orthographic projection region of the OLET on the substrate and an orthographic projection region of the VTFT on the substrate at least partially overlap.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: February 23, 2021
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Qinghe Wang, Liangchen Yan, Dongfang Wang, Tongshang Su, Jun Wang, Guangyao Li, Yang Zhang, Xuechao Sun
  • Publication number: 20210018377
    Abstract: A pressure sensing unit includes: a first substrate and a second substrate opposite to each other; and at least one vertical thin film transistor disposed between the first substrate and the second substrate. Each vertical thin film transistor includes a first electrode, a semiconductor active layer, a second electrode, at least one insulating support, and a gate electrode sequentially disposed in a direction extending from the first substrate to the second substrate. A first air gap is formed by the presence of the at least one insulating support between the gate electrode and the second electrode of each vertical thin film transistor.
    Type: Application
    Filed: May 17, 2019
    Publication date: January 21, 2021
    Inventors: Qinghe Wang, Dongfang Wang, Bin Zhou, Ce Zhao, Tongshang Su, Leilei Cheng, Yang Zhang, Guangyao Li
  • Publication number: 20210012692
    Abstract: Embodiments of the present disclosure provide a method and a device for detecting a threshold voltage drift of a transistor in a pixel circuit, which are used for detecting the threshold voltage drift of the transistor to be detected in the pixel circuit. The transistor to be detected is at least one of the driving transistor and the detection transistor. The detection method comprises: inputting, during an inputting stage, a first turning-on voltage to the second scanning terminal, so as to turn on the detection transistor, enabling writing a first voltage into the second node through the detection signal terminal; inputting, during a detection stage, a first turning-off voltage to the second scanning terminal, so as to turn off the detection transistor, thereby detecting an actual voltage at the second node; and determining a state of the threshold voltage drift of the transistor to be detected according to the actual voltage and the first voltage.
    Type: Application
    Filed: June 11, 2020
    Publication date: January 14, 2021
    Inventors: Jun Wang, Dongfang Wang, Liangchen Yan, Guangyao Li, Haitao Wang, Qinghe Wang, Yingbin Hu, Yang Zhang, Tongshang Su
  • Patent number: 10873661
    Abstract: A voice communication method, a voice communication apparatus, and a voice communication system are disclosed. The method includes: at a transmitting side, obtaining voice information; determining whether the voice information is uttered by a preset user, and transmitting the voice information to a peer device if it is determined that the voice information is uttered by the preset user, and prohibiting the transmission of the voice information otherwise; and at a receiving side, receiving voice information transmitted from a peer device; collecting a first environmental information, and determining whether the first environmental information meets a voice output condition; outputting the voice information if it is determined that the first environmental information meets the voice output condition, and prohibiting the output of the voice information otherwise.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: December 22, 2020
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qinghe Wang, Dongfang Wang, Tongshang Su, Leilei Cheng, Wei Song, Yang Zhang, Ning Liu, Haitao Wang, Jun Wang, Guangyao Li
  • Patent number: 10818878
    Abstract: Disclosed are a manufacturing method of a flexible panel, a flexible panel and a display device. The manufacturing method of a flexible panel includes: forming a deformable material layer on a base substrate, the deformable material layer includes a shape memory material; forming a flexible panel body at a side of the deformable material layer away from the base substrate; driving the deformable material layer to allow the flexible panel body to be at least partially stripped; and stripping the base substrate.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: October 27, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dongfang Wang, Tongshang Su
  • Patent number: 10818706
    Abstract: There are provided a thin-film transistor and a production method thereof, an array substrate, and a display panel. The method comprises forming an active layer, a gate insulating layer, and a gate electrode on a substrate, wherein conductor conversion treatment is performed on both sides of the homogeneous active material layer to obtain an active layer, and the active layer comprises conductor regions located at both sides and a non-conductor region located at the center, wherein a projection of the gate electrode on the substrate is within a projection of the non-conductor region on the substrate, and the distances from the projection of the gate electrode to projections of the two conductor regions on the substrate are each between 0 micrometer and 1 micrometer.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: October 27, 2020
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang Su, Guangcai Yuan, Dongfang Wang, Ce Zhao, Bin Zhou, Jun Liu, Jifeng Shao, Qinghe Wang, Yang Zhang
  • Patent number: 10811627
    Abstract: Disclosed are a pixel defining layer and a manufacturing method thereof, and a display panel, in the field of display technologies. An auxiliary electrode pattern is on a side of a substrate and configured to be electrically connected to a cathode in a display panel; and a first sub-defining layer is on a side of the auxiliary electrode pattern away from the substrate. A pixel defining layer has a plurality of openings, and the plurality of openings all pass through the auxiliary electrode pattern and the first sub-defining layer. The opening is configured to accommodate a material of a light emitting layer. An orthographic projection of the auxiliary electrode pattern on the substrate is within an orthographic projection of the first sub-defining layer on the substrate.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: October 20, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dongfang Wang, Tongshang Su, Bin Zhou
  • Patent number: 10741787
    Abstract: A display back plate, a fabricating method for the same, and a display device are provided. The display back plate includes a substrate, a transparent heat conduction layer disposed on the substrate, and an array structure layer disposed on the heat conduction layer. The array structure layer includes a light shielding layer, a first thin film transistor, and a second thin film transistor, where the light shielding layer is disposed between the transparent heat conduction layer and the first thin film transistor.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: August 11, 2020
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang Su, Dongfang Wang, Qinghe Wang, Ce Zhao, Bin Zhou, Liangchen Yan
  • Publication number: 20200251596
    Abstract: The disclosure relates to a thin film transistor. The thin film transistor may include a substrate, an active layer on the substrate, a gate on the active layer, and a source and a drain. The active layer may include a first conducting region, a second conducting region, and a channel region between the first conducting region and the second conducting region. An orthographic projection of the source and an orthographic projection of the drain on the substrate may cover at least an orthographic projection of a first conducting region and an orthographic projection of a second conducting region on the substrate.
    Type: Application
    Filed: August 7, 2019
    Publication date: August 6, 2020
    Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang Su, Dongfang Wang, Jun Liu, Guangyao Li, Wei Li, Qinghe Wang, Chao Wang, Tao Sun