Abstract: There are provided a work-side position measurement device and a drive-side position measurement device for directly measuring positions of roll chocks in a rolling direction, and positions of upper and lower working rolls and upper and lower backup rolls in the rolling direction are adjusted to zero point or predetermined positions. Alternatively, a change caused in the strip wedge due to a minute crossing of the axes of working rolls and backup rolls is calculated, and the quantities of leveling of a work-side rolling reduction cylinder device and a drive-side rolling reduction cylinder device are adjusted to make the strip edge equal to or smaller than a predetermined value. Accordingly, the bilateral asymmetry (strip wedge) of the thickness distribution of a rolled material is easily adjusted even in the event that the positions of the roll chocks in the rolling direction are changed due to wear on various components.

Abstract: There are provided a work-side position measurement device and a drive-side position measurement device for directly measuring positions of roll chocks in a rolling direction, and positions of upper and lower working rolls and upper and lower backup rolls in the rolling direction are adjusted to zero point or predetermined positions. Alternatively, a change caused in the strip wedge due to a minute crossing of the axes of working rolls and backup rolls is calculated, and the quantities of leveling of a work-side rolling reduction cylinder device and a drive-side rolling reduction cylinder device are adjusted to make the strip edge equal to or smaller than a predetermined value. Accordingly, the bilateral asymmetry (strip wedge) of the thickness distribution of a rolled material is easily adjusted even in the event that the positions of the roll chocks in the rolling direction are changed due to wear on various components.

Abstract: There are provided a work-side position measurement device and a drive-side position measurement device for directly measuring positions of roll chocks in a rolling direction, and positions of upper and lower working rolls and upper and lower backup rolls in the rolling direction are adjusted to zero point or predetermined positions. Alternatively, a change caused in the strip wedge due to a minute crossing of the axes of working rolls and backup rolls is calculated, and the quantities of leveling of a work-side rolling reduction cylinder device and a drive-side rolling reduction cylinder device are adjusted to make the strip edge equal to or smaller than a predetermined value. Accordingly, the bilateral asymmetry (strip wedge) of the thickness distribution of a rolled material is easily adjusted even in the event that the positions of the roll chocks in the rolling direction are changed due to wear on various components.

Abstract: There are provided a work-side position measurement device and a drive-side position measurement device for directly measuring positions of roll chocks in a rolling direction, and positions of upper and lower working rolls and upper and lower backup rolls in the rolling direction are adjusted to zero point or predetermined positions. Alternatively, a change caused in the strip wedge due to a minute crossing of the axes of working rolls and backup rolls is calculated, and the quantities of leveling of a work-side rolling reduction cylinder device and a drive-side rolling reduction cylinder device are adjusted to make the strip edge equal to or smaller than a predetermined value. Accordingly, the bilateral asymmetry (strip wedge) of the thickness distribution of a rolled material is easily adjusted even in the event that the positions of the roll chocks in the rolling direction are changed due to wear on various components.

Abstract: In a lead-out wiring area, a protective conductive film is formed on a bottom surface and a side surface of a first contact hole including a surface of a first low resistance conductive film, and a part of a surface of an upper interlayer insulating film, and a second protective conductive film is formed on a bottom surface and a side surface of a second contact hole including a surface of a second low resistance conductive film, and a part of the surface of the upper interlayer insulating film. Then, a lower layer terminal part for a lower layer wiring line is formed of a laminated structure of the first low resistance conductive film and the first protective conductive film, and an upper layer terminal part for an upper layer wiring line is formed of a laminated structure of the second low resistance conductive film and the second protective conductive film.

Abstract: A display panel includes a first substrate in which a display region and a circuit component mounting region are defined and a second substrate, an end of which is cut to expose the circuit component mounting region. The first substrate includes a plurality of first source wirings formed from the display region to the circuit component mounting region and a wiring protection pattern formed in a region corresponding to the cut end of the second substrate between any adjacent first source wirings. In a cross sectional view, an upper end of the wiring protection pattern is located above an upper end of the first source wirings.

Abstract: In a lead-out wiring area, a protective conductive film is formed on a bottom surface and a side surface of a first contact hole including a surface of a first low resistance conductive film, and a part of a surface of an upper interlayer insulating film, and a second protective conductive film is formed on a bottom surface and a side surface of a second contact hole including a surface of a second low resistance conductive film, and a part of the surface of the upper interlayer insulating film. Then, a lower layer terminal part for a lower layer wiring line is formed of a laminated structure of the first low resistance conductive film and the first protective conductive film, and an upper layer terminal part for an upper layer wiring line is formed of a laminated structure of the second low resistance conductive film and the second protective conductive film.

Abstract: A thin film transistor array substrate of the present invention having an array area, and a frame area, the thin film transistor array substrate includes: a thin film transistor; an upper metal pattern formed by the same material as source and drain electrodes at the same layer; a transparent conductive film pattern; and an upper layer insulation film, wherein the transparent conductive film pattern has: a first-type transparent conductive film pattern provided to located within one of a pattern of the electrode pattern and a pattern of the metal pattern, as viewed from the top side, and to not cover pattern end faces of the electrode pattern or the metal pattern; and a second-type transparent conductive film pattern provided to stick out from an inside of at least a portion of one of the patterns, as viewed from the top side and to cover the pattern end faces.

Abstract: A display panel includes a first substrate in which a display region and a circuit component mounting region are defined and a second substrate, an end of which is cut to expose the circuit component mounting region. The first substrate includes a plurality of first source wirings formed from the display region to the circuit component mounting region and a wiring protection pattern formed in a region corresponding to the cut end of the second substrate between any adjacent first source wirings. In a cross sectional view, an upper end of the wiring protection pattern is located above an upper end of the first source wirings.

Abstract: In an active matrix substrate, the source electrode side and/or the drain electrode side of a crystalline semiconductor film extends to an area located outside both the thin-film transistor and the gate electrode, and a metal light-shielding film is provided, in the same layer as the gate electrode, between the contacting portion between the source electrode or the source line and the crystalline semiconductor film and the gate electrode, and/or between the contacting portion between the drain electrode and the crystalline semiconductor film and the gate electrode. An impurity-implanted region implanted with n-type impurity may be formed between the contacting portion between the source electrode or the source line and the crystalline semiconductor film and the gate electrode, and/or between the contacting portion between the drain electrode and the crystalline semiconductor film and the gate electrode.

Abstract: A liquid crystal display which includes a first substrate having thin film transistors, and a second substrate disposed to face the first substrate, wherein the first substrate includes: a gate electrode, a source electrode, and a drain electrode; a gate wiring; a first insulating film formed on the gate electrode and the gate wiring; a source wiring; a pixel electrode that is formed on the drain electrode to partially overlap the drain electrode; a second insulating film that covers the pixel electrode; a counter electrode; and a side wall that is formed on side portions of the source wiring, the source electrode, and the drain electrode, the third insulating film made of third insulating film; and wherein at least a part of the pixel electrode is formed to directly overlap the drain electrode and the side wall formed on the side portion of the drain electrode.

Abstract: It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.

Abstract: A method of crystallizing an amorphous semiconductor film, the method comprising the steps of: forming a gate electrode on a transparent insulating substrate; forming a gate insulating film on the transparent insulating substrate and on an upper part of the gate electrode; forming an amorphous semiconductor film on the gate insulating film; forming a light-transmissive insulating film on the amorphous semiconductor film; forming a metal film having an opening on the light-transmissive insulating film; irradiating laser light onto both a region of the light-transmissive insulating film exposed by the opening and the metal film, which is used as a mask for shielding the laser light; and performing laser annealing to make the laser light to be absorbed through the light-transmissive insulating film into a region of the amorphous semiconductor film exposed by the opening, so that the amorphous semiconductor film is heated and converted to a crystalline semiconductor film.

Abstract: A thin film transistor array substrate of the present invention having an array area, and a frame area, the thin film transistor array substrate includes: a thin film transistor; an upper metal pattern formed by the same material as source and drain electrodes at the same layer; a transparent conductive film pattern; and an upper layer insulation film, wherein the transparent conductive film pattern has: a first-type transparent conductive film pattern provided to located within one of a pattern of the electrode pattern and a pattern of the metal pattern, as viewed from the top side, and to not cover pattern end faces of the electrode pattern or the metal pattern; and a second-type transparent conductive film pattern provided to stick out from an inside of at least a portion of one of the patterns, as viewed from the top side and to cover the pattern end faces.

Abstract: It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.

Abstract: On a translucent substrate, an insulating film having a refractive index n and an amorphous silicon film are deposited successively. By irradiating the amorphous silicon film with a laser beam having a beam shape of a band shape extending along a length direction with a wavelength ?, a plurality of times from a side of amorphous silicon film facing the insulating film, while an irradiation position of the laser beam is shifted each of the plurality of times in a width direction of the band shape by a distance smaller than a width dimension of the band shape, a polycrystalline silicon film is formed from the amorphous silicon film. Forming the polycrystalline silicon film forms crystal grain boundaries which extend in the width direction and are disposed at a mean spacing measured along the length direction and ranging from (?/n)×0.95 to (?/n)×1.

Abstract: In an active matrix substrate, the source electrode side and/or the drain electrode side of a crystalline semiconductor film extends to an area located outside both the thin-film transistor and the gate electrode, and a metal light-shielding film is provided, in the same layer as the gate electrode, between the contacting portion between the source electrode or the source line and the crystalline semiconductor film and the gate electrode, and/or between the contacting portion between the drain electrode and the crystalline semiconductor film and the gate electrode. An impurity-implanted region implanted with n-type impurity may be formed between the contacting portion between the source electrode or the source line and the crystalline semiconductor film and the gate electrode, and/or between the contacting portion between the drain electrode and the crystalline semiconductor film and the gate electrode.

Abstract: A semiconductor device including: a thin film transistor substrate; and a driving circuit, wherein the thin film transistor substrate includes: a thin film transistor includes: a gate electrode; a gate insulating film that is formed on the insulating substrate and the gate electrode; a semiconductor layer that is formed on the gate insulating film; a channel protecting film; and a source electrode and a drain electrode that are formed to connect with the semiconductor layer; and a wiring converting unit that directly and electrically connects a first wiring layer and a second wiring layer through a first contact hole formed in the gate insulating film in the driving circuit, wherein the first wiring layer is formed at the same layer as the gate electrode on the insulating substrate; and wherein the second wiring layer is formed at the same layer as the source electrode and the drain electrode.

Abstract: A method of crystallizing an amorphous semiconductor film, the method comprising the steps of: forming a gate electrode on a transparent insulating substrate; forming a gate insulating film on the transparent insulating substrate and on an upper part of the gate electrode; forming an amorphous semiconductor film on the gate insulating film; forming a light-transmissive insulating film on the amorphous semiconductor film; forming a metal film having an opening on the light-transmissive insulating film; irradiating laser light onto both a region of the light-transmissive insulating film exposed by the opening and the metal film, which is used as a mask for shielding the laser light; and performing laser annealing to make the laser light to be absorbed through the light-transmissive insulating film into a region of the amorphous semiconductor film exposed by the opening, so that the amorphous semiconductor film is heated and converted to a crystalline semiconductor film.

Abstract: A back-channel-etch type TFT includes a gate electrode, an SiN film that is formed on the gate electrode, and an SiO film that is formed and patterned on the SiN film. The TFT further includes an polycrystalline semiconductor film that is formed and patterned on the SiO film in contact with the SiO film in such a way that all pattern ends of the polycrystalline semiconductor film are located in close proximity to pattern ends of the SiO film.