Patents by Inventor Toshiharu Watanabe

Toshiharu Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160190899
    Abstract: An electric compressor includes a hollow cylindrical housing, a compression unit that compresses refrigerant, a motor that functions as a drive source of the compression unit, an inverter that controls the motor, and a refrigerant liquid accumulation unit that accumulates refrigerant liquid in the housing. The refrigerant liquid accumulation unit is disposed at a lower portion in the housing when the electric compressor is installed on the vehicle. According to the electric compressor, the refrigerant liquid is accumulated in the refrigerant liquid accumulation portion at a long-time stop, so that degradation of insulation property in the electric compressor (especially, of the motor and the inverter) can be prevented.
    Type: Application
    Filed: October 15, 2013
    Publication date: June 30, 2016
    Applicant: CALSONIC KANSEI CORPORATION
    Inventors: Junichirou TERAZAWA, Toshiharu WATANABE, Katsuyoshi KAWACHI, Mitsuji YAMAMOTO
  • Patent number: 9165628
    Abstract: A semiconductor memory device includes: a plurality of word lines extending in a first direction; first to third bit lines extending in a second direction that intersects with the first direction; a plurality of variable resistance elements each having a first terminal connected to either one of the first and third bit lines; a plurality of active areas extending in a direction oblique to the first direction while intersecting with the first to third bit lines; a plurality of select transistors provided on the active areas and each having a gate connected to a corresponding one of the word lines, and a current path whose one end is connected to a second terminal of a corresponding one of the variable resistance elements; and a plurality of contact plugs each connecting the other end of the current path of a corresponding one of the select transistors to the second bit line, wherein each of the active areas includes two select transistors sharing a diffusion region, the variable resistance elements includes a
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: October 20, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiharu Watanabe, Yoshiaki Asao
  • Publication number: 20150269983
    Abstract: A semiconductor memory device includes: a plurality of word lines extending in a first direction; first to third bit lines extending in a second direction that intersects with the first direction; a plurality of variable resistance elements each having a first terminal connected to either one of the first and third bit lines; a plurality of active areas extending in a direction oblique to the first direction while intersecting with the first to third bit lines; a plurality of select transistors provided on the active areas and each having a gate connected to a corresponding one of the word lines, and a current path whose one end is connected to a second terminal of a corresponding one of the variable resistance elements; and a plurality of contact plugs each connecting the other end of the current path of a corresponding one of the select transistors to the second bit line, wherein each of the active areas includes two select transistors sharing a diffusion region, the variable resistance elements includes a
    Type: Application
    Filed: June 9, 2015
    Publication date: September 24, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiharu WATANABE, Yoshiaki Asao
  • Patent number: 9093140
    Abstract: A semiconductor memory device includes: a plurality of word lines extending in a first direction; first to third bit lines extending in a second direction that intersects with the first direction; a plurality of variable resistance elements each having a first terminal connected to either one of the first and third bit lines; a plurality of active areas extending in a direction oblique to the first direction while intersecting with the first to third bit lines; a plurality of select transistors provided on the active areas and each having a gate connected to a corresponding one of the word lines, and a current path whose one end is connected to a second terminal of a corresponding one of the variable resistance elements; and a plurality of contact plugs each connecting the other end of the current path of a corresponding one of the select transistors to the second bit line, wherein each of the active areas includes two select transistors sharing a diffusion region, the variable resistance elements includes a
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: July 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiharu Watanabe, Yoshiaki Asao
  • Patent number: 8944781
    Abstract: A horizontal type electrically driven gas compressor includes an electric motor installed in a suction chamber of a housing, a gas compression mechanism section installed in the housing and driven by the electric motor, a sucked refrigerant guide path for guiding a refrigerant from the suction chamber to the gas compression mechanism section, and a lubricating oil supply path for supplying a lubricating oil, which has been collected and stagnated in a bottom portion of the suction chamber, to the sucked refrigerant guide path, the lubricating oil supply path fluidly connecting the sucked refrigerant guide path and the bottom portion of the suction chamber at the position of the bottom portion of the suction chamber.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: February 3, 2015
    Assignee: Calsonic Kansei Corporation
    Inventors: Hirotada Shimaguchi, Toshiharu Watanabe
  • Publication number: 20140204653
    Abstract: A semiconductor memory device includes: a plurality of word lines extending in a first direction; first to third bit lines extending in a second direction that intersects with the first direction; a plurality of variable resistance elements each having a first terminal connected to either one of the first and third bit lines; a plurality of active areas extending in a direction oblique to the first direction while intersecting with the first to third bit lines; a plurality of select transistors provided on the active areas and each having a gate connected to a corresponding one of the word lines, and a current path whose one end is connected to a second terminal of a corresponding one of the variable resistance elements; and a plurality of contact plugs each connecting the other end of the current path of a corresponding one of the select transistors to the second bit line, wherein each of the active areas includes two select transistors sharing a diffusion region, the variable resistance elements includes a
    Type: Application
    Filed: March 25, 2014
    Publication date: July 24, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiharu Watanabe, Yoshiaki Asao
  • Patent number: 8711602
    Abstract: A semiconductor memory device includes: plural word lines extending in a first direction; first to third bit lines extending in a second direction that intersects with the first direction; plural variable resistance elements each having a first terminal connected to either one of the first and third bit lines; plural active areas extending in a direction oblique to the first direction while intersecting with the first to third bit lines; plural select transistors provided on the active areas and each having a gate connected to a corresponding one of the word lines, and a current path whose one end is connected to a second terminal of a corresponding one of the variable resistance elements; and plural contact plugs each connecting the other end of the current path of a corresponding one of the select transistors to the second bit line.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: April 29, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiharu Watanabe, Yoshiaki Asao
  • Patent number: 8360752
    Abstract: The present invention relates to an electric compressor integrally including a compression mechanism and an electric motor, and an object thereof is to prevent the housing from being elongated in the axial direction and improve the sealability and the mountability of the compression mechanism. According to the present invention, a hermetic terminal (45) electrically connecting the electric motor (30) and a motor drive circuit (40) is attached within a swelled-space portion (50) swelled toward radial outside of a housing (11) so as to be continuous with a mounting bracket (17) of the housing (11). Accordingly, the distance between the compression mechanism and motor drive circuit can be shortened.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: January 29, 2013
    Assignee: Calsonic Kansei Corporation
    Inventors: Toshiharu Watanabe, Yutaka Satou, Hirotada Shimaguchi, Masaki Watanabe
  • Patent number: 8354318
    Abstract: A semiconductor memory device includes a first memory cell transistor. The first memory cell transistor includes a tunnel insulation film provided on a semiconductor substrate, a floating electrode provided on the tunnel insulation film, an inter-gate insulation film provided on the floating electrode, and a control electrode provided on the inter-gate insulation film. The floating electrode includes a first floating electrode provided on the tunnel insulation film and a second floating electrode provided on one end portion of the first floating electrode, the floating electrode having an L-shaped cross section in a wiring direction of the control electrode.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: January 15, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshiharu Watanabe
  • Publication number: 20130011281
    Abstract: A horizontal type electrically driven gas compressor includes an electric motor installed in a suction chamber of a housing, a gas compression mechanism section installed in the housing and driven by the electric motor, a sucked refrigerant guide path for guiding a refrigerant from the suction chamber to the gas compression mechanism section, and a lubricating oil supply path for supplying a lubricating oil, which has been collected and stagnated in a bottom portion of the suction chamber, to the sucked refrigerant guide path, the lubricating oil supply path fluidly connecting the sucked refrigerant guide path and the bottom portion of the suction chamber at the position of the bottom portion of the suction chamber.
    Type: Application
    Filed: March 10, 2011
    Publication date: January 10, 2013
    Inventors: Hirotada Shimaguchi, Toshiharu Watanabe
  • Publication number: 20120297820
    Abstract: A combined heat exchanger system includes a first heat exchanger for cooling a first cooling medium, a second heat exchanger for cooling a second cooling medium, and a compressor for compressing the first cooling medium to be supplied to the first heat exchanger. The first heat exchanger is separated from the second heat exchanger, being integrally assembled with the compressor in such a way that the first compressor can be directly and fluidically connected with the compressor. The first heat exchanger liquid-cools the first cooling medium, which is outputted from the compressor, by using the second cooling medium that is cooled by the second heat exchanger.
    Type: Application
    Filed: May 25, 2012
    Publication date: November 29, 2012
    Inventors: Akira MASUDA, Hiroyuki Inaba, Satoshi Haneda, Tatsunari Kawaguchi, Toshiharu Watanabe, Masahiro Tsuda
  • Publication number: 20120243296
    Abstract: A semiconductor memory device includes: plural word lines extending in a first direction; first to third bit lines extending in a second direction that intersects with the first direction; plural variable resistance elements each having a first terminal connected to either one of the first and third bit lines; plural active areas extending in a direction oblique to the first direction while intersecting with the first to third bit lines; plural select transistors provided on the active areas and each having a gate connected to a corresponding one of the word lines, and a current path whose one end is connected to a second terminal of a corresponding one of the variable resistance elements; and plural contact plugs each connecting the other end of the current path of a corresponding one of the select transistors to the second bit line.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 27, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiharu WATANABE, Yoshiaki ASAO
  • Publication number: 20110097862
    Abstract: A semiconductor memory device includes a first memory cell transistor. The first memory cell transistor includes a tunnel insulation film provided on a semiconductor substrate, a floating electrode provided on the tunnel insulation film, an inter-gate insulation film provided on the floating electrode, and a control electrode provided on the inter-gate insulation film. The floating electrode includes a first floating electrode provided on the tunnel insulation film and a second floating electrode provided on one end portion of the first floating electrode, the floating electrode having an L-shaped cross section in a wiring direction of the control electrode.
    Type: Application
    Filed: January 3, 2011
    Publication date: April 28, 2011
    Inventor: Toshiharu WATANABE
  • Patent number: 7884414
    Abstract: A semiconductor memory device includes a first memory cell transistor. The first memory cell transistor includes a tunnel insulation film provided on a semiconductor substrate, a floating electrode provided on the tunnel insulation film, an inter-gate insulation film provided on the floating electrode, and a control electrode provided on the inter-gate insulation film. The floating electrode includes a first floating electrode provided on the tunnel insulation film and a second floating electrode provided on one end portion of the first floating electrode, the floating electrode having an L-shaped cross section in a wiring direction of the control electrode.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: February 8, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshiharu Watanabe
  • Patent number: 7742331
    Abstract: A nonvolatile semiconductor memory device includes a memory cell array which includes a memory cell string including a plurality of memory cells each having a variable resistor element and a switching element having a current path with one end and the other end, between which the variable resistor element is connected, the plurality of memory cells having current paths thereof being connected in series, the memory cell array further including a first select element connected to one end of a current path of the memory cell string, and a second select element connected to the other end of the current path of the memory cell string, a bit line which is electrically connected to one end of a current path of the first select element, and a source line which is electrically connected to one end of a current path of the second select element.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: June 22, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshiharu Watanabe
  • Publication number: 20100074773
    Abstract: A lubricating oil reservoir provided at the bottom of a housing is placed under the compression mechanism or electric motor in the vicinity of the mounting bracket provided on the lower outside of a middle case. The lubricating oil reservoir can be provided efficiently using dead space formed under the compression mechanism in the housing, and the rigidity of the mounting bracket can secure the strength of the lubricating oil reservoir.
    Type: Application
    Filed: February 15, 2008
    Publication date: March 25, 2010
    Inventors: Toshiharu Watanabe, Yutaka Satou, Masaki Watanabe
  • Publication number: 20100021320
    Abstract: The present invention relates to an electric compressor integrally including a compression mechanism and an electric motor, and an object thereof is to prevent the housing from being elongated in the axial direction and improve the sealability and the mountability of the compression mechanism. According to the present invention, a hermetic terminal (45) electrically connecting the electric motor (30) and a motor drive circuit (40) is attached within a swelled-space portion (50) swelled toward radial outside of a housing (11) so as to be continuous with a mounting bracket (17) of the housing (11). Accordingly, the distance between the compression mechanism and motor drive circuit can be shortened.
    Type: Application
    Filed: February 15, 2008
    Publication date: January 28, 2010
    Inventors: Toshiharu Watanabe, Yutaka Satou, Hirotada Shimaguchi, Masaki Watanabe
  • Patent number: 7562733
    Abstract: A radiator core support includes a radiator core support main body that is made of plastic material, a right fixing member and a left fixing member that are made of metal, and a first metal frame. The right fixing member and the left fixing member are fixed on a right side member and a left side member of a motor vehicle body, respectively. The first metal frame extends in a lateral direction of the motor vehicle body so as to connect the right fixing member and the left fixing member with each other and support the radiator core support main body.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: July 21, 2009
    Assignee: Calsonic Kansei Corporation
    Inventors: Toshiharu Watanabe, Hideki Kobayashi, Shinji Araki, Osamu Ito, Eiichi Mori
  • Publication number: 20080246072
    Abstract: In a nonvolatile semiconductor memory device including a memory cell column formed by connecting in series a plurality of memory cells each having a structure in which a charge-storage layer and a control gate are stacked via an insulating layer on a semiconductor substrate, a first selection transistor formed on the semiconductor substrate and connected between one end of the memory cell column and a common source line, and a second selection transistor formed on the semiconductor substrate and connected between the other end of the memory cell column and a bit line, a recessed portion is formed on a surface of the semiconductor substrate between the first selection transistor and a memory cell adjacent to the first selection transistor, and an edge at a side of the first selection transistor in the recessed portion reaches an end portion at a side of the memory cell in a gate of the first selection transistor.
    Type: Application
    Filed: July 5, 2007
    Publication date: October 9, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaki Kondo, Takashi Izumida, Nobutoshi Aoki, Toshiharu Watanabe
  • Publication number: 20080239799
    Abstract: A nonvolatile semiconductor memory device includes a memory cell array which includes a memory cell string including a plurality of memory cells each having a variable resistor element and a switching element having a current path with one end and the other end, between which the variable resistor element is connected, the plurality of memory cells having current paths thereof being connected in series, the memory cell array further including a first select element connected to one end of a current path of the memory cell string, and a second select element connected to the other end of the current path of the memory cell string, a bit line which is electrically connected to one end of a current path of the first select element, and a source line which is electrically connected to one end of a current path of the second select element.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 2, 2008
    Inventor: Toshiharu WATANABE