Abstract: To provide a cockpit module structure for a vehicle where large foot space and a secure and stable supported state can be secured, the body of an air conditioning unit inside which heat exchangers and opening and closing doors are installed is penetrated by a steering member.

Abstract: A heat pump type air conditioning system (A) for an automotive vehicle. The heat type air conditioning system (A) comprises a first unit (10) including a heater core (11) through which an engine coolant of an engine flows, and a first heat exchanger (12) which forms part of a refrigeration cycle including a compressor (1) and a first condenser (3), in which a refrigerant circulates in the refrigeration cycle. A second unit (20) is provided including a second condenser (21) and a second heat exchanger (22) which are fluidly connected in parallel with the first heat exchanger (12). A valve (V2) is fluidly connected in series with the second condenser (21) and disposed such that a part of the refrigerant is introduced through the valve into the second condenser (21) and the second heat exchanger (22).

Abstract: With the present invention, in a memory cell of a stacked-gate NOR flash EEPROM, for example, a SiON film is selectively formed on the sidewalls of a floating gate electrode and the top surface and sidewalls of a control gate electrode. Thereafter, annealing is done in an oxidative atmosphere, thereby carrying out a post-oxidation process. This allows an oxide film to grow gradually at the gate edge portions contacting a tunnel oxide film or interlayer insulating film of the floating gate electrode and control gate electrode. The formation of the SiON film on at least on the sidewalls of the floating gate electrode prevents oxidation at those portions. On the other hand, the gate edge portions of the floating gate electrode eventually become round. By improving the shape of the gate edge portions of the floating gate electrode in this way, an electric field is prevented from concentrating at the gate edge portions of the floating gate electrode.

Abstract: A semiconductor device comprises select gates and control gates of a plurality of memory cells therebetween so that gate members on upper portions of stacked gates may cross element regions. A metal interconnection is disposed parallel to an upper layer of the element region. A source line SL is arranged at intervals of plural bit lines BL. The source line is led to a source line contact through a conductive member composed of a low-resistance metal in the same manner as a bit line contact.

Abstract: The semiconductor memory device comprises first and second memory cell rows each constructed by connecting a plurality of memory cell transistors, and third and fourth memory cell rows which are provided to be respectively adjacent to the first and second memory cell rows, such that element separation regions are respectively provided between adjacent memory cell rows. First and second transistors are connected between a drain or a source of the first memory cell row and a drain or a source of the second memory cell row. Gate electrodes of the first and third transistors are connected by a first gate line, and gate electrodes of the second and fourth transistors are connected by a second gate line. The first and second transistors are connected to a data line by a first contact. The third and fourth transistors are connected to a data line by a second contact.

Abstract: In the semiconductor substrate, an insulation film designed for the element separation is formed. A gate insulation film and a floating gate electrode are formed in the element region surrounded by the insulation film for the element separation. The lower portions of the four lateral surfaces of the floating gate electrode are covered by the interlayer insulation film. The interlayer insulation film is made thicker than the gate insulation film. The upper surface of the floating gate electrode and the upper portions of the four lateral surfaces are covered by the control gate electrode. The upper surface of the control gate electrode is made flat. With this structure, the electrostatic capacitance between the floating gate electrode and the control gate electrode can be increased and stabilized.

Abstract: A heat pump type air conditioning system (A) for an automotive vehicle. The heat type air conditioning system (A) comprises a first unit (10) including a heater core (11) through which an engine coolant of an engine flows, and a first heat exchanger (12) which forms part of a refrigeration cycle including a compressor (1) and a first condenser (3), in which a refrigerant circulates in the refrigeration cycle. A second unit (20) is provided including a second condenser (21) and a second heat exchanger (22) which are fluidly connected in parallel with the first heat exchanger (12). A valve (V2) is fluidly connected in series with the second condenser (21) and disposed such that a part of the refrigerant is introduced through the valve into the second condenser (21) and the second heat exchanger (22).

Abstract: A video camera combined with a recording and reproducing system having a recording and reproducing deck unit having a generally flat shape, a camera unit, a viewfinder unit, and a battery unit. As viewed from the direction perpendicular to the widest surface of the recording and reproducing deck unit, the camera unit, viewfinder unit, and battery unit are arranged so that they are set almost in the projection area of the widest surface.

Abstract: A gate oxide film is formed on the surface of a P-type silicon substrate. A gate electrode is formed on the gate oxide film. Phosphorus is ion-implanted into the P-type silicon substrate, using the gate electrode as a mask. Thus, N.sup.- -type layers of LDD regions are formed in the P-type silicon substrate. Sidewall regions of material having a high dielectric constant are formed on both sides of the gate electrode. The P-type silicon substrate is etched downward adjacent to both the sidewall regions. N.sup.+ -type layers of source and drain regions are formed in the etched surface of the P-type silicon substrate.

Abstract: A semiconductor memory device according to the present invention comprises a plurality of electrically rewritable memory cells, each of which contains a drain and a source, at least one source line coupled to the sources of the memory cells through a contact hole, and bit lines arranged so as to avoid the contact hole.

Abstract: After data is written into a desired memory cell of a memory cell array, a booster circuit verifies the threshold voltage of the memory cell in which data is written. An erase timing signal generation circuit connected to a control circuit generates a timing signal for a short period of time when a memory cell having a threshold voltage higher than the power supply voltage. An erasing voltage generation circuit applies a negative erasing voltage to the memory cell in which data is written for a short period of time according to the timing signal supplied from the erase timing signal generation circuit to slightly lower the threshold voltage of the memory cell so as to prevent the excessive writing.

Abstract: Disclosed is a process for melting aluminum alloy scraps which comprises the steps of: giving a rotation force to molten metal reserved in a cylindrical chamber so that the molten metal is made swollen up along the inner circumferential surface of the cylindrical chamber by a centrifugal force caused by the rotation force while the liquid-phase surface of the molten metal is kept so as to draw a parabola to thereby produce a vortex flow in the molten metal; and introducing aluminum alloy scraps into the vortex flow.

Abstract: A p-type silicon substrate is arranged on an n-type silicon substrate and a trench is formed in the p-type silicon substrate. An insulating film for separating elements from the other is formed along the upper side wall of the trench. A diffusion layer which serves as a capacitor electrode, and a capacitor insulating film are formed in the substrate along the lower side wall of the trench. A storage electrode is formed in the trench. This storage electrode is connected to a diffusion layer of MOSFET via the electrode and the diffusion layer. Even when the diameter of the trench is made small, the surface area of the storage electrode can be kept large enough because the diffusion layer which serves as the capacitor electrode is formed in the substrate along the side wall of the trench.

Abstract: In a semiconductor memory device comprising memory cells connected at the intersections of pairs of bit lines and word lines, sense amplifiers activated by the potentials on common nodes to amplify the potential differences between the respective pairs of the bit lines, an equalizing circuit activated by an equalizing signal to apply the potential on a power supply node to the pairs of bit lines, and a reference potential supplying circuit for generating a reference potential and supplying the reference potential to the power supply node through a switching circuit, a circuit is provided to block the application of the reference potential to the bit lines and the sense amplifier common nodes and to apply a negative potential to the bit lines. The word lines are held at the ground level, so the physical "0" is written into all the memory cells simultaneously.

Abstract: In a stacked capacitor cell structure of a semiconductor memory device, the MIM (metal-insulator-metal) capacitor to be used as a transfer gate comprises at least a unit stack of a first insulation film, a lower capacitor electrode, a capacitor gate insulation film, an upper capacitor electrode, another capacitor gate insulation film and an extension of the lower capacitor electrode. Thus, the surface area of the lower capacitor electrode can be enlarged without increasing the plane area exclusively occupied by memory cells. Moreover, with such a configuration, since the surface area of the lower capacitor electrode can be augmented without increasing the film thickness of the electrode, the technical difficulties that the currently known methods of manufacturing semiconductor memory devices with a stacked capacitor cell structure encounter are effectively eliminated and consequently troubles such as short-circuited lower capacitor electrodes become non-existent.

Abstract: A semiconductor memory device comprises a plurality of conductive planar members stacked while being spaced at predetermined distances, a plurality of conductive wires passing through the planar members, and switching elements and capacitance elements. Both types of elements are formed in the vicinity of each of the cross points of the conductive planar members and the wires.

Abstract: A light-passing decorative object made of light-passing synthetic resin is characterized in that a film piece on which letters, patterns or the like are displayed in such a manner as to be seen therethrough is intimately bonded to a notch-cut back side of a light-passing decorative member. The decorative member is provided a back side thereof with a face brightening device. The face brightening device has optical fibers arranged in parallel relation. The optical fibers being provided with a notched portion so as to be brightened. One ends of the optical fibers are bundled to form a bundle portion and attached to a coupler for coupling to a light source.

Abstract: A method of manufacturing a decorative object made of colorless transparent or colored semi-transparent synthetic resin is provided wherein a film, on which letters, patterns or the like are displayed, is bonded to a notch-cut back side of the object. The steps of the method include setting the film onto a notch-cut and engraved surface of a die half, closing the die half with another die half, and injecting the transparent or semi-transparent synthetic resin into the closed die halves to mold the decorative object and to closely bond the film to the notch-cut surface of the decorative object thus molded.

Abstract: A trench dual-gate MOSFET comprises a projection which is bent to enclose a predetermined region on a semiconductor substrate of a first conductivity type. This projection is defined by a trench formed by selectively removing the surface region of the semiconductor substrate. A gate insulation film is formed on the side wall of the projection and on the semiconductor substrate portion located around the base of the projection. A gate electrode is formed on the side wall of the projection and on the semiconductor substrate portion located around the base of the projection, with the gate insulation film interposed and in a manner to surround the projection. A first impurity region of a second conductivity type, which serves as either a source or drain region, is formed in the top portion of the projection.

Abstract: Non-magnetic metal particles are separated from a mixture by an inclined rotating electrically insulating drum and the action of travelling electromagnetic field. The mixture is introduced at the upper end of the inclined drum which is supported by a rotary iron core through support rods. The rotary iron core and drum are rotated in one direction. Simultaneously, a shifting electromagnetic field is generated along the lower part of the outer periphery of the drum in a direction opposite to the direction of rotation of the drum. As a result, the mixture as it travels through the drum is repeatedly brought upwardly in the direction of drum rotation along the inner surface of the drum due to the frictional force between the mixture and the drum inner surface or upwardly in the direction of the shifting electromagnetic field and then tumbled down onto the bottom of the drum.