Patents by Inventor Toshihide Kikkawa

Toshihide Kikkawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8440549
    Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: May 14, 2013
    Assignees: Fujitsu Limited, Hitachi Cable Co., Ltd.
    Inventors: Kenji Imanishi, Toshihide Kikkawa, Takeshi Tanaka, Yoshihiko Moriya, Yohei Otoki
  • Publication number: 20130105810
    Abstract: A compound semiconductor device includes: a first compound semiconductor layer in which carriers are formed; a second compound semiconductor layer, provided above the first compound semiconductor layer, to supply the carriers; and a third compound semiconductor layer provided above the second compound semiconductor layer, wherein the third compound semiconductor layer includes a area that has a carrier concentration higher than a carrier concentration of the second compound semiconductor layer.
    Type: Application
    Filed: September 13, 2012
    Publication date: May 2, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Masato Nishimori, Toshihiro Ohki, Toshihide Kikkawa
  • Patent number: 8426892
    Abstract: A compound semiconductor device has a buffer layer formed on a conductive SiC substrate, an AlxGa1-xN layer formed on the buffer layer in which an impurity for reducing carrier concentration from an unintentionally doped donor impurity is added and in which the Al composition x is 0<x<1, a GaN-based carrier transit layer formed on the AlxGa1-xN layer, a carrier supply layer formed on the carrier transit layer, a source electrode and a drain electrode formed on the carrier supply layer, and a gate electrode formed on the carrier supply layer between the source electrode and the drain electrode. Therefore, a GaN-HEMT that is superior in device characteristics can be realized in the case of using a relatively less expensive conductive SiC substrate compared with a semi-insulating SiC substrate.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: April 23, 2013
    Assignee: Fujitsu Limited
    Inventors: Kenji Imanishi, Toshihide Kikkawa
  • Patent number: 8426260
    Abstract: A compound semiconductor device includes: an electron transport layer formed over a substrate; an electron supply layer formed over the electron transport layer; and a cap layer formed over the electron supply layer; the cap layer includes a first compound semiconductor layer containing GaN; a second compound semiconductor layer containing AlN, which is formed over the first compound semiconductor layer; a third compound semiconductor layer containing GaN, which is formed over the second compound semiconductor layer; and at least one of a first AlGaN-containing layer and a second AlGaN-containing layer, with the first AlGaN-containing layer formed between the first compound semiconductor layer and the second compound semiconductor layer and the Al content increases toward the second compound semiconductor layer, and the second AlGaN-containing layer formed between the second compound semiconductor layer and the third compound semiconductor layer and the Al content increases toward the second compound semicond
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: April 23, 2013
    Assignee: Fujitsu Limited
    Inventors: Toyoo Miyajima, Toshihide Kikkawa, Kenji Imanishi, Toshihiro Ohki, Masahito Kanamura
  • Publication number: 20130083569
    Abstract: A passivation film is formed on a compound semiconductor layered structure, an electrode formation scheduled position for the passivation film is thinned by dry etching, a thinned portion of the passivation film is penetrated by wet etching to form an opening, and a gate electrode is formed on the passivation film so as to embed this opening by an electrode material.
    Type: Application
    Filed: July 25, 2012
    Publication date: April 4, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi Minoura, Naoya Okamoto, Toshihide Kikkawa, Kozo Makiyama, Toshihiro Ohki
  • Publication number: 20130069129
    Abstract: Disclosed is a compound semiconductor device in which a first protective film, which is homogeneous and composed of a single material (SiN, in this case) and therefore has a uniform dielectric constant, continuously covers a compound semiconductor layer; an oxygen-containing protective component, which is a second protective film composed of an oxide film, is formed so as to cover one edge portion of an opening formed in the first protective film; and a gate electrode is formed so as to fill the opening and so as to embrace therein the second protective film.
    Type: Application
    Filed: September 12, 2012
    Publication date: March 21, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Kozo MAKIYAMA, Toshihide Kikkawa
  • Publication number: 20130032818
    Abstract: A semiconductor device includes a buffer layer that is disposed over a substrate, a high-resistance layer that is disposed over the buffer layer, the high-resistance layer being doped with a transition metal for achieving high resistance, a low-resistance region that is disposed in a portion of the high-resistance layer or over the high-resistance layer, the low-resistance region being doped with an impurity element for achieving low resistance, an electron travel layer that is disposed over the high-resistance layer including the low-resistance region, an electron supply layer that is disposed over the electron travel layer, a gate electrode that is disposed over the electron supply layer, and a source electrode and a drain electrode that are disposed over the electron supply layer.
    Type: Application
    Filed: July 19, 2012
    Publication date: February 7, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Masato Nishimori, Toshihide Kikkawa
  • Patent number: 8357602
    Abstract: An intermediate layer composed of i-AlN is formed between a channel layer and an electron donor layer, a first opening is formed in an electron donor layer, at a position where a gate electrode will be formed later, while using an intermediate layer as an etching stopper, a second opening is formed in the intermediate layer so as to be positionally aligned with the first opening, by wet etching using a hot phosphoric acid solution, and a gate electrode is formed so that the lower portion thereof fill the first and second openings while placing a gate insulating film in between, and so that the head portion thereof projects above the cap structure.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: January 22, 2013
    Assignee: Fujitsu Limited
    Inventors: Masahito Kanamura, Toshihide Kikkawa
  • Patent number: 8344419
    Abstract: An AlN layer (2), a GaN buffer layer (3), a non-doped AlGaN layer (4a), an n-type AlGaN layer (4b), an n-type GaN layer (5), a non-doped AlN layer (6) and an SiN layer (7) are sequentially formed on an SiC substrate (1). At least three openings are formed in the non-doped AlN layer (6) and the SiN layer (7), and a source electrode (8a), a drain electrode (8b) and a gate electrode (19) are evaporated in these openings.
    Type: Grant
    Filed: September 15, 2008
    Date of Patent: January 1, 2013
    Assignee: Fujitsu Limited
    Inventor: Toshihide Kikkawa
  • Publication number: 20120315743
    Abstract: A compound semiconductor device is provided with a substrate, an AlN layer formed over the substrate, an AlGaN layer formed over the AlN layer and larger in electron affinity than the AlN layer, another AlGaN layer formed over the AlGaN layer and smaller in electron affinity than the AlGaN layer. Furthermore, there are provided an i-GaN layer formed over the latter AlGaN layer, and an i-AlGaN layer and an n-AlGaN layer formed over the i-GaN layer.
    Type: Application
    Filed: August 22, 2012
    Publication date: December 13, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Toshihide KIKKAWA, Kenji IMANISHI
  • Patent number: 8294181
    Abstract: A compound semiconductor device is provided with a substrate, an AlN layer formed over the substrate, an AlGaN layer formed over the AlN layer and larger in electron affinity than the AlN layer, another AlGaN layer formed over the AlGaN layer and smaller in electron affinity than the AlGaN layer. Furthermore, there are provided an i-GaN layer formed over the latter AlGaN layer, and an i-AlGaN layer and an n-AlGaN layer formed over the i-GaN layer.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: October 23, 2012
    Assignee: Fujitsu Limited
    Inventors: Toshihide Kikkawa, Kenji Imanishi
  • Patent number: 8278688
    Abstract: A compound semiconductor device includes a carrier transit layer including GaN formed over a substrate; a carrier supply layer including GaN formed over the carrier transit layer; a source electrode and a drain electrode formed over the carrier supply layer; a first compound semiconductor layer including N in which a first opening is formed and that is located between the source electrode and the drain electrode over the carrier supply layer; a gate electrode extending from within the first opening to above the first compound semiconductor layer; and an insulator layer having a second opening that is smaller than the first opening, and insulating the gate electrode and the first compound semiconductor layer within the first opening. The gate electrode extends from within the second opening to above the first compound semiconductor layer.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: October 2, 2012
    Assignee: Fujitsu Limited
    Inventors: Toshihiro Ohki, Toshihide Kikkawa
  • Publication number: 20120241758
    Abstract: A compound semiconductor device is provided with a first nitride semiconductor layer of a first conductivity type, a second nitride semiconductor layer of the first conductivity type which is formed over the first nitride semiconctor layer and being in contact with the first nitride semiconductor layer, a third nitride semiconductor layer of a second conductivity type being in contact with the second nitride semiconductor layer, a fourth nitride semiconductor layer of the first conductivity type being in contact with the third nitride semiconductor layer, and an insulating film insulating the first nitride semiconductor layer and the fourth nitride, semiconductor layer from each other. A source electrode is positioned inside an Outer edge of the insulating film in planar view.
    Type: Application
    Filed: June 11, 2012
    Publication date: September 27, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi MINOURA, Toshihide Kikkawa
  • Patent number: 8264006
    Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: September 11, 2012
    Assignees: Fujitsu Limited, Hitachi Cable Co., Ltd.
    Inventors: Kenji Imanishi, Toshihide Kikkawa, Takeshi Tanaka, Yoshihiko Moriya, Yohei Otoki
  • Patent number: 8264005
    Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: September 11, 2012
    Assignee: Fujitsu Limited
    Inventors: Kenji Imanishi, Toshihide Kikkawa, Takeshi Tanaka, Yoshihiko Moriya, Yohei Otoki
  • Publication number: 20120217543
    Abstract: At least one kind of impurity selected from, for example, Fe, C, B, Ti, Cr is introduced into at least a buffer layer of a compound semiconductor layered structure from a rear surface of the compound semiconductor layered structure to make a resistance value of the buffer layer high.
    Type: Application
    Filed: December 16, 2011
    Publication date: August 30, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi MINOURA, Toshihide Kikkawa, Toshihiro Ohki
  • Publication number: 20120220089
    Abstract: A gate electrode is formed so as to embed an electrode material in a recess for an electrode, which has been formed in a structure of stacked compound semiconductors, through a gate insulation film, and also a field plate electrode that comes in Schottky contact with the structure of the stacked compound semiconductors is formed by embedding an electrode material in a recess for an electrode, which has been formed in the structure of the stacked compound semiconductors so that the field plate electrode directly comes in contact with the structure of the stacked compound semiconductors at least on the bottom face of the recess for the electrode.
    Type: Application
    Filed: December 14, 2011
    Publication date: August 30, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Tadahiro IMADA, Toshihide Kikkawa
  • Publication number: 20120211762
    Abstract: A semiconductor device includes: a semiconductor chip having an electrode; a lead corresponding to the electrode; a metal line coupling the electrode to the lead; a first resin portion covering a coupling portion between the metal line and the electrode and a coupling portion between the metal line and the lead; and a second resin portion covering the metal line, the first resin portion, and the semiconductor chip.
    Type: Application
    Filed: December 22, 2011
    Publication date: August 23, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Tadahiro IMADA, Keishiro Okamoto, Nobuhiro Imaizumi, Toshihide Kikkawa
  • Publication number: 20120205662
    Abstract: A semiconductor device includes: a semiconductor layer formed over a substrate; an insulating film formed over the semiconductor layer; and an electrode formed over the insulating film, wherein the insulating film includes an amorphous film including carbon.
    Type: Application
    Filed: January 25, 2012
    Publication date: August 16, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Norikazu Nakamura, Shirou Ozaki, Masayuki Takeda, Toyoo Miyajima, Toshihiro Ohki, Masahito Kanamura, Kenji Imanishi, Toshihide Kikkawa, Keiji Watanabe
  • Publication number: 20120208331
    Abstract: A vertical type GaN series field effect transistor having excellent pinch-off characteristics is provided. A compound semiconductor device includes a conductive semiconductor substrate, a drain electrode formed on a bottom surface of the conductive semiconductor substrate, a current blocking layer formed on a top surface of the conductive semiconductor substrate, made of high resistance compound semiconductor or insulator, and having openings, an active layer of compound semiconductor burying the openings and extending on an upper surface of the current blocking layer, a gate electrode formed above the openings and above the active layer, and a source electrode formed laterally spaced from the gate electrode and formed above the active layer.
    Type: Application
    Filed: April 24, 2012
    Publication date: August 16, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Toshihide KIKKAWA