Patents by Inventor Toshihide Kikkawa

Toshihide Kikkawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120196419
    Abstract: In an MIS-type GaN-FET, a base layer made of a conductive nitride including no oxygen, here, TaN, is provided on a surface layer as a nitride semiconductor layer to cover at least an area of a lower face of a gate insulation film made of Ta2O5 under a gate electrode.
    Type: Application
    Filed: April 10, 2012
    Publication date: August 2, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Masahito KANAMURA, Toshihide Kikkawa
  • Publication number: 20120146728
    Abstract: A compound semiconductor device is provided with a compound semiconductor layer and a gate electrode formed on the compound semiconductor layer via a gate insulating film, in which the gate insulating film is one in which SixNy is contained as an insulating material, SixNy is 0.638?x/y?0.863, and a hydrogen-terminated group concentration is set to a value within a range of not less than 2×1022/cm3 nor more than 5×1022/cm3.
    Type: Application
    Filed: October 21, 2011
    Publication date: June 14, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kozo MAKIYAMA, Toshihide Kikkawa
  • Publication number: 20120146097
    Abstract: A semiconductor device includes a first semiconductor layer disposed over a substrate, a second semiconductor layer disposed over the first semiconductor layer, a gate recess disposed, through removal of a part of or all the second semiconductor layer, in a predetermined region over the first semiconductor layer, an insulating film disposed over the gate recess and the second semiconductor layer, a gate electrode disposed over the gate recess with the insulating film therebetween, and a source electrode and a drain electrode disposed over the first semiconductor layer or the second semiconductor layer, whereby a central portion of the gate recess is higher than a peripheral portion of the gate recess.
    Type: Application
    Filed: November 11, 2011
    Publication date: June 14, 2012
    Applicant: Fujitsu Limited
    Inventors: Hiroshi ENDO, Toshihiro Ohki, Toshihide Kikkawa
  • Publication number: 20120138944
    Abstract: A compound semiconductor device includes: a compound semiconductor layer; a first film formed over the compound semiconductor layer, the first film being in a negatively charged state or a non-charged state at an interface with the compound semiconductor layer; a second film formed over the first film, the second film being in a positively charged state at an interface with the first film; and a gate electrode to be embedded in an opening formed in the second film.
    Type: Application
    Filed: November 11, 2011
    Publication date: June 7, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Masahito KANAMURA, Toshihide KIKKAWA, Kenji IMANISHI
  • Publication number: 20120139038
    Abstract: A first AlGaN layer formed over a substrate, a second AlGaN layer formed over the first AlGaN layer, an electron transit layer formed over the second AlGaN layer, and an electron supply layer formed over the electron transit layer are provided. A relationship of “0?x1<x2?1” is found when a composition of the first AlGaN layer is represented by Alx1Ga1-x1N, and a composition of the second AlGaN layer is represented by Alx2Ga1-x2N. Negative charges exist at an upper surface of the AlGaN layer more than positive charges existing at a lower surface of the AlGaN layer.
    Type: Application
    Filed: September 21, 2011
    Publication date: June 7, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kenji IMANISHI, Toshihide Kikkawa
  • Publication number: 20120138948
    Abstract: A compound semiconductor device includes: an electron transport layer formed over a substrate; an electron supply layer formed over the electron transport layer; and a cap layer formed over the electron supply layer; the cap layer includes a first compound semiconductor layer containing GaN; a second compound semiconductor layer containing AlN, which is formed over the first compound semiconductor layer; a third compound semiconductor layer containing GaN, which is formed over the second compound semiconductor layer; and at least one of a first AlGaN-containing layer and a second AlGaN-containing layer, with the first AlGaN-containing layer formed between the first compound semiconductor layer and the second compound semiconductor layer and the Al content increases toward the second compound semiconductor layer, and the second AlGaN-containing layer formed between the second compound semiconductor layer and the third compound semiconductor layer and the Al content increases toward the second compound semicond
    Type: Application
    Filed: November 11, 2011
    Publication date: June 7, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Toyoo MIYAJIMA, Toshihide KIKKAWA, Kenji IMANISHI, Toshihiro OHKI, Masahito KANAMURA
  • Patent number: 8193539
    Abstract: A compound semiconductor device includes: a conductive SiC substrate; an AlN buffer layer formed on said conductive SiC substrate and containing Cl; a compound semiconductor buffer layer formed on said AlN layer which contains Cl, said compound semiconductor buffer layer not containing Cl; and a device constituent layer or layers formed above said compound semiconductor buffer layer not containing Cl.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: June 5, 2012
    Assignee: Fujitsu Limited
    Inventors: Toshihide Kikkawa, Kenji Imanishi
  • Patent number: 8183572
    Abstract: A vertical type GaN series field effect transistor having excellent pinch-off characteristics is provided. A compound semiconductor device includes a conductive semiconductor substrate, a drain electrode formed on a bottom surface of the conductive semiconductor substrate, a current blocking layer formed on a top surface of the conductive semiconductor substrate, made of high resistance compound semiconductor or insulator, and having openings, an active layer of compound semiconductor burying the openings and extending on an upper surface of the current blocking layer, a gate electrode formed above the openings and above the active layer, and a source electrode formed laterally spaced from the gate electrode and formed above the active layer.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: May 22, 2012
    Assignee: Fujitsu Limited
    Inventor: Toshihide Kikkawa
  • Patent number: 8173529
    Abstract: In an MIS-type GaN-FET, a base layer made of a conductive nitride including no oxygen, here, TaN, is provided on a surface layer as a nitride semiconductor layer to cover at least an area of a lower face of a gate insulation film made of Ta2O5 under a gate electrode.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: May 8, 2012
    Assignee: Fujitsu Limited
    Inventors: Masahito Kanamura, Toshihide Kikkawa
  • Publication number: 20120091522
    Abstract: A semiconductor device includes a first semiconductor layer formed over a substrate, a second semiconductor layer formed over the first semiconductor layer, a source electrode and a drain electrode formed over the second semiconductor layer, an insulating film formed over the second semiconductor layer, a gate electrode formed over the insulating film, and a protection film covering the insulating film, the protection film being formed by thermal CVD, thermal ALD, or vacuum vapor deposition.
    Type: Application
    Filed: October 19, 2011
    Publication date: April 19, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Masahito Kanamura, Norikazu Nakamura, Toyoo Miyajima, Masayuki Takeda, Keiji Watanabe, Toshihide Kikkawa, Kenji Imanishi, Toshihiro Ohki, Tadahiro Imada
  • Publication number: 20120067275
    Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.
    Type: Application
    Filed: September 20, 2011
    Publication date: March 22, 2012
    Applicants: HITACHI CABLE CO., LTD., FUJITSU LIMITED
    Inventors: Kenji Imanishi, Toshihide Kikkawa, Takeshi Tanaka, Yoshihiko Moriya, Yohei Otoki
  • Publication number: 20120056191
    Abstract: A semiconductor device includes a GaN electron transport layer provided over a substrate; a first AlGaN electron supply layer provided over the GaN electron transport layer; an AlN electron supply layer provided over the first AlGaN electron supply layer; a second AlGaN electron supply layer provided over the AlN electron supply layer; a gate recess provided in the second AlGaN electron supply layer and the AlN electron supply layer; and a gate electrode provided over the gate recess.
    Type: Application
    Filed: June 3, 2011
    Publication date: March 8, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Endo, Tadahiro Imada, Kenji Imanishi, Toshihide Kikkawa
  • Publication number: 20110297957
    Abstract: A method for manufacturing a compound semiconductor structure, includes (a) selecting a conductive SiC substrate in accordance with color and resistivity and (b) epitaxially growing a GaN series compound semiconductor layer on the selected conductive SiC substrate. The step (a) preferably selects a conductive SiC substrate whose main color is green, whose conductivity type is n-type and whose resistivity is 0.08 52 cm to 1×105 ?cm, or whose main color is black, whose conductivity type is p-type and whose resistivity is 1×103 ?cm to 1×105?cm, or whose main color is blue, whose conductivity type is p-type and whose resistivity is 10 ?cm to 1×105 ?cm. The step (b) preferably includes (b-1) growing an AlInGaN layer having a thickness not thinner than 10 ?m on the conductive SiC substrate by hydride VPE.
    Type: Application
    Filed: August 15, 2011
    Publication date: December 8, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Toshihide Kikkawa, Kenji Imanishi
  • Publication number: 20110272704
    Abstract: An AlN layer (2), a GaN buffer layer (3), a non-doped AlGaN layer (4a), an n-type AlGaN layer (4b), an n-type GaN layer (5), a non-doped AlN layer (6) and an SiN layer (7) are sequentially formed on an SiC substrate (1). At least three openings are formed in the non-doped AlN layer (6) and the SiN layer (7), and a source electrode (8a), a drain electrode (8b) and a gate electrode (19) are evaporated in these openings.
    Type: Application
    Filed: July 19, 2011
    Publication date: November 10, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Toshihide KIKKAWA
  • Publication number: 20110275199
    Abstract: An AlN layer (2), a GaN buffer layer (3), a non-doped AlGaN layer (4a), an n-type AlGaN layer (4b), an n-type GaN layer (5), a non-doped AlN layer (6) and an SiN layer (7) are sequentially formed on an SiC substrate (1). At least three openings are formed in the non-doped AlN layer (6) and the SiN layer (7), and a source electrode (8a), a drain electrode (8b) and a gate electrode (19) are evaporated in these openings.
    Type: Application
    Filed: July 19, 2011
    Publication date: November 10, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Toshihide KIKKAWA
  • Patent number: 8044492
    Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: October 25, 2011
    Assignees: Fujitsu Limited, Hitachi Cable Co., Ltd.
    Inventors: Kenji Imanishi, Toshihide Kikkawa, Takeshi Tanaka, Yoshihiko Moriya, Yohei Otoki
  • Patent number: 8030164
    Abstract: A method for manufacturing a compound semiconductor structure, includes (a) selecting a conductive SiC substrate in accordance with color and resistivity and (b) epitaxially growing a GaN series compound semiconductor layer on the selected conductive SiC substrate. The step (a) preferably selects a conductive SiC substrate whose main color is green, whose conductivity type is n-type and whose resistivity is 0.08 ?cm to 1×105 ?cm, or whose main color is black, whose conductivity type is p-type and whose resistivity is 1×103 ?cm to 1×105 ?cm, or whose main color is blue, whose conductivity type is p-type and whose resistivity is 10 ?cm to 1×105 ?cm. The step (b) preferably includes (b-1) growing an AlInGaN layer having a thickness not thinner than 10 ?m on the conductive SiC substrate by hydride VPE.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: October 4, 2011
    Assignee: Fujitsu Limited
    Inventors: Toshihide Kikkawa, Kenji Imanishi
  • Patent number: 8030638
    Abstract: A compound semiconductor device is manufactured by using a polycrystalline SiC substrate, the compound semiconductor device having a buffer layer being formed on the substrate and having a high thermal conductivity of SiC and aligned orientations of crystal axes. The method for manufacturing the compound semiconductor device includes: forming a mask pattern on a polycrystalline SiC substrate, the mask pattern having an opening of a stripe shape defined by opposing parallel sides or a hexagonal shape having an apex angle of 120 degrees and exposing the surface of the polycrystalline SiC substrate in the opening; growing a nitride semiconductor buffer layer, starting growing on the polycrystalline SiC substrate exposed in the opening of the mask pattern, burying the mask pattern, and having a flat surface; and growing a GaN series compound semiconductor layer on the nitride semiconductor buffer layer.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: October 4, 2011
    Assignee: Fujitsu Limited
    Inventor: Toshihide Kikkawa
  • Patent number: 7989278
    Abstract: The compound semiconductor device comprises an i-GaN buffer layer 12 formed on an SiC substrate 10; an n-AlGaN electron supplying layer 16 formed on the i-GaN buffer layer 12; an n-GaN cap layer 18 formed on the n-AlGaN electron supplying layer 16; a source electrode 20 and a drain electrode 22 formed on the n-GaN cap layer 18; a gate electrode 26 formed on the n-GaN cap layer 18 between the source electrode 20 and the drain electrode 22; a first protection layer 24 formed on the n-GaN cap layer 18 between the source electrode 20 and the drain electrode 22; and a second protection layer 30 buried in an opening 28 formed in the first protection layer 24 between the gate electrode 26 and the drain electrode 22 down to the n-GaN cap layer 18 and formed of an insulation film different from the first protection layer.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: August 2, 2011
    Assignee: Fujitsu Limited
    Inventor: Toshihide Kikkawa
  • Patent number: 7948062
    Abstract: A semiconductor device including a compound semiconductor laminated structure having a plurality of compound semiconductor layers formed over a semiconductor substrate, a first insulation film covering at least a part of a surface of the compound semiconductor laminated structure, and a second insulation film formed on the first insulation film, wherein the second insulation film includes more hydrogen than the first insulation film.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: May 24, 2011
    Assignee: Fujitsu Limited
    Inventors: Kozo Makiyama, Toshihiro Ohki, Masahito Kanamura, Toshihide Kikkawa