Patents by Inventor Toshihide Nabatame

Toshihide Nabatame has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11486843
    Abstract: The present invention is to provide a small-sized dryness/wetness responsive sensor that detects a galvanic current with a high sensitivity as a principle of operation. According to one embodiment of the present invention, a dryness/wetness responsive sensor comprises a thin wire made of a first metal and a thin wire made of a second metal, the second metal is different from the first metal, the thin wire of the first metal and the thin wire of the second metal are disposed in juxtaposition with each other on an insulating substrate, and a surface state of a part between the thin wire of the first metal and the thin wire of the second metal is hydrophilic or hydrophobic.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: November 1, 2022
    Assignee: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Jin Kawakita, Akihiko Ohi, Tomoko Ohki, Naoki Ikeda, Toshihide Nabatame, Toyohiro Chikyo
  • Publication number: 20200249185
    Abstract: The present invention is to provide a small-sized dryness/wetness responsive sensor that detects a galvanic current with a high sensitivity as a principle of operation. According to one embodiment of the present invention, a dryness/wetness responsive sensor comprises a thin wire made of a first metal and a thin wire made of a second metal, the second metal is different from the first metal, the thin wire of the first metal and the thin wire of the second metal are disposed in juxtaposition with each other on an insulating substrate, and a surface state of a part between the thin wire of the first metal and the thin wire of the second metal is hydrophilic or hydrophobic.
    Type: Application
    Filed: August 23, 2018
    Publication date: August 6, 2020
    Applicant: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Jin KAWAKITA, Akihiko OHI, Tomoko OHKI, Naoki IKEDA, Toshihide NABATAME, Toyohiro CHIKYO
  • Publication number: 20190145920
    Abstract: The present invention improves the sensitivity and the responsiveness of a dryness/wetness responsive sensor utilizing a galvanic current, allowing for downsizing of the dryness/wetness responsive sensor. Instead of the conventional structure in which an anode electrode and a cathode electrode are stacked with an intervening insulator, the present invention employs a structure in which both electrodes run in juxtaposition with each other on an insulating substrate in the form of, for example, a comb-shaped electrode as shown in the drawing. By utilizing a semiconductor manufacturing process or any other micro/nano-fabrication technology, an inter-electrode distance can be extremely shortened as compared with the conventional sensors, allowing enhancing the sensitivity per unit footprint of the electrodes. Accordingly, a decrease in the size of the dryness/wetness responsive sensor can be easily achieved.
    Type: Application
    Filed: December 19, 2018
    Publication date: May 16, 2019
    Applicant: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Jin KAWAKITA, Tadashi SHINOHARA, Toyohiro CHIKYO, Toshihide NABATAME, Akihiko OHI, Tomoko OHKI
  • Patent number: 10290802
    Abstract: The forming voltage of a variable resistance device used in a non-volatile memory and the like is decreased, and repetition characteristics are improved. In an element structure in which a metal oxide film is sandwiched between a lower electrode and an upper electrode, an island-shaped/particulate region of amorphous aluminum oxide or aluminum oxycarbide is formed on the metal oxide film. Because an oxide deficiency, serving as the nucleus of a filament for implementing an on/off operation of the variable resistance device, is formed from the beginning under the island-shaped or particulate aluminum oxide or the like, the conventional creation of an oxide deficiency by high-voltage application in the initial period of forming can be eliminated. Such a region can be fabricated using a small number of cycles of an ALD process.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: May 14, 2019
    Assignee: National Insitute for Materials Science
    Inventors: Toshihide Nabatame, Tadaaki Nagao
  • Patent number: 10267756
    Abstract: A dryness/wetness responsive sensor having decreased size, and improved sensitivity and responsiveness. The present invention comprises a thin wire of a first metal and a thin wire of a second metal, which is different from the first metal, wherein the thin wires run in juxtaposition with each other on an insulating substrate, and wherein the spacing between the first thin wire and the second thin wire is in the range of 5 nm or more and less than 20 ?m.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: April 23, 2019
    Assignee: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Jin Kawakita, Tadashi Shinohara, Toyohiro Chikyo, Toshihide Nabatame, Akihiko Ohi, Tomoko Ohki
  • Publication number: 20170346006
    Abstract: The forming voltage of a resistance change element used in a non-volatile memory and the like is decreased, and repetition characteristics are improved. In an element structure in which a metal oxide film 12 is sandwiched between a lower electrode 11 and an upper electrode 14, an island/particle-like region of amorphous aluminum oxide or aluminum oxycarbide 13 is formed on the metal oxide film 12. Because an oxide deficiency, serving as the nucleus of a filament for implementing an on/off operation of the resistance change element, is formed from the beginning under the island- or particle-like aluminum oxide or the like, the conventional creation of an oxide deficiency by high-voltage application in the initial period of forming can be eliminated. Such a region can be fabricated using a small number of cycles of an ALD process.
    Type: Application
    Filed: January 13, 2016
    Publication date: November 30, 2017
    Applicant: National Institute for Materials Science
    Inventors: Toshihide NABATAME, Tadaaki NAGAO
  • Patent number: 9825180
    Abstract: The present invention provides a thin-film transistor in which transistor characteristics such as drain current and threshold voltage are improved, and a method of manufacturing the same. The present invention provides a thin-film transistor provided with a source electrode (108), a drain electrode (109), a semiconductor layer (105), a gate electrode (103), and an insulating layer (104); wherein the semiconductor layer (105) contains a composite metal oxide obtained by adding to a first metal oxide an oxide having an oxygen dissociation energy that is at least 200 kJ/mol greater than the oxygen dissociation energy of the first metal oxide, whereby the amount of oxygen vacancy is controlled; and the insulating layer (104) is provided with an SiO2 layer, a high-permittivity first layer, and a high-permittivity second layer, whereby the dipoles generated at the boundary between the SiO2 layer and the high-permittivity layers are used to control the threshold voltage.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: November 21, 2017
    Assignee: National Institute for Materials Science
    Inventors: Toshihide Nabatame, Kazuhito Tsukagoshi, Shinya Aikawa, Toyohiro Chikyo
  • Patent number: 9741864
    Abstract: The present invention provides a thin-film transistor in which transistor characteristics such as drain current and threshold voltage are improved, and a method of manufacturing the same. The present invention provides a thin-film transistor provided with a source electrode (108), a drain electrode (109), a semiconductor layer (105), a gate electrode (103), and an insulating layer (104); wherein the semiconductor layer (105) contains a composite metal oxide obtained by adding to a first metal oxide an oxide having an oxygen dissociation energy that is at least 200 kJ/mol greater than the oxygen dissociation energy of the first metal oxide, whereby the amount of oxygen vacancy is controlled; and the insulating layer (104) is provided with an SiO2 layer, a high-permittivity first layer, and a high-permittivity second layer, whereby the dipoles generated at the boundary between the SiO2 layer and the high-permittivity layers are used to control the threshold voltage.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: August 22, 2017
    Assignee: National Institute for Materials Science
    Inventors: Toshihide Nabatame, Kazuhito Tsukagoshi, Shinya Aikawa
  • Publication number: 20170167995
    Abstract: The present invention improves the sensitivity and the responsiveness of a dryness/wetness responsive sensor utilizing a galvanic current, allowing for downsizing of the dryness/wetness responsive sensor. Instead of the conventional structure in which an anode electrode and a cathode electrode are stacked with an intervening insulator, the present invention employs a structure in which both electrodes run in juxtaposition with each other on an insulating substrate in the form of, for example, a comb-shaped electrode as shown in the drawing. By utilizing a semiconductor manufacturing process or any other micro/nano-fabrication technology, an inter-electrode distance can be extremely shortened as compared with the conventional sensors, allowing enhancing the sensitivity per unit footprint of the electrodes. Accordingly, a decrease in the size of the dryness/wetness responsive sensor can be easily achieved.
    Type: Application
    Filed: July 21, 2015
    Publication date: June 15, 2017
    Applicant: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Jin KAWAKITA, Tadashi SHINOHARA, Toyohiro CHIKYO, Toshihide NABATAME, Akihiko OHI, Tomoko OHKI
  • Publication number: 20160365455
    Abstract: The present invention provides a thin-film transistor in which transistor characteristics such as drain current and threshold voltage are improved, and a method of manufacturing the same. The present invention provides a thin-film transistor provided with a source electrode (108), a drain electrode (109), a semiconductor layer (105), a gate electrode (103), and an insulating layer (104); wherein the semiconductor layer (105) contains a composite metal oxide obtained by adding to a first metal oxide an oxide having an oxygen dissociation energy that is at least 200 kJ/mol greater than the oxygen dissociation energy of the first metal oxide, whereby the amount of oxygen vacancy is controlled; and the insulating layer (104) is provided with an SiO2 layer, a high-permittivity first layer, and a high-permittivity second layer, whereby the dipoles generated at the boundary between the SiO2 layer and the high-permittivity layers are used to control the threshold voltage.
    Type: Application
    Filed: August 26, 2016
    Publication date: December 15, 2016
    Applicant: National Institute for Materials Science
    Inventors: Toshihide Nabatame, Kazuhito Tsukagoshi, Shinya Aikawa, Toyohiro Chikyo
  • Publication number: 20160118501
    Abstract: The present invention provides a thin-film transistor in which transistor characteristics such as drain current and threshold voltage are improved, and a method of manufacturing the same. The present invention provides a thin-film transistor provided with a source electrode (108), a drain electrode (109), a semiconductor layer (105), a gate electrode (103), and an insulating layer (104); wherein the semiconductor layer (105) contains a composite metal oxide obtained by adding to a first metal oxide an oxide having an oxygen dissociation energy that is at least 200 kJ/mol greater than the oxygen dissociation energy of the first metal oxide, whereby the amount of oxygen vacancy is controlled; and the insulating layer (104) is provided with an SiO2 layer, a high-permittivity first layer, and a high-permittivity second layer, whereby the dipoles generated at the boundary between the SiO2 layer and the high-permittivity layers are used to control the threshold voltage.
    Type: Application
    Filed: May 2, 2014
    Publication date: April 28, 2016
    Applicant: National Institute for Materials Science
    Inventors: Toshihide NABATAME, Kazuhito TSUKAGOSHI, Shinya AIKAWA, Toyohiro CHIKYO
  • Publication number: 20160056409
    Abstract: Provided is an organic EL element which has excellent luminous efficiency by improving the cathode. An organic EL element which is configured of a cathode, an anode and one or more organic compound layers provided between the electrodes, and wherein the cathode is formed of a transparent conductive film that is formed on a glass substrate and is configured from an indium oxide compound and an element having a high work function, so that the cathode has a high work function matched to the HOMO of an organic hole transport layer among the organic compound layers. Consequently, holes can be easily injected from the cathode to the organic hole transport layer, and the present invention is therefore suitable for manufacturing an organic EL element having excellent luminous efficiency.
    Type: Application
    Filed: March 28, 2014
    Publication date: February 25, 2016
    Applicant: National Institute for Materials Science
    Inventors: Toshihide NABATAME, Kazuhito TSUKAGOSHI, Shinya AIKAWA
  • Patent number: 8759925
    Abstract: To provide a method for reducing a thickness of an interfacial layer, which contains: (a) forming a film of an oxide of a first metal on a semiconductor layer via an oxide film of a semiconductor serving as an interfacial layer; and (b) forming a film of an oxide of a second metal on the film of the oxide of the first metal, where the second metal has higher valency than that of the first metal.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: June 24, 2014
    Assignee: National Institute for Materials Science
    Inventors: Naoto Umezawa, Toyohiro Chikyo, Toshihide Nabatame
  • Publication number: 20140061872
    Abstract: To provide a method for reducing a thickness of an interfacial layer, which contains: (a) forming a film of an oxide of a first metal on a semiconductor layer via an oxide film of a semiconductor serving as an interfacial layer; and (b) forming a film of an oxide of a second metal on the film of the oxide of the first metal, where the second metal has higher valency than that of the first metal.
    Type: Application
    Filed: October 4, 2013
    Publication date: March 6, 2014
    Applicant: National Institute for Materials Science
    Inventors: Naoto UMEZAWA, Toyohiro CHIKYO, Toshihide NABATAME
  • Patent number: 8575038
    Abstract: To provide a method for reducing a thickness of an interfacial layer, which contains: (a) forming a film of an oxide of a first metal on a semiconductor layer via an oxide film of a semiconducdor serving as an interfacial layer; and (b) forming a film of an oxide of a second metal on the film of the oxide of the first metal, where the second metal has higher valency than that of the first metal.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: November 5, 2013
    Assignee: National Institute for Materials Science
    Inventors: Naoto Umezawa, Toyohiro Chikyo, Toshihide Nabatame
  • Publication number: 20120280372
    Abstract: To provide a method for reducing a thickness of an interfacial layer, which contains: (a) forming a film of an oxide of a first metal on a semiconductor layer via an oxide film of a semiconducdor serving as an interfacial layer; and (b) forming a film of an oxide of a second metal on the film of the oxide of the first metal, where the second metal has higher valency than that of the first metal.
    Type: Application
    Filed: May 29, 2012
    Publication date: November 8, 2012
    Inventors: Naoto Umezawa, Toyohiro Chikyo, Toshihide Nabatame
  • Patent number: 8207584
    Abstract: After forming a pure silicon oxide film on respective surfaces of an n-type well and a p-type well, an oxygen deficiency adjustment layer made of an oxide of 2A group elements, an oxide of 3A group elements, an oxide of 3B group elements, an oxide of 4A group elements, an oxide of 5A group elements or the like, a high dielectric constant film, and a conductive film having a reduction catalyst effect to hydrogen are sequentially deposited on the silicon oxide film, and the substrate is heat treated in the atmosphere containing H2, thereby forming a dipole between the oxygen deficiency adjustment layer and the silicon oxide film. Then, the conductive film, the high dielectric constant film, the oxygen deficiency adjustment layer, the silicon oxide film and the like are patterned, thereby forming a gate electrode and a gate insulating film.
    Type: Grant
    Filed: December 6, 2008
    Date of Patent: June 26, 2012
    Assignees: Renesas Electronics Corporation, Rohm Co., Ltd.
    Inventors: Toshihide Nabatame, Kunihiko Iwamoto, Yuuichi Kamimuta
  • Patent number: 8168547
    Abstract: The transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide with a relative dielectric constant higher than that of silicon oxide are improved. After a high dielectric layer made of hafnium oxide is formed on a main surface of a semiconductor substrate, the main surface of the semiconductor substrate is heat-treated in a non-oxidation atmosphere. Next, an oxygen supplying layer made of hafnium oxide deposited by ALD and having a thickness smaller than that of the high dielectric layer is formed on the high dielectric layer, and a cap layer made of tantalum nitride is formed. Thereafter, the main surface of the semiconductor substrate is heat-treated.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: May 1, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Toshihide Nabatame
  • Publication number: 20100301429
    Abstract: In a p-channel-type field-effect transistor having a metal gate electrode, a technique capable of stably obtaining a desired threshold voltage is provided. On a gate insulating film composed of a HfSiON film and formed on a semiconductor substrate, there is formed a metal gate electrode partially having a conductive film with a Me1-xAlxOy (0.2?x?0.75, 0.2?y?1.5) composition having a Me-O—Al—O-Me bond or a metal gate electrode partially having a conductive film with a Me1-xAlxN1-zOz (0.2?x?0.75, 0.1?z?0.9) composition having a Me-O—Al—N-Me bond.
    Type: Application
    Filed: March 20, 2010
    Publication date: December 2, 2010
    Inventor: TOSHIHIDE NABATAME
  • Patent number: 7820503
    Abstract: An object of the present invention is to simplify manufacturing process of an n channel MIS transistor and a p channel MIS transistor with gate electrodes formed of a metal material. For its achievement, gate electrodes of each of the n channel MIS transistor and the p channel MIS transistor are simultaneously formed by patterning ruthenium film deposited on a gate insulator. Next, by introducing oxygen into each of the gate electrodes, the gate electrodes are transformed into those having high work function. Thereafter, by selectively reducing the gate electrode of the n channel MIS transistor, it is transformed into a gate electrode having low work function.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: October 26, 2010
    Assignees: Renesas Electronics Corporation, Tokyo Electron Limited
    Inventors: Toshihide Nabatame, Masaru Kadoshima, Hiroyuki Takaba