Patents by Inventor Toshihide Tsubata

Toshihide Tsubata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170061912
    Abstract: In one embodiment of the present invention, each pixel includes first and second subpixels. CS bus lines connected to the respective storage capacitors of the first and second subpixels are electrically independent of each other. A CS voltage has a waveform that inverts its polarity at least once a frame, which includes a first subframe for sequentially scanning a series of odd rows and a second SF for sequentially scanning even rows that have been skipped during the first SF. A source signal voltage varies so as to have two frames or subframes with mutually opposite polarities. A CS voltage has a waveform that has quite opposite consequences on the effective voltage of a subpixel of a pixel connected to the jth scan line to be selected during the first subframe and on that of another subpixel of a pixel connected to the (j+1)th scan line to be selected during the second subframe.
    Type: Application
    Filed: October 20, 2015
    Publication date: March 2, 2017
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masae KITAYAMA, Fumikazu SHIMOSHIKIRYOH, Kentaroh IRIE, Toshihide TSUBATA, Naoshi YAMADA, Hidetoshi NAKAGAWA
  • Patent number: 9196206
    Abstract: In one embodiment of the present invention, each pixel includes first and second subpixels. CS bus lines connected to the respective storage capacitors of the first and second subpixels are electrically independent of each other. A CS voltage has a waveform that inverts its polarity at least once a frame, which includes a first subframe for sequentially scanning a series of odd rows and a second SF for sequentially scanning even rows that have been skipped during the first SF. A source signal voltage varies so as to have two frames or subframes with mutually opposite polarities. A CS voltage has a waveform that has quite opposite consequences on the effective voltage of a subpixel of a pixel connected to the jth scan line to be selected during the first subframe and on that of another subpixel of a pixel connected to the (j+1)th scan line to be selected during the second subframe.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: November 24, 2015
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masae Kitayama, Fumikazu Shimoshikiryoh, Kentaroh Irie, Toshihide Tsubata, Naoshi Yamada, Hidetoshi Nakagawa
  • Patent number: 9019455
    Abstract: A liquid crystal display device includes a vertical alignment liquid crystal layer, first and second substrates, first and second electrodes, and a pixel region which includes first, second, third and fourth liquid crystal domains in which liquid crystal molecules are tilted in first, second, third and fourth directions, respectively. The first liquid crystal domain is located close to at least a part of an edge of the first electrode, the second liquid crystal domain is located close to at least a part of another edge of the first electrode, the third liquid crystal domain is located close to at least a part of still another edge of the first electrode, and the fourth liquid crystal domain is located close to at least a part of yet another edge of the first electrode.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: April 28, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akihiro Shoraku, Toshihide Tsubata, Koichi Miyachi, Iichiro Inoue, Akihiro Yamamoto, Yoshito Hashimoto, Masumi Kubo, Akihito Jinda
  • Patent number: 9019459
    Abstract: The present invention provides a liquid crystal display panel which can prevent an electric short circuit (leakage) between a pair of substrates with no additional production step in the case where a multilayer spacer is used. The present invention is a liquid crystal display panel comprising: a pair of substrates; and a liquid crystal layer between the substrates, wherein a first substrate of the substrates has a support substrate, a plurality of pixel electrodes, transparent colored layers of plural colors overlapping with the pixel electrodes, and a multilayer spacer formed of a stacked body of three or more resin layers including transparent colored layers of plural colors, and a second substrate of the substrates has a supporting substrate and a common electrode.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: April 28, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshitaka Okumoto, Toshinori Sugihara, Toshihide Tsubata, Keiichi Tanaka
  • Patent number: 9019186
    Abstract: A liquid crystal display device (100) according to the present invention has a plurality of pixels that are arranged in columns and rows to form a matrix pattern and one color display pixel (P) is comprised of four or any other larger even number of pixels. The liquid crystal display device (100) of the present invention includes a plurality of source bus lines (13) which run in a column direction. The even number of pixels that form one color display pixel (P) include larger pixels with a relatively large area and smaller pixels with a relatively small area. Each set of pixels to be supplied with a signal voltage from an associated one of the plurality of source bus lines (13) has substantially the same total area as any other set of pixels. According to the present invention, in a liquid crystal display device in which a plurality of pixels that forms one color display pixel includes the larger and smaller pixels, generation of display unevenness that runs in the column direction can be minimized.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: April 28, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshinori Sugihara, Toshihide Tsubata, Yuki Yamashita, Fumikazu Shimoshikiryoh, Mitsuaki Hirata, Kenichi Hyohdoh, Ikumi Itsumi, Akane Sugisaka, Masae Kitayama
  • Patent number: 8976209
    Abstract: Disclosed is a liquid crystal panel including a scan signal line (16x), a data signal line (15x), and a transistor (12a) that is connected to the scan signal line (16x) and the data signal line (15x). A pixel (101) is provided with pixel electrodes (17a and 17b). The pixel electrode (17a) is connected to the data signal line (15x) through the transistor (12a). The liquid crystal panel further includes capacitance electrodes (37a and 38a) that are formed in the same layer as the scan signal line (16x). The capacitance electrodes (37a and 38a) are electrically connected to the pixel electrode (17a), and form a capacitance with the pixel electrode (17b). Consequently, the yield of a capacitance coupling type pixel division system active matrix substrate can be improved.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: March 10, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata
  • Patent number: 8952949
    Abstract: Pixel electrodes (17a and 17b) are provided in a pixel (101), and the pixel (101) is associated with a data signal line (15x), scanning signal lines (16a and 16b), and transistors (12a and 12b). One pixel electrode (17a) is connected to the data signal line (15x) via the transistor (12a). The other pixel electrode (17b) is connected to the pixel electrode (17a) via a capacitor (C101) and is connected to the data signal line (15x) via the transistor (12b). Storage capacitance (Cha and Chb) is formed between the pixel electrodes (17a and 17b) of the pixel (101) and a scanning signal line (16d) associated with a pixel (100). Thus, a configuration of a liquid crystal display device of a capacitively coupled pixel division mode is proposed in which a decline in display quality caused by image sticking of a sub-pixel is less likely to occur.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: February 10, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata
  • Patent number: 8941569
    Abstract: Provided is a liquid crystal display device including: pixels that are provided in a row direction and a column direction in which data signal lines extend, the pixels each including a plurality of pixel electrodes, in a pixel, in an nth frame, a pixel electrode being electrically connected to a data signal line, and in the frame, the plurality of pixel electrodes being electrically connected to each other and being electrically disconnected from the data signal line. This allows an improvement in viewing angle characteristic of a liquid crystal display device.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: January 27, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata
  • Publication number: 20140362321
    Abstract: An active matrix substrate is arranged such that each pixel region includes two pixel electrodes, each data signal line extends in a column direction, each column of pixel regions is associated with two data signal lines, one pixel electrode of the pixel region included in the column of pixel regions is connected to one of the two data signal lines via a transistor that is connected to a scanning signal line, the other pixel electrode of the pixel region is connected to the other one of the two data signal lines via a transistor that is connected to another scanning signal line, and one of pixel electrodes included in one of two adjacent pixel regions of the column and one of pixel electrodes included in the other one of the two adjacent pixel regions of the column are connected to an identical scanning signal line via respective transistors.
    Type: Application
    Filed: August 25, 2014
    Publication date: December 11, 2014
    Inventor: Toshihide TSUBATA
  • Patent number: 8866715
    Abstract: Each pixel includes two pixel electrodes connected to each other via a capacitor, and in respect to a pixel (101) that belongs to the column of pixels and to the row of pixels, a transistor (12a) connected to one of the two scanning signal lines (16a, 16b) is electrically connected to one of two pixel electrodes (17a, 17b) included in the pixel (101), a transistor (12b) connected to the other one of the two scanning signal lines is electrically connected to the other one of the two pixel electrodes, and each of these transistors (12a, 12b) is electrically connected to an identical data signal line (15x) that is one of the two data signal lines (15x, 15y).
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: October 21, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata
  • Patent number: 8854563
    Abstract: An active matrix substrate is arranged such that each pixel region includes two pixel electrodes, each data signal line extends in a column direction, each column of pixel regions is associated with two data signal lines, one pixel electrode of the pixel region included in the column of pixel regions is connected to one of the two data signal lines via a transistor that is connected to a scanning signal line, the other pixel electrode of the pixel region is connected to the other one of the two data signal lines via a transistor that is connected to another scanning signal line, and one of pixel electrodes included in one of two adjacent pixel regions of the column and one of pixel electrodes included in the other one of the two adjacent pixel regions of the column are connected to an identical scanning signal line via respective transistors.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: October 7, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata
  • Patent number: 8847352
    Abstract: Disclosed herein is a liquid crystal panel including: first and second pixel electrode (17a and 17b) in a single pixel (101); a first upper capacitor electrode (37a) connected with the first pixel electrode (17a); a second upper capacitor electrode (37b) connected with the second pixel electrode (17b); a first lower capacitor electrode (47a) that is provided in a layer in which a scanning signal line (16x) is provided and that is connected with the first pixel electrode (17a); and a second lower capacitor electrode (47b) that is provided in the layer and that is connected with the second pixel electrode (17b), the first pixel electrode (17a) being connected with a data signal line (15x) via a transistor (12a), a capacitor being formed between the first upper capacitor electrode (37a) and the second lower capacitor electrode (47b), a capacitor being formed between the second upper capacitor electrode (37b) and the first lower capacitor electrode (47a).
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: September 30, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata
  • Patent number: 8816350
    Abstract: An array substrate disclosed herein includes: scanning signal lines (16i and 16j); data signal lines (15x, 15y, 15X, and 15Y) to each of which a data signal is supplied; a first pixel region column; and a second pixel region column adjacent to the first pixel region column, each of the first and second pixel region columns including pixel regions, wherein: two data signal lines corresponding to the first pixel region column are provided, two data signal lines corresponding to the second pixel region column are provided, a gap between two adjacent data signal lines (15y and 15X) is provided, one of the two adjacent data signal lines being corresponding to the first pixel region column, and the other of the two adjacent data signal lines being corresponding to the second pixel region column; and a gap line 41 is provided within the gap, a Vcom signal being supplied to the gap line 41.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: August 26, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshinori Sugihara, Toshihide Tsubata
  • Patent number: 8786535
    Abstract: In one embodiment of the present invention, a driving method of a liquid crystal display device is disclosed.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: July 22, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Makoto Shiomi, Toshihisa Uchida, Toshihide Tsubata, Junichi Sawahata, Naoshi Yamada
  • Patent number: 8704742
    Abstract: When each of R, G, and B pixels continuously display identical gray scales (1023 gray scale) in a liquid crystal display device in which the thicknesses of the liquid crystal layers are of R pixel>G pixel>B pixel, the R pixel is alternately supplied with a positive signal potential (SHR1023) and a negative signal potential (SLR1023), the G pixel is alternately supplied with a positive signal potential (SHG1023) and a negative signal potential (SLG1023), and the B pixel is alternately supplied with a positive signal potential (SHB1023) and a negative signal potential (SLB1023). A first middle value (SMR1023) that between SHR1023 and SLR1023 is set higher than a second middle value (SMG1023) that is between SHG1023 and SLG1023, and second middle value (SMG1023) is set higher than a third middle value (SMB1023) that is between SHB1023 and SLB1023.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: April 22, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kentaro Irie, Masae Kawabata, Fumikazu Shimoshikiryoh, Hiroto Suzuki, Toshihide Tsubata
  • Patent number: 8698724
    Abstract: In one embodiment, a liquid crystal display device is disclosed in which a gate driver applies a gate-on pulse so that a second period is longer than a first period. Among gate-on pulses applied before the moment of polarity inversion of a data signal, the last end of the gate-on pulse nearest to the moment of the polarity inversion is earlier than the end time of the horizontal period during which the gate-on pulse is applied. The first period starts at the last end of the gate-on pulse and ends at the end time of the horizontal period during which the gate-on pulse is applied. The second period starts at the moment of the polarity inversion and ends at the moment of the application start of the gate-on pulse nearest to the moment of the polarity inversion among the gate-on pulses applied after the polarity inversion.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: April 15, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masae Kitayama, Kentaro Irie, Fumikazu Shimoshikiryoh, Toshihide Tsubata, Naoshi Yamada
  • Patent number: 8698969
    Abstract: Disclosed is a liquid crystal panel comprising a scan signal line (16x), a data signal line (15x), and a transistor (12a) that is connected to the scan signal line (16x) and the data signal line (15x), wherein a pixel (101) is provided with pixel electrodes (17a, 17b). The pixel electrode (17a) is connected to the data signal line (15x) through the transistor (12a). The liquid crystal panel also includes a capacitance electrode (37a) which is electrically connected to the pixel electrode (17a). The capacitance electrode (37a) and the pixel electrode (17a) overlap with each other through an insulating film interposed therebetween; the capacitance electrode (37a) and the pixel electrode (17b) overlap with each other through an insulating film interposed therebetween; and the areas of the overlapping portions are equal to each other.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: April 15, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata
  • Patent number: 8674919
    Abstract: Each picture element includes first and second sub-picture elements, each of which includes a liquid crystal capacitor and at least one storage capacitor. After a display voltage representing a certain grayscale level has been applied to the respective sub-picture element electrodes of the first and second sub-picture elements, a voltage difference ?V? is produced between voltages to be applied to the respective liquid crystal capacitors of the first and second sub-picture elements by way of their associated storage capacitor(s). By setting the voltage difference ?V? value of the blue and/or cyan picture element(s) to be smaller than that of the other color picture elements, shift toward the yellow range at an oblique viewing angle can be minimized.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: March 18, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Fumikazu Shimoshikiryoh, Kentaroh Irie, Masanori Takeuchi, Nobuyoshi Nagashima, Toshihide Tsubata
  • Patent number: 8665199
    Abstract: A gate driver creates a dummy insertion period in which the driver does not apply a gate on pulse to a scanning signal line immediately after the time of the inversion of a data signal. When a period from the time of the application of the gate on pulse to an odd numbered or even numbered scanning signal line to which the gate on pulse is applied previously to the time of the application of the gate on pulse to an even numbered or odd numbered scanning signal line to which the gate on pulse is applied later is set as an adjacent line writing time lag period for two scanning signal lines adjacent to each other, a CS control circuit allows the polarity of every CS signal to be reversed on the same cycle at least in the adjacent line writing time lag period.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: March 4, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masae Kitayama, Kentaro Irie, Fumikazu Shimoshikiryoh, Toshihide Tsubata, Naoshi Yamada
  • Patent number: 8665202
    Abstract: Provided is an active matrix substrate for use in a liquid crystal display device in which two scan signal lines (16i and 16j) are scanned simultaneously; pixel regions including two pixel electrodes each are arranged in the row and column directions when the column direction is the scanning direction; one scan signal line is provided for one pixel region row; and a shielding conductive body (41p) is disposed to cover the gap between two adjacent pixel electrodes (17ib and 17ja), one of which is a pixel electrode included in a given pixel region (101) and the other is a pixel electrode included in a pixel region (102) adjacent to said given pixel region (101) on the downstream side of the scanning direction. By using the present active matrix substrate, the display quality of a liquid crystal display device in which two scan signal lines are selected simultaneously can be improved.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: March 4, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata