Patents by Inventor Toshihide Tsubata

Toshihide Tsubata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120105735
    Abstract: Each pixel includes two pixel electrodes connected to each other via a capacitor, and in respect to a pixel (101) that belongs to the column of pixels and to the row of pixels, a transistor (12a) connected to one of the two scanning signal lines (16a, 16b) is electrically connected to one of two pixel electrodes (17a, 17b) included in the pixel (101), a transistor (12b) connected to the other one of the two scanning signal lines is electrically connected to the other one of the two pixel electrodes, and each of these transistors (12a, 12b) is electrically connected to an identical data signal line (15x) that is one of the two data signal lines (15x, 15y).
    Type: Application
    Filed: April 15, 2010
    Publication date: May 3, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Patent number: 8168980
    Abstract: In an active matrix substrate of the present invention, a gate insulating film for covering a gate electrode of each transistor has a thin portion, having a reduced film thickness, which is provided on a part overlapped on the gate electrode, and the thin portion is formed by using the gate electrode, on which the thin portion is overlapped, as a mask, and each transistor has a first drain electrode section and a second drain electrode section which are respectively provided on both sides of a source electrode, and the thin portion has two edges opposite to each other, and the first drain electrode section is overlapped on the one edge, and the second drain electrode section is overlapped on the other edge. This makes it possible to provide an active matrix substrate which realizes high display quality while suppressing unevenness of parasitic capacitances (particularly, Cgd) of TFTs in the active matrix substrate whose each TFT has a thin portion in its gate insulating film.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: May 1, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihide Tsubata, Masanori Takeuchi
  • Publication number: 20120086687
    Abstract: Pixel electrodes (17a and 17b) are provided in a pixel (101), and the pixel (101) is associated with a data signal line (15x), scanning signal lines (16a and 16b), and transistors (12a and 12b). One pixel electrode (17a) is connected to the data signal line (15x) via the transistor (12a). The other pixel electrode (17b) is connected to the pixel electrode (17a) via a capacitor (C101) and is connected to the data signal line (15x) via the transistor (12b). Storage capacitance (Cha and Chb) is formed between the pixel electrodes (17a and 17b) of the pixel (101) and a scanning signal line (16d) associated with a pixel (100). Thus, a configuration of a liquid crystal display device of a capacitively coupled pixel division mode is proposed in which a decline in display quality caused by image sticking of a sub-pixel is less likely to occur.
    Type: Application
    Filed: March 15, 2010
    Publication date: April 12, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Patent number: 8144279
    Abstract: A pair of pixel electrodes provided on each pixel in the same pixel array are connected to one or the other of two adjacent data signal lines. When two consecutive pixels are sequentially blocked, for two pixels belonging to the same block and being adjacent in a column direction, the data signal line to which two pixel electrodes provided on one of the pixels are connected is different from the data signal line to which two pixel electrodes provided on the other of the pixels are connected. For two pixels belonging to different blocks and being adjacent in the column direction, the data signal line to which two pixel electrodes provided on one of the pixels are connected is the same as the data signal line to which two pixel electrodes provided on the other of the pixels are connected.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: March 27, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata
  • Publication number: 20120068916
    Abstract: Provided is an active matrix substrate for use in a liquid crystal display device in which two scan signal lines (16i and 16j) are scanned simultaneously; pixel regions including two pixel electrodes each are arranged in the row and column directions when the column direction is the scanning direction; one scan signal line is provided for one pixel region row; and a shielding conductive body (41p) is disposed to cover the gap between two adjacent pixel electrodes (17ib and 17ja), one of which is a pixel electrode included in a given pixel region (101) and the other is a pixel electrode included in a pixel region (102) adjacent to said given pixel region (101) on the downstream side of the scanning direction. By using the present active matrix substrate, the display quality of a liquid crystal display device in which two scan signal lines are selected simultaneously can be improved.
    Type: Application
    Filed: April 15, 2010
    Publication date: March 22, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Publication number: 20120044427
    Abstract: When each of R, G, and B pixels continuously display identical gray scales (1023 gray scale) in a liquid crystal display device in which the thicknesses of the liquid crystal layers are of R pixel>G pixel>B pixel, the R pixel is alternately supplied with a positive signal potential (SHR1023) and a negative signal potential (SLR1023), the G pixel is alternately supplied with a positive signal potential (SHG1023) and a negative signal potential (SLG1023), and the B pixel is alternately supplied with a positive signal potential (SHB1023) and a negative signal potential (SLB1023). A first middle value (SMR1023) that between SHR1023 and SLR1023 is set higher than a second middle value (SMG1023) that is between SHG1023 and SLG1023, and second middle value (SMG1023) is set higher than a third middle value (SMB1023) that is between SHB1023 and SLB1023.
    Type: Application
    Filed: April 16, 2010
    Publication date: February 23, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kentaro Irie, Masae Kawabata, Fumikazu Shimoshikiryoh, Hiroto Suzuki, Toshihide Tsubata
  • Publication number: 20120044452
    Abstract: A substrate for a liquid crystal display panel includes a first projection structure and a second projection structure and/or a depression structure, the substrate for the liquid crystal display panel includes a specific structure at a part of or near the first projection structure, the specific structure having at least one of a planar shape different from a planar shape of the second projection structure and/or the depression structure and a planar area of ? times or less or 1.5 times or more than a planar area of the second projection structure and/or the depression structure.
    Type: Application
    Filed: February 9, 2011
    Publication date: February 23, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kohji MATSUOKA, Shinichi HIRATO, Akihiro SHORAKU, Kenji ENDA, Tsuyoshi TOKUDA, Toshihide TSUBATA
  • Publication number: 20120038935
    Abstract: A substrate for a liquid crystal display panel includes a first projection structure and a second projection structure and/or a depression structure, the substrate for the liquid crystal display panel includes a specific structure at a part of or near the first projection structure, the specific structure having at least one of a planar shape different from a planar shape of the second projection structure and/or the depression structure and a planar area of ? times or less or 1.5 times or more than a planar area of the second projection structure and/or the depression structure.
    Type: Application
    Filed: February 9, 2011
    Publication date: February 16, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kohji MATSUOKA, Shinichi HIRATO, Akihiro SHORAKU, Kenji ENDA, Tsuyoshi TOKUDA, Toshihide TSUBATA
  • Patent number: 8111370
    Abstract: A liquid crystal display panel (1x) includes an active matrix substrate (3), a liquid crystal material (40), and a color filter substrate (30), wherein a spacer (33) is provided between the active matrix substrate (3) and the color filter substrate (30), and the color filter substrate (30) includes a step section (7) for restricting a movement of a spacer, the step section being provided so as to surround the spacer (33). This makes it possible to restrict the movement of the spacer in the liquid crystal display panel, thereby improving evenness of a cell gap.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: February 7, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Naoshi Yamada, Toshihide Tsubata
  • Publication number: 20120026415
    Abstract: Disclosed is a liquid crystal panel comprising a scan signal line (16x), a data signal line (15x), and a transistor (12a) that is connected to the scan signal line (16x) and the data signal line (15x), wherein a pixel (101) is provided with pixel electrodes (17a, 17b). The pixel electrode (17a) is connected to the data signal line (15x) through the transistor (12a). The liquid crystal panel also includes a capacitance electrode (37a) which is electrically connected to the pixel electrode (17a). The capacitance electrode (37a) and the pixel electrode (17a) overlap with each other through an insulating film interposed therebetween; the capacitance electrode (37a) and the pixel electrode (17b) overlap with each other through an insulating film interposed therebetween; and the areas of the overlapping portions are equal to each other.
    Type: Application
    Filed: October 30, 2009
    Publication date: February 2, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Patent number: 8107032
    Abstract: In one embodiment of the present invention, a display device is enabled to make the display impulse and to improve the charging characteristics of pixel capacities while suppressing the complexity of a drive circuit or the like and the increase in the operating frequency. In an active matrix substrate of a liquid crystal display device, each pixel electrode is connected through a pixel TFT with a source line and through a discharging TFT with a holding capacity line. For one frame period, a liquid crystal capacity, as established by the pixel electrode corresponding to each display line and a common electrode, is charged, when the pixel TFT is turned ON by a pixel scanning signal on a pixel gate line, and is then discharged when the discharging TFT is turned ON by a discharging scanning signal on a discharging gate line. The source line is subjected to a 2-H dot inverse drive but to a charge share for every horizontal periods.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: January 31, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata
  • Patent number: 8094256
    Abstract: An active matrix substrate in which wherever a short between adjacent pixel electrodes of a liquid crystal panel is located in peripheral portions of the pixel electrodes, the short can be efficiently corrected without forming both short-circuited pixels into black dots, and a liquid crystal panel having the active matrix substrate, as well as methods of correcting the AM substrate and the liquid crystal panel. Each of pixel electrodes arranged in a matrix in an active matrix substrate is divided into a plurality of minute regions, and the minute regions are integrally connected by electrically connecting portions. A plurality of lines arranged to transmit signals to each of the pixel electrodes are placed so as not to coincide with the electrically connecting portions of each of the pixel electrodes.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: January 10, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masaomi Okamoto, Toshihide Tsubata
  • Publication number: 20120002144
    Abstract: A liquid crystal display device includes: a vertical alignment liquid crystal layer; first and second substrates facing each other with the liquid crystal layer interposed; first and second electrodes arranged on the first and second substrates to face the liquid crystal layer; and at least one alignment film in contact with the liquid crystal layer. A pixel region includes a first liquid crystal domain in which liquid crystal molecules are tilted in a first direction around the center of a plane, and approximately at the middle of the thickness, of the liquid crystal layer responsive to a voltage applied. The first liquid crystal domain is close to at least a part of an edge of the first electrode. The part includes a first edge portion in which an azimuthal direction, perpendicular to the part and pointing toward the inside of the first electrode, defines an angle greater than 90 degrees to the first direction.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 5, 2012
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Akihiro Shoraku, Toshihide Tsubata, Koichi Miyachi, Iichiro Inoue, Akihiro Yamamoto, Yoshito Hashimoto, Masumi Kubo, Akihito Jinda
  • Publication number: 20120001839
    Abstract: Disclosed is a liquid crystal panel that includes a scan signal line (16x), a data signal line (15x), and a transistor (12a), where a single pixel (101) has pixel electrodes (17a and 17b). The pixel electrode (17a) is connected to the data signal line (15x) through the transistor (12a). A capacitance electrode (37a) provided in the pixel (101) is connected to one of the pixel electrodes (17a) through first and second contact holes (41a and 42a), and forms a capacitance with the other of the pixel electrodes (17b). The drain electrode (9a) of the transistor (12a) is connected to the pixel electrode (17a) through a third contact hole (67a). Consequently, the production yield of the active matrix substrate of the capacitance coupling type pixel division system and the liquid crystal panel having such an active matrix substrate can be improved without lowering the aperture ratio.
    Type: Application
    Filed: October 30, 2009
    Publication date: January 5, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Publication number: 20120001838
    Abstract: Disclosed is a liquid crystal panel including a scan signal line (16x), a data signal line (15x), and a transistor (12a) that is connected to the scan signal line (16x) and the data signal line (15x). A pixel (101) is provided with pixel electrodes (17a and 17b). The pixel electrode (17a) is connected to the data signal line (15x) through the transistor (12a). The liquid crystal panel further includes capacitance electrodes (37a and 38a) that are formed in the same layer as the scan signal line (16x). The capacitance electrodes (37a and 38a) are electrically connected to the pixel electrode (17a), and form a capacitance with the pixel electrode (17b). Consequently, the yield of a capacitance coupling type pixel division system active matrix substrate can be improved.
    Type: Application
    Filed: October 30, 2009
    Publication date: January 5, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Patent number: 8089571
    Abstract: An active matrix substrate (12) includes a substrate, a TFT (24) formed on the substrate, a storage capacitor element (20) formed on the substrate, an interlayer insulating film covering the storage capacitor element (20), and a pixel electrode (21) formed on the interlayer insulating film. The storage capacitor element (20) includes a storage capacitor line (27), an insulating film formed on the storage capacitor line (27), and two or more storage capacitor electrodes (25a, 25b, 25c) opposed to the storage capacitor line (27) with the insulating film interposed therebetween. The two or more storage capacitor electrodes (25a, 25b, 25c) are electrically connected via associated contact holes (26a, 26b, 26c) formed in the interlayer insulating film to the pixel electrode (21) and electrically continuous with a drain electrode of the TFT (24).
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: January 3, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshifumi Yagi, Tomoki Noda, Toshihide Tsubata, Masanori Takeuchi, Kenji Enda
  • Patent number: 8089574
    Abstract: An active matrix substrate includes a transistor, a pixel electrode, a drain lead electrode connected with the drain electrode of the transistor, and a contact hole connecting the drain lead electrode and the pixel electrode. A non-electrode through-bore portion is created on the drain lead electrode, and an opening of the contact hole crosses the through-bore portion. As a result, any changes or decreases in the contact area between the drain lead electrode and the pixel electrode may be prevented or reduced significantly, while the open area ratio can be improved.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: January 3, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihide Tsubata, Yoshihiro Okada, Atsushi Ban, Toshinori Sugihara
  • Publication number: 20110315991
    Abstract: An array substrate disclosed herein includes: scanning signal lines (16i and 16j); data signal lines (15x, 15y, 15X, and 15Y) to each of which a data signal is supplied; a first pixel region column; and a second pixel region column adjacent to the first pixel region column, each of the first and second pixel region columns including pixel regions, wherein: two data signal lines corresponding to the first pixel region column are provided, two data signal lines corresponding to the second pixel region column are provided, a gap between two adjacent data signal lines (15y and 15X) is provided, one of the two adjacent data signal lines being corresponding to the first pixel region column, and the other of the two adjacent data signal lines being corresponding to the second pixel region column; and a gap line 41 is provided within the gap, a Vcom signal being supplied to the gap line 41.
    Type: Application
    Filed: February 9, 2010
    Publication date: December 29, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Toshinori Sugihara, Toshihide Tsubata
  • Patent number: 8077284
    Abstract: The present invention is a substrate for a display device comprising an active matrix substrate and an opposed substrate which are opposed to each other with a display medium layer interposed therebetween, said active matrix substrate including a pixel electrode arranged in a matrix shape on the side of the display medium layer and said opposed substrate including a common electrode opposing to the pixel electrode on the side of the display medium layer, wherein said substrate for a display device includes an electrode slit formed in one of the pixel electrode and the common electrode; and at least one of the electrical connecting portions of said electrode slit is provided outside of a light-blocking region.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: December 13, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hidetoshi Nakagawa, Toshihide Tsubata, Nobuyoshi Nagashima, Yuhko Hisada
  • Patent number: 8072572
    Abstract: A substrate for a display panel in which insulation breakdown of an insulating film can be prevented, a display panel having the substrate, a production process of the substrate and a production process of the display panel. The substrate includes an inspection line 123 for transferring a signal for inspection which includes a first section 1231 including a portion overlapping with and/or intersecting an input line 121 drawn from a data signal line in a display region III between which an insulating film 141 is sandwiched and a second section 1232 which includes a portion other than the portion overlapping with and/or intersecting the input line 121 which are formed to be electrically independent from each other and are arranged to be electrically connected by a conductor 128, wherein a difference between areas of the first section 1231 and the input line 121 is reduced.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: December 6, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshio Hirakata, Toshihide Tsubata, Masahiro Matsuda