Abstract: An active matrix substrate of the present invention for use in a liquid crystal panel includes a scanning signal line (16x), a data signal line (15x), and a transistor (12a) connected to the scanning signal line (16x) and the data signal line (15x), with first and second pixel electrodes (17a and 17b) provided in each pixel (101), one of the pixel electrodes (17a) being connected to the data signal line (15x) via the transistor (12a). The active matrix substrate includes first and second capacitor electrodes (37a and 38a) electrically connected to the pixel electrode (17a), capacitors being formed between the capacitor electrodes (37a and 38a) and the other pixel electrode (17b), respectively. This makes it possible to improve yields of manufacture of capacitively-coupled pixel-division type active matrix substrates and liquid crystal panels including the same.

Abstract: An active matrix substrate includes first and second pixel electrodes (17a, 17b) in each pixel region, the first pixel electrode (17a) is connected with a data signal line (15) via a transistor (12), a second pixel electrode (17b) is connected with the first pixel electrode (17a) via a capacitor formed between the second pixel electrode (17b) and a coupling capacitance electrode (67) electrically connected with the first pixel electrode (17a), the second pixel electrode (17b) overlaps a retention capacitor line (18) via an insulating layer, and the insulating layer has a thin region (51a) positioned to be at least a part of a portion which does not overlap the coupling capacitance electrode (67).

Abstract: A segmented-pixel liquid crystal display has a plurality of pixels of which each has three sub-pixels 10a-10c, namely one middle and two side sub-pixels, arranged next to one another in the column or row direction. The sub-pixels 10a-10c have different brightness levels when the pixel as a whole is in a given middle halftone state, and the middle sub-pixel 10a has the highest brightness level. This eliminates unnaturalness as is conventionally produced when an image with a straight border is displayed, and further improves the gamma characteristic.

Abstract: The display device substrate according to the present invention is arranged so that: a source line is provided on an area on which a pixel electrode is not provided, and a gap is provided between the source line and the pixel electrode, and a black matrix (light shielding film) which covers a surface of the source line overlaps with the pixel electrode. Thus, it is possible to prevent parasitic capacitance (Csd) between the pixel electrode and the source line from becoming uneven in a display area, so that it is possible to reduce display unevenness of a liquid crystal display device using the present display device substrate.

Abstract: An active matrix substrate has a structure that prevents a drain extraction line from breaking without a plurality of active elements such as thin film transistor elements, metal-insulator-metal elements, MOS transistor elements, diodes, and varistors being disposed, and is suited for use in a large-size liquid crystal television or a like liquid crystal display device equipped with a large-size liquid crystal display panel. The active matrix substrate includes an active element connected, via a drain extraction line, to a storage capacitor upper electrode, wherein the drain extraction line has at least two routes.

Abstract: With a configuration in which a first pixel electrode (17a) electrically connected to a first transistor (12) and a second pixel electrode (17b) connected to the first pixel electrode (17a) through a capacitance are provided in a single pixel, a storage capacitance wiring (18j) is formed in the same layer with a data signal line (15j), a second transistor (212c) is electrically connected to the storage capacitance wiring (18j) and to the first pixel electrode (17a), and a third transistor (212b) is electrically connected to the storage capacitance wiring (18j) and to the second pixel electrode (17b), a capacitance coupling type active matrix substrate equipped with transistors for discharge suppresses the aperture ratio reduction and load increase on gate bus lines (scan signal lines).

Abstract: A gate driver creates a dummy insertion period in which the driver does not apply a gate on pulse to a scanning signal line immediately after the time of the inversion of a data signal. When a period from the time of the application of the gate on pulse to an odd numbered or even numbered scanning signal line to which the gate on pulse is applied previously to the time of the application of the gate on pulse to an even numbered or odd numbered scanning signal line to which the gate on pulse is applied later is set as an adjacent line writing time lag period for two scanning signal lines adjacent to each other, a CS control circuit allows the polarity of every CS signal to be reversed on the same cycle at least in the adjacent line writing time lag period.

Abstract: The present invention provides a color filter substrate for preventing an electrical short circuit between an electrode and other members at a place upper than the colored transparent layers disposed in a stack, and further preventing electrical disconnection on colored transparent layers other than the colored transparent layers in a stack, in the case where colored transparent layers are disposed in a stack and an electrode is stacked over the entire surface.

Abstract: Provided is an active matrix substrate including a capacitance electrode (47a) electrically connected to a pixel electrode (17a), in which a storage capacitance wiring (18p) is formed in the layer between the capacitance electrode (47a) and the pixel electrode (17a), the capacitance electrode (47a) and the storage capacitance wiring (18p) overlap through a first insulating film and the storage capacitance wiring (18p) and the pixel electrode (17a) overlap through a second insulating film. With this configuration, in the active matrix substrate, the storage capacitance value can be increased without lowering the aperture ratio.

Abstract: A liquid crystal display device according to the present invention includes: a plurality of pixels that are arranged in rows and columns so as to form a matrix pattern; and TFTs (TFT-A, TFT-B and TFT-C), source bus lines, gate bus lines and CS bus lines (CS-A and CS-B), which are associated with the respective pixels. Each pixel includes at least three subpixels (SP-A, SP-B and SP-C) with liquid crystal capacitors that are able to retain mutually different voltages. By supplying a signal (CS-A or CS-B) that makes two of the at least three subpixels display mutually different luminances at least at a certain grayscale tone from the source, gate and CS bus lines to each pixel, the at least three subpixels are able to display mutually different luminances.

Abstract: In a liquid crystal display, a first data signal line and a second data signal line are provided for each pixel column. In at least one embodiment, in a case where every two pixels in the pixel column are paired, one of two pixels in each pair is connected with the first data signal line and the other of the two pixels is connected with the second data signal line, two scanning signal lines respectively connected with the two pixels are simultaneously selected during one horizontal scanning period so that signal potentials are written into the two pixels from the first data signal line and the second data signal line, respectively, during each horizontal scanning period, supply of the signal potentials to the first data signal line and the second data signal line is performed after supply of preliminary potentials to the first data signal line and the second data signal line.

Abstract: A color filter substrate includes: a base substrate; a light-shield layer and a color filter layer provided on the base substrate; a plurality of columnar spacers, made of a resin and provided to stick out of the base substrate; and an undercoat layer, provided between the columnar spacers and the base substrate. The color filter layer includes first, second, and third types of color filters, which transmit light rays in mutually different colors. The undercoat layer is made of the same film as one of the first, second and third types of color filters and the light-shield layer. A portion of the undercoat layer, associated with a first one of the columnar spacers, has a different area and/or shape from another portion of the undercoat layer, associated with a second one of the columnar spacers. The first and second columnar spacers have mutually different heights.

Abstract: In one embodiment, a liquid crystal display device is disclosed in which a gate driver applies a gate-on pulse so that a second period is longer than a first period. Among gate-on pulses applied before the moment of polarity inversion of a data signal, the last end of the gate-on pulse nearest to the moment of the polarity inversion is earlier than the end time of the horizontal period during which the gate-on pulse is applied. The first period starts at the last end of the gate-on pulse and ends at the end time of the horizontal period during which the gate-on pulse is applied. The second period starts at the moment of the polarity inversion and ends at the moment of the application start of the gate-on pulse nearest to the moment of the polarity inversion among the gate-on pulses applied after the polarity inversion.

Abstract: In each pixel region, (i) a first pixel electrode (17a) connected to a first transistor (12a), (ii) a second pixel electrode (17b) connected to a second transistor (17b), (iii) a coupling electrode (67y), and (iv) first and second capacitor electrodes (67x and 67z) provided in a layer in which a data signal line (15) is provided, being provided, a capacitor being defined by the coupling electrode (67y) and the second pixel electrode (17b), the coupling electrode (67y) being connected to the first pixel electrode (17a) via a third transistor (112), the first capacitor electrode (67x) and a retention capacitor line (18) overlapping each other via a gate insulating film, the first capacitor electrode (67x) being connected to the first pixel electrode (17a), the second capacitor electrode (67z) and the retention capacitor line (18) overlapping each other via the gate insulating film, the second capacitor electrode (67z) being connected to the second pixel electrode (17b).

Abstract: Disclosed is an active matrix including a scanning signal line (16x), a data signal line (15x), and a first insulating film; and including, in a pixel region (101), a transistor (12a), a first pixel electrode (17a) connected to the data signal line via the transistor, a second pixel electrode (17b), a first capacitor electrode (87) electrically connected to the first pixel electrode (17a), and a second capacitor electrode (47) electrically connected to the second pixel electrode (17b), wherein the first capacitor electrode is provided in a same layer as the scanning signal line, the second capacitor electrode is provided in a same layer as the data signal line, and the first and second capacitor electrodes (87, 47) overlap each other by having the first insulating film sandwiched therebetween to form a capacitor between the first and second capacitor electrodes (87, 47).

Abstract: In a liquid crystal display device according to one embodiment of the present invention, when the polarities of the source signal voltages do not change over a plurality of horizontal scanning periods, the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the jth row rises before the source signal voltages change to values that correspond to pixels along the jth row. Next, the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the jth row falls, and then the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the kth row (j?k) rises. The polarities of the storage capacitor signal voltages applied to storage capacitor bus lines that correspond to sub-pixels of pixels along the jth row are inverted after the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the kth row rises.

Abstract: An active matrix substrate includes a data signal line (15x), a storage capacity wiring (18x), scan signal lines (16a, 16b), a transistor (12a) connected to the data signal line (15x) and the scan signal line (16a), a transistor (12b) connected to the storage capacity wiring (18x) and the scan signal line (16b), and pixel electrodes (17 a, 17b) formed in a pixel (101) area. The pixel electrode (17a) is connected to the data signal line (15x) through the transistor (12a), and the pixel electrode (17b) is connected to the pixel electrode (17a) through a capacitor (C101) and connected to the storage capacity wiring (18x) through the transistor (12b).

Abstract: A liquid crystal panel includes: an active matrix substrate (3) including a transparent substrate (31) formed with a transistor, a pixel electrode, and a signal wire; a color filter substrate (30) including a transparent substrate (32) formed with a common electrode; a liquid crystal material (40) disposed between the substrates (3, 30); and a spherical main spacer (2m) contacting the active matrix substrate (3) and the color filter substrate (30). The active matrix substrate (3) has a surface including a sub spacer region (SA) away from the transparent substrate (31) at a distance shorter than a distance between the transparent substrate and a portion where the surface of the active matrix substrate (3) contacts the main spacer (2m). A spherical sub spacer (2s) is disposed to overlap the sub spacer region (SA). This provides a liquid crystal panel where liquid crystal bubbles hardly occur even when the liquid crystal material contracts due to low temperature, etc.

Abstract: A liquid crystal display device according to the present invention includes: a plurality of pixels that are arranged in rows and columns so as to form a matrix pattern; and TFTs (TFT-A, TFT-B and TFT-C), source bus lines, gate bus lines and CS bus lines (CS-A and CS-B), which are associated with the respective pixels. Each pixel includes at least three subpixels (SP-A, SP-B and SP-C) with liquid crystal capacitors that are able to retain mutually different voltages. By supplying a signal (CS-A or CS-B) that makes two of the at least three subpixels display mutually different luminances at least at a certain grayscale tone from the source, gate and CS bus lines to each pixel, the at least three subpixels are able to display mutually different luminances.

Abstract: In one embodiment of the present invention, a gate driver creates a dummy insertion period in which the driver does not apply a gate on pulse to a scanning signal line immediately after the time of the inversion of a data signal. When a period from the time of the application of the gate on pulse to an odd numbered or even numbered scanning signal line to which the gate on pulse is applied previously to the time of the application of the gate on pulse to an even numbered or odd numbered scanning signal line to which the gate on pulse is applied later is set as an adjacent line writing time lag period for two scanning signal lines adjacent to each other, a CS control circuit allows the polarity of every CS signal to be reversed on the same cycle at least in the adjacent line writing time lag period.