Patents by Inventor Toshihiko Mori

Toshihiko Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10367583
    Abstract: There is provided a driver circuit including a variable current-source configured to include, a first current-source coupled to a first input node to which a first signal is input from an external, a second current-source coupled to a second input node to which a second signal as an inversion of the first signal is input from the external, a first bypass circuit coupled between the first current-source and the first input node, the first bypass circuit being switched according to the second signal, and a second bypass circuit coupled between the second current-source and the second input node, the second bypass circuit being switched according to the first signal, and a terminal circuit configured to be terminated for an optical device driven by a drive signal according to the first signal, the drive signal being output from an output node coupled between the terminal circuit and the variable current-source.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: July 30, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Yuuki Ogata, Toshihiko Mori, Yasufumi Sakai
  • Patent number: 10351323
    Abstract: A manufacturing method of a package bag (10) according to the present invention includes: a cured portion forming step of forming a cured portion (15a, 15b) on at least one side of a forming position of a rib (14) by crystallizing at least a portion of a resin constituting a film (11) by heating and cooling the film (11); and a rib forming step of forming a rib (14) by pressing the film (11) using concave and convex molds. According to the present invention, it is possible to maintain an opening state of a spout (12). Further, since additional material is not required, it is possible to suppress increase in the thickness of the package bag (10) and to reduce the bulkiness of the package bags.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: July 16, 2019
    Assignee: Fujimori Kogyo Co., Ltd.
    Inventors: Toshihiko Mori, Tomoko Kubota, Yasuharu Takada
  • Publication number: 20190161722
    Abstract: The present invention provides an apparatus for applying electrical stimulation to cells in a liquid culture medium without using electrodes immersed in the liquid culture medium. This apparatus is an electrical stimulation apparatus A for electrically stimulating cells in a liquid culture medium (2). A liquid culture medium vessel (3) includes: a ring-shaped recess (7) for holding the liquid culture medium (2); and a through hole (6) formed within the ring-shaped recess (7). A magnetic core (1) is made of a magnetic material and disposed such that a portion thereof is inserted through the through hole (6) of the liquid culture medium vessel (3). An excitation coil (5) is wound around the magnetic core (1). A coil power supply (8) supplies a varying current to the excitation coil (5).
    Type: Application
    Filed: May 19, 2017
    Publication date: May 30, 2019
    Inventors: Ryoichi NAGATOMI, Toshiyuki TAKAGI, Shinichi IZUMI, Toshihiko ABE, Hitoshi MORI, Kenji YASHIMA, Kazumi MORI
  • Patent number: 10256999
    Abstract: Disclosed is a frequency characteristic adjusting circuit disposed between an optical circuit element and a drive circuit driving the optical circuit element. The frequency characteristic adjusting circuit includes a capacitor, and two or more series circuits having a resistor and a switch, the two or more series circuits being connected in parallel with the capacitor, where resistance with respect to the switch that is turned on is changed according to an output voltage of the drive circuit by changing ON or OFF of the switch such that electric charge at a contact point between the optical circuit element and the capacitor is adjusted to be constant regardless of the output voltage of the drive circuit.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: April 9, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Yuuki Ogata, Toshihiko Mori
  • Patent number: 10164713
    Abstract: An optical transmitter includes: a driving circuit that includes drivers each corresponding to a configuration bit of an input electrical data sequence; a MZ optical modulator that includes a first phase shifter provided in an arm and a second phase shifter provided in an arm; first capacitance elements that are electrically connected between the driving unit and the first phase shifter, each include an electric capacity weighted in response to a bit number of the configuration bit, and generate a first multilevel signal to be supplied to the first phase shifter; and second capacitance elements that are electrically connected between the driving circuit and the second phase shifter, each include an electric capacity weighted in response to a bit number of the configuration bit, and generate a second multilevel signal to be supplied to the second phase shifter.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: December 25, 2018
    Assignees: FUJITSU LIMITED, PHOTONICS ELECTRONICS TECHNOLOGY RESEARCH ASSOCIATION
    Inventors: Shinsuke Tanaka, Tatsuya Usuki, Toshihiko Mori
  • Publication number: 20180337732
    Abstract: There is provided a driver circuit including a variable current-source configured to include, a first current-source coupled to a first input node to which a first signal is input from an external, a second current-source coupled to a second input node to which a second signal as an inversion of the first signal is input from the external, a first bypass circuit coupled between the first current-source and the first input node, the first bypass circuit being switched according to the second signal, and a second bypass circuit coupled between the second current-source and the second input node, the second bypass circuit being switched according to the first signal, and a terminal circuit configured to be terminated for an optical device driven by a drive signal according to the first signal, the drive signal being output from an output node coupled between the terminal circuit and the variable current-source.
    Type: Application
    Filed: May 3, 2018
    Publication date: November 22, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Yuuki Ogata, Toshihiko Mori, Yasufumi Sakai
  • Publication number: 20180205465
    Abstract: An optical transmitter includes: a driving circuit that includes drivers each corresponding to a configuration bit of an input electrical data sequence; a MZ optical modulator that includes a first phase shifter provided in an arm and a second phase shifter provided in an arm; first capacitance elements that are electrically connected between the driving unit and the first phase shifter, each include an electric capacity weighted in response to a bit number of the configuration bit, and generate a first multilevel signal to be supplied to the first phase shifter; and second capacitance elements that are electrically connected between the driving circuit and the second phase shifter, each include an electric capacity weighted in response to a bit number of the configuration bit, and generate a second multilevel signal to be supplied to the second phase shifter.
    Type: Application
    Filed: January 11, 2018
    Publication date: July 19, 2018
    Applicants: FUJITSU LIMITED, Photonics Electronics Technology Research Assocation
    Inventors: Shinsuke Tanaka, Tatsuya Usuki, Toshihiko Mori
  • Publication number: 20180054331
    Abstract: Disclosed is a frequency characteristic adjusting circuit disposed between an optical circuit element and a drive circuit driving the optical circuit element. The frequency characteristic adjusting circuit includes a capacitor, and two or more series circuits having a resistor and a switch, the two or more series circuits being connected in parallel with the capacitor, where resistance with respect to the switch that is turned on is changed according to an output voltage of the drive circuit by changing ON or OFF of the switch such that electric charge at a contact point between the optical circuit element and the capacitor is adjusted to be constant regardless of the output voltage of the drive circuit.
    Type: Application
    Filed: July 7, 2017
    Publication date: February 22, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Yuuki Ogata, Toshihiko Mori
  • Publication number: 20180054258
    Abstract: A frequency characteristic adjustment circuit is disclosed. The frequency characteristic adjustment circuit is disposed between an optical circuit element and a drive circuit for driving the optical circuit element. A capacitor is connected to an output of the drive circuit. A current supply circuit is controlled by a voltage generated by the drive circuit. The current supply circuit supplies a different current value depending on a voltage received from the drive circuit to the optical circuit element.
    Type: Application
    Filed: July 14, 2017
    Publication date: February 22, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Toshihiko Mori, Yuuki Ogata
  • Publication number: 20180022357
    Abstract: A safety level indication arrangement for a motor vehicle includes a first camera capturing first images of an environment surrounding the motor vehicle. A second camera captures second images of a driver of the motor vehicle. A microphone is associated with the passenger compartment and produces a microphone signal dependent upon sounds within the passenger compartment. At least one vehicle sensor detects an operational parameter of the motor vehicle. A display device is associated with the passenger compartment. A loudspeaker is associated with the passenger compartment. An electronic processor ascertains a safety level based on the first images and the operational parameter of the motor vehicle. The electronic processor determines how to present the ascertained safety level to the driver by use of the display device and/or the loudspeaker. The determining is dependent upon the second images and the microphone signal.
    Type: Application
    Filed: July 19, 2017
    Publication date: January 25, 2018
    Inventors: TOSHIHIKO MORI, YASUHIRO TSUCHIDA
  • Publication number: 20170277215
    Abstract: An electronic device includes: an integrated circuit including a first power source terminal to which a first voltage is supplied from a DC power source, a second power source terminal to which a second voltage is supplied from the DC power source, a third power source terminal coupled to the first power source terminal through an internal resistance, and a fourth power source terminal coupled to the second power source terminal; and a power source circuit including a first power source line that supplies the first voltage to the first power source terminal from the DC power source, a second power source line that supplies the second voltage to the second power source terminal from the DC power source, and a bypass capacitor coupled between the third power source terminal and the fourth power source terminal.
    Type: Application
    Filed: January 25, 2017
    Publication date: September 28, 2017
    Applicant: FUJITSU LIMITED
    Inventors: HIDEKI TAKAUCHI, Toshihiko Mori
  • Publication number: 20170142470
    Abstract: A vehicle includes a user interface having a plurality of components. A global positioning system determines a geographical location of the vehicle. An electronic processor is communicatively coupled to the user interface and the global positioning system. The electronic processor wirelessly receives data regarding road and traffic conditions from an external source. The electronic processor also determines which of the user interface components to use to present entertainment content to a driver of the vehicle based on the data regarding road and traffic conditions and the geographical location of the vehicle.
    Type: Application
    Filed: November 10, 2016
    Publication date: May 18, 2017
    Inventors: YASUHIRO TSUCHIDA, TOSHIHIKO MORI, GERMANO LEICHSENRING
  • Publication number: 20170057723
    Abstract: A manufacturing method of a package bag (10) according to the present invention includes: a cured portion forming step of forming a cured portion (15a, 15b) on at least one side of a forming position of a rib (14) by crystallizing at least a portion of a resin constituting a film (11) by heating and cooling the film (11); and a rib forming step of forming a rib (14) by pressing the film (11) using concave and convex molds. According to the present invention, it is possible to maintain an opening state of a spout (12). Further, since additional material is not required, it is possible to suppress increase in the thickness of the package bag (10) and to reduce the bulkiness of the package bags.
    Type: Application
    Filed: November 14, 2016
    Publication date: March 2, 2017
    Inventors: Toshihiko Mori, Tomoko Kubota, Yasuharu Takada
  • Patent number: 9509531
    Abstract: A decision feedback equalizer for N-level amplitude modulated signal, includes: (N?1) level conversion circuits to add (N?1) shifting voltages to the amplitude modulated signal respectively; (N?1)×N determination feedback equalization-correction circuits to perform N types of decision feedback equalization processing, each of which adding each of N-level offset voltages corresponded to any one of N levels of a reception data ahead of one data cycle, on each of the (N?1) level shifted signals to generate (N?1) sets of N equalization correction signals; (N?1)×N comparison circuits; (N?1)×N first latch circuits; (N?1) selection circuits to select a comparison result of the N comparison circuits in each (N?1) sets; (N?1) second latch circuits; and a decoder, wherein each of the (N?1) selection circuits selects an equalization-correction signal among the N equalization-correction signals in each (N?1) set according to outputs latched by the (N?1) second latch circuits.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: November 29, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Yasufumi Sakai, Toshihiko Mori
  • Patent number: 9425777
    Abstract: A phase interpolator has: a mixer configured to synthesize phases of a plurality of input cosine-wave or sine-wave signals whose phases are different from each other; and a bias generator configured to output a bias signal in accordance with a phase control signal to the mixer, and the mixer outputs a signal with a phase in accordance with the phase control signal.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: August 23, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Yasufumi Sakai, Toshihiko Mori
  • Publication number: 20160191276
    Abstract: A decision feedback equalizer for N-level amplitude modulated signal, includes: (N-1) level conversion circuits to add (N-1) shifting voltages to the amplitude modulated signal respectively; (N-1)×N determination feedback equalization-correction circuits to perform N types of decision feedback equalization processing, each of which adding each of N-level offset voltages corresponded to any one of N levels of a reception data ahead of one data cycle, on each of the (N-1) level shifted signals to generate (N-1) sets of N equalization correction signals; (N-1)×N comparison circuits; (N-1)×N first latch circuits; (N-1) selection circuits to select a comparison result of the N comparison circuits in each (N-1) sets; (N-1) second latch circuits; and a decoder, wherein each of the (N-1) selection circuits selects an equalization-correction signal among the N equalization-correction signals in each (N-1) set according to outputs latched by the (N-1) second latch circuits.
    Type: Application
    Filed: November 23, 2015
    Publication date: June 30, 2016
    Inventors: Yasufumi SAKAI, Toshihiko MORI
  • Patent number: 9281805
    Abstract: A clock control circuit includes: a first buffer that receives a first pair of input clocks of multi-phase clocks, buffers and outputs the first pair of input clocks; a second buffer that receives a second pair of input clocks of the multi-phase clocks, and is controllable to buffer and output the second pair of input clocks or to output a fixed level; and a frequency multiplier that performs a logical operation on an output of the first buffer and an output of the second buffer, and outputs a first pair of output clocks or a second pair of output clocks as an output clocks, the first pair of output clocks is based on a frequency which is obtained by multiplying frequencies of the multi-phase clocks, and the second pair of output clocks is based on the same frequencies as the multi-phase clocks.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: March 8, 2016
    Assignee: Fujitsu Limited
    Inventors: Yasumoto Tomita, Toshihiko Mori
  • Patent number: 9270157
    Abstract: A DC-DC converter includes: a high-side switch; a low-side switch coupled to the high-side switch in series; a capacitor configured to be charged while the low-side switch is turned on and to increase a driving voltage for turning on the high-side switch by a charged voltage; a buffer configured to output a control signal for controlling the high-side switch; a latch configured to receive the control signal at a first input terminal, retain the control signal, and output the control signal to the high-side switch; and a switch configured to receive the control signal from the latch and deactivate the buffer.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: February 23, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Masafumi Kondou, Toshihiko Mori
  • Publication number: 20150349980
    Abstract: A phase interpolator has: a mixer configured to synthesize phases of a plurality of input cosine-wave or sine-wave signals whose phases are different from each other; and a bias generator configured to output a bias signal in accordance with a phase control signal to the mixer, and the mixer outputs a signal with a phase in accordance with the phase control signal.
    Type: Application
    Filed: April 9, 2015
    Publication date: December 3, 2015
    Inventors: Yasufumi Sakai, Toshihiko Mori
  • Publication number: 20150229298
    Abstract: A clock control circuit includes: a first buffer that receives a first pair of input clocks of multi-phase clocks, buffers and outputs the first pair of input clocks; a second buffer that receives a second pair of input clocks of the multi-phase clocks, and is controllable to buffer and output the second pair of input clocks or to output a fixed level; and a frequency multiplier that performs a logical operation on an output of the first buffer and an output of the second buffer, and outputs a first pair of output clocks or a second pair of output clocks as an output clocks, the first pair of output clocks is based on a frequency which is obtained by multiplying frequencies of the multi-phase clocks, and the second pair of output clocks is based on the same frequencies as the multi-phase clocks.
    Type: Application
    Filed: January 13, 2015
    Publication date: August 13, 2015
    Inventors: Yasumoto TOMITA, Toshihiko Mori