Patents by Inventor Toshihiko Tanaka

Toshihiko Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7110863
    Abstract: A generation unit general monitor-control system for generally monitoring and controlling electric power generation units (A-3 etc.), the general monitor-control system allocating relations between the electric power generation units and interface devices (11) for monitoring and controlling the generation units.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: September 19, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihiko Tanaka, Hiroshi Fukuda, Jin Murata, Toshihiro Yamada
  • Patent number: 7105873
    Abstract: In a masking pattern (a) for patterning word and data lines, length is changed between adjacent word lines so as to be shifted from each other at their tips, and furthermore, the tip of each word line is cut obliquely. It is thus possible to prevent the resist pattern from separation and contact of adjacent patterns. Consequently, it is also possible to prevent break failures of patterned lines and short failures between those patterned lines.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: September 12, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Tomonori Sekiguchi, Toshihiko Tanaka, Toshiaki Yamanaka, Takeshi Sakata, Katsutaka Kimura
  • Publication number: 20060183310
    Abstract: A method of fabricating a semiconductor device including a first wiring pattern extending in a vertical direction and a second wiring pattern identical in geometry to the first wiring pattern and extending in a (horizontal) direction orthogonal to the vertical direction, including the steps of: employing linearly polarized illumination to perform exposure along a mask pattern including mask patterns used to form the first and second wiring patterns, respectively; and subsequently forming the first and second wiring patterns having a geometry along the mask patterns. The mask patterns to form the first and second wiring patterns are formed to be different in geometry.
    Type: Application
    Filed: December 22, 2004
    Publication date: August 17, 2006
    Inventor: Toshihiko Tanaka
  • Publication number: 20060134706
    Abstract: An atopic dermatitis inducer binding to a human own IgE antibody and activating mast cells and basophiles, which includes a purified human secretion fraction, or an antigenic molecule or an antigenic determinant in the purified fraction, and obtained through the following steps of: filtering a human secretion, removing insoluble matters and collecting the filtrate; mixing the filtrate with a ConA-affinity carrier and collecting the supernatant; and separating a component having a histamine-releasing activity from the supernatant by column chromatography. This inducer is effective in diagnosing and treating human atopic dermatitis.
    Type: Application
    Filed: July 9, 2004
    Publication date: June 22, 2006
    Inventors: Michihiro Hide, Toshihiko Tanaka, Akio Tanaka, Kaori Ishii, Hidenori Suzuki
  • Publication number: 20060125758
    Abstract: A driving circuit of an LCD display apparatus, which adjusts the sampling timing of a video signal. Driving signals from a driving IC and a reference power source are supplied via a flexible printed circuit FPC to an LCD panel. A horizontal clock signal is subjected to switching adjustment in a propagation delay adjustment circuit, which alternatively switches a delay amount of the horizontal clock signal between two levels, and the resulting horizontal clock signal subjected to the switching adjustment is then supplied to a horizontal shift register. The FPC generates a switching signal by branching from either a high potential voltage signal VDD or a low potential voltage signal VSS and supplies the switching signal to the propagation delay adjustment circuit. A phase switching circuit having a function similar to that of the propagation delay adjustment circuit may be provided within the driving IC.
    Type: Application
    Filed: November 29, 2005
    Publication date: June 15, 2006
    Inventors: Kuni Yamamura, Michiru Senda, Ryoichi Yokoyama, Yasushi Miyajima, Toshihiko Tanaka
  • Publication number: 20060110667
    Abstract: An area for fabricating a photomask having light-shielding patterns each formed of an organic film, and areas for fabricating a semiconductor integrated circuit device are provided within the same clean room. A manufacturing device and an inspecting device are commonly used during the fabrication of the photomask and the fabrication of the semiconductor integrated circuit device.
    Type: Application
    Filed: January 3, 2006
    Publication date: May 25, 2006
    Inventors: Norio Hasegawa, Toshihiko Tanaka, Tsuneo Terasawa, Aritoshi Sugimoto
  • Patent number: 7047727
    Abstract: A rapid catalyst warm-up control device for an internal combustion engine performs irregular injection dither control during the rapid catalyst warm-up control after starting the engine. In the irregular injection dither control, injection modes are switched after every fuel injection to the cylinders (every 180° CA for a 4-cylinder engine) between a lean injection mode and a rich injection mode in such a pattern that rich injections will not occur consecutively for the same cylinder (dither cycle=540° CA, 900° CA, 1080° CA, or the like). In the lean injection mode, fuel is injected such that the air-fuel ratio is leaner than the stoichiometric ratio, and in the rich injection mode, air-fuel ratio is richer than the stoichiometric ratio. The rich gas emitted from the cylinders where the rich injection has been performed is thus allowed to flow through a different catalyst region every time instead of flowing only through the same region.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: May 23, 2006
    Assignees: Denso Corporation, Toyota Jidosha Kabushiki Kaisha
    Inventors: Toshihiko Tanaka, Koichi Hoshi, Takaaki Itoh
  • Patent number: 7040011
    Abstract: A wiring substrate is manufactured in short TAT. Wirings of the wiring substrate are formed by an exposure treatment using a photomask which has shade patterns each containing at least nano particles and a binder.
    Type: Grant
    Filed: January 15, 2002
    Date of Patent: May 9, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Toshihiko Tanaka, Masaharu Kubo, Takashi Hattori
  • Patent number: 6987984
    Abstract: A high-frequency switch module comprising one band-separating circuit and two switch circuits, the first switch circuit being connected to one circuit separated by the band-separating circuit, and the second switch circuit being connected to the other circuit thereof; the first switch circuit being a circuit for switching a transmission system and a reception system for a first transmitting and receiving system; and the second switch circuit being a circuit for switching a transmission system and a reception system for a second transmitting and receiving system and a transmission system and a reception system for a third transmitting and receiving system.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: January 17, 2006
    Assignee: Hitachi Metals, Ltd.
    Inventors: Shigeru Kemmochi, Mitsuhiro Watanabe, Hiroyuki Tai, Tsuyoshi Taketa, Toshihiko Tanaka
  • Patent number: 6978819
    Abstract: A label fitting apparatus for fitting a label on a container. The label fitting apparatus includes label fitting heads at even intervals on an outer perimeter of a main turret. Each fitting head includes a container table to support a container, a container presser bar to apply a force to a top of the container, and a label holder to hold the label. Rotation of the main turret causes the container presser bar to lower and pass through a label held by the vacuum jaws to apply a pressing force against a container supported by the container table such that the container is sandwiched between the container table and the container presser bar. The container is transferred in an axial direction relative to the label holder such that the label is fitted on the container.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: December 27, 2005
    Assignee: Nippon Automatic Fine Machinery Co., Ltd.
    Inventors: Toshihiko Tanaka, Kazuo Kobayashi, Kanji Hatano
  • Patent number: 6979525
    Abstract: A method of manufacturing an electronic device that includes the step of forming a pattern on a substrate by using a halftone phase shift mask where the halftone phase shift mask includes a translucent phase shift pattern having an aperture; and an auxiliary pattern, disposed near the aperture and having as a principal component an organic film which possesses a light attenuating property or a light shielding property against exposure light. The halftone phase shift mask fabricating Turn-Around-Time (TAT) is shortened thereby shortening the development time required for an electronic device, the production cost of which has also been reduced.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: December 27, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Toshihiko Tanaka, Takashi Tattori
  • Patent number: 6973209
    Abstract: A defect inspection system is provided which comprises an image acquiring section for acquiring a two-dimensional image of a subject which is a processing target in a manufacturing process, a defect extracting section for extracting a defect by a defect extraction algorithm using a predetermined parameter for an image acquired by the image acquiring section, a displaying section for displaying an image of a defect of the subject extracted by the defect extracting section, a parameter adjusting section for adjusting the parameter in accordance with a defect extraction degree for the subject, and a quality judging section for judging the quality of the subject based on a defect information extracted by the defect extracting section.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: December 6, 2005
    Assignee: Olympus Optical Co., Ltd.
    Inventor: Toshihiko Tanaka
  • Patent number: 6965308
    Abstract: A system for operating a plurality of power generation stations. The system comprises: a general control device for monitoring a plurality of power generation stations, each of the stations including at least one electric power generation unit; a plurality of unit control devices, each of which monitoring each of the generation units, the unit control devices producing alarm data; and communication means for exchanging data between the general control device and each of the unit control devices. Only part of the alarm data produced in the unit control devices are displayed at the general control device.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: November 15, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Fukuda, Toshihiko Tanaka, Toshio Fujiwara, Kanetoshi Nara, Jin Murata, Toshihiro Yamada
  • Patent number: 6958292
    Abstract: In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially with light shielding patterns 3a formed of a resist film, in addition to light shielding patterns formed of a metal.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: October 25, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Norio Hasegawa, Joji Okada, Toshihiko Tanaka, Kazutaka Mori, Ko Miyazaki
  • Publication number: 20050228545
    Abstract: An electric power plant general control system for controlling power generating units. A generating unit (GU2) can operate part of the auxiliaries based on an automation command outputted from a unit computer (UC2) having a sequence function portion. The generating unit operates the remaining part of the auxiliaries based on an operation command outputted from an operation board (OB2) without a sequence function portion, the operation board disposed separately from the unit computer. A general automation computer (GAC) is connected with an upper system of the unit computer, and an operator command is inputted from an interactive apparatus (I/F4). The general control system is provided with a mock-up portion (Moc) equivalent to the sequence function portion disposed on the side of the auxiliaries controlled by the automation command outputted from the unit computer. The operation signal from the general automation computer is outputted to the unit computer and the operation board.
    Type: Application
    Filed: March 28, 2003
    Publication date: October 13, 2005
    Inventors: Toshihiko Tanaka, Hiroshi Fukuda, Jin Murata, Toshihiro Yamada
  • Patent number: 6954268
    Abstract: The present invention provides a defect inspection apparatus comprising an inspection section which inspects a front surface and a rear surface of a sample, a control section which processes image data on the front surface and rear surface of the sample obtained by the inspection section, moving section provided in the inspection section and capable of reciprocating the sample, illumination section which illuminates the front surface and rear surface of the sample moved by the moving section, and image pickup section which picks up images of the front surface and rear surface of the sample illuminated by the illumination section, wherein at least one of an incidence angle of the illumination section on the sample and an image pickup angle of the image pickup section to the sample is changeable.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: October 11, 2005
    Assignee: Olympus Corporation
    Inventors: Hiroshi Naiki, Toshihiko Tanaka
  • Publication number: 20050221769
    Abstract: A high-frequency switch circuit is provided for switching a connection between a common transmission circuit and antenna side circuit in a plurality of transmitting and receiving systems. The high-frequency switch includes a connection between the antenna side circuit and a reception circuit in one of the plurality of transmitting and receiving systems, and a connection between the antenna side circuit and a reception circuit in the other of the plurality of transmitting and receiving systems, the high-frequency switch circuit comprising a first diode; a first distributed constant line; a second diode; a capacitor; a third diode; a second distributed constant line; and a fourth diode.
    Type: Application
    Filed: March 28, 2005
    Publication date: October 6, 2005
    Inventors: Shigeru Kemmochi, Mitsuhiro Watanabe, Hiroyuki Tai, Tsuyoshi Taketa, Toshihiko Tanaka
  • Publication number: 20050221768
    Abstract: A high-frequency switch circuit is provided for switching a connection between a common transmission circuit and an antenna side circuit in a plurality of transmitting and receiving systems. The high-frequency switch includes a connection between the antenna side circuit and a reception circuit in one of the plurality of transmitting and receiving systems, and a connection between the antenna side circuit and a reception circuit in the other of the plurality of transmitting and receiving systems, the high-frequency switch circuit comprising a first diode, a second diode, and a distributed constant line, wherein a third diode is connected to the first and second diodes through the distributed constant line.
    Type: Application
    Filed: March 28, 2005
    Publication date: October 6, 2005
    Inventors: Shigeru Kemmochi, Mitsuhiro Watanabe, Hiroyuki Tai, Tsuyoshi Taketa, Toshihiko Tanaka
  • Patent number: 6939649
    Abstract: A method of fabrication of a semiconductor integrated circuit device uses a mark having, on a first main surface of a mask substrate, a first light transmitting region, a second light transmitting region disposed at the periphery of the first light transmitting region and permitting inversion of the phase of light transmitted through the second light transmitting region relative to light transmitted through the first light transmitting region, and a light shielding region disposed at the periphery of the second light transmitting region. The second light transmitting region is formed from a first film deposited over the first main surface of the mask substrate, said light shielding region is formed by a second film deposited over the first main surface of the mask substrate via said first film, and at least one of said first film and second is formed from a resist film.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: September 6, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Shoji Hotta, Norio Hasegawa, Toshihiko Tanaka
  • Patent number: 6936406
    Abstract: In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially with light shielding patterns 3a formed of a resist film, in addition to light shielding patterns formed of a metal.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: August 30, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Norio Hasegawa, Joji Okada, Toshihiko Tanaka, Kazutaka Mori, Ko Miyazaki