Abstract: A control section (6) merely passes an incoming image data signal DAT onto a source driving section for display driving during the display of a still image. During the display of a moving image, the control section (6) converts, using a computing section (61) and a look-up table (5), a grayscale level signal in the incoming image data signal DAT to a grayscale level signal that is obtainable without using those application voltages at which the response speed of liquid crystal is slow. The control section (6) then outputs the resultant grayscale level signal to the source driving section for display driving.

Abstract: In one embodiment of the present invention, LUTs (T3) through (T5) are stored in a table memory. When an overshoot calculation section switches over from the LUT (T4), which is being used, to the LUT (T5), the overshoot calculation section obtains the LUT (T5) not out of an external memory but out of the table memory. At this time, in order that the overshoot calculation section can switch over quickly from the LUT (T5) to an LUT (T6) at the next time, a table managing section deletes, from the internal memory, the LUT (T3) to which the LUT (T5) does not switch over directly, meanwhile the table managing section obtains the LUT from the external memory so as to store the LUT (T6) in the table memory. With the arrangement, it becomes possible for a drive circuit to (i) operate at the same processing speed as a drive circuit in which all tables are stored in the internal memory, and simultaneously, (ii) reduce the amount of memory.

Abstract: In one embodiment of the present invention, the liquid crystal display device of the invention performs an overshoot drive, including: an LCD having a liquid crystal panel for displaying video image; a frame memory installed outside of the LCD; and lookup table, the table with which third gray scale data most suitable for performing the overshoot drive to the LCD can be computed based on first gray scale data of a first frame and second gray scale data of a second frame, where the second frame is a frame right before the first frame and is stored in the frame memory in advance, wherein lookup table data is stored for each response speed characteristic of the LCD. Thus, without rewriting of lookup table data, the liquid crystal display device having the lookup table most suitable for performing the overshoot drive is realized while high display quality is maintained therein.

Abstract: A display controller is capable of changing a refresh rate, indicative of how often a screen displayed on a display device having a plurality of pixels is switched, between a low refresh rate of 40 Hz and a normal refresh rate of 60 Hz and generates (i) a dot clock (reference clock) serving as a timing signal indicative of a timing of operation in the display device, (ii) video data indicative of an image to be displayed on the screen, (iii) Hsync for defining a horizontal period of a display on the screen, and (vi) Vsync for defining a vertical period of the display on the screen, so as to supply the dot clock, the video data, Hsync, and Vsync to the display device, wherein the display controller includes a dot clock generation circuit for generating the reference clock whose frequency is constant without depending on a change of the refresh rate.

Abstract: In one embodiment of the present application, a memory stores a lookup table storing, in accordance with a combination of a value of a video signal of a current frame and a value of a video signal of a previous frame, each of correction values, the correction values in each of which a temporal change of a video signal is enhanced. A correcting circuit carries out, with respect to a correction value selected from the lookup table, a predetermined correcting operation in accordance with a polarity of a voltage to be applied to each of data signal lines S1 through Sm, with the use of a correction coefficient which is set based on properties of liquid crystal. Thus found is a corrected video signal in accordance with a positive or negative polarity. This makes it possible to find, with less memory capacity, an optimum corrected video signal in accordance with a polarity of a voltage to be applied to a data signal line.

Abstract: In one embodiment of the present invention, when a still image is displayed, applied voltages respectively corresponding to a total of n (n being an integer of not less than 4) types of gradation 0 to (n?1) are outputted to pixels. When a moving image is displayed, an applied voltage corresponding to a predetermined gradation m (1?m?(n?2)) is applied to the pixels instead of applied voltages respectively corresponding to gradations of less than the predetermined gradation m. Overdrive driving is performed with respect to a total of n types of gradation.

Abstract: In one embodiment of the present invention, when a still image is displayed, applied voltages respectively corresponding to a total of n (n being an integer of not less than 4) types of gradation 0 to (n?1) are outputted to pixels. On the other hand, when a moving image is displayed, an applied voltage corresponding to a predetermined gradation m (1?m?(n?2)) is applied to the pixels instead of applied voltages respectively corresponding to gradations of less than the predetermined gradation m.

Abstract: In a gradation voltage generation circuit used in a video signal line driving circuit for driving video signal lines of a liquid crystal display device by time division based on switching control signals, a first variable resistor circuit is connected between one terminal of a voltage divider circuit for generating a gradation voltage group and a power source line for supplying a high-level voltage, and a second variable resistor circuit is connected between the other terminal of the voltage divider circuit and a power source line for supplying a low-level voltage. The resistances of the variable resistor circuits are switched based on the switching control signal. Thus, in the periods in which the video signal lines respectively connected to R, G and B pixel formation portions are driven, gradation voltages that are adapted to the gradation reproducibility for R, G and B are outputted respectively.

Abstract: A liquid crystal display device includes a liquid crystal display panel, a row electrode drive circuit (scanning signal line drive circuit), a column electrode drive circuit (source signal line drive circuit), a power supply circuit, a common electrode drive circuit, and a memory (storage means). The memory stores the respective optimum applied voltages for the source electrode corresponding to display modes of the liquid crystal display device, a reflective mode and a transmissive mode. With the above arrangement, in the case where the display mode is switched among a plurality of display modes, the above active matrix display device can reset an optimum applied voltage for a common electrode or a source electrode in accordance with each of the display modes to suppress the occurrence of flickers, thus allowing the display device to maintain a high quality of display all the time.

Abstract: In the display device and the display method of the present invention, a scanning signal line driving circuit controls falls of a scanning signal line, so as to make level shifts occurring to pixel potentials substantially uniform throughout display plane, the level shifts being caused by parasitic capacitances which parasitically exist in scanning signal lines. Fall waveforms of the scanning signal change at a change rate S× which is a change quantity per unit time, and by desirably setting the change rate S×, a change rate S×1 in the vicinity of an input-side end of the scanning signal line and a change rate S×N in the vicinity of the other end thereof are substantially equal to each other, not being influenced by signal delay transmission characteristic which the scanning signal line possesses, like scanning signal line waveforms Vg(1, j) and Vg(N, j).

Abstract: The present invention relates to a video signal line drive circuit of a display device. An object of the present invention is to, when gradation conversion is performed in the display device using an error diffusion method, provide a display with a smooth gradation change even at boundaries of display blocks. In an error diffusion operation circuit (36) of a source driver unit (302), an error diffusion process is performed for each pixel based on, in addition to image data (Da) for a display block of the source driver unit (302), image data (Da) for areas near boundaries between the display block of the source driver unit (302) and display blocks of source driver units (301, 303) in previous and subsequent stages. A video signal is generated based on error-diffused image data (Db) generated by the error diffusion process.

Abstract: In the display device and the display method of the present invention, a scanning signal line driving circuit controls falls of a scanning signal line, so as to make level shifts occurring to pixel potentials substantially uniform throughout display plane, the level shifts being caused by parasitic capacitances which parasitically exist in scanning signal lines. Fall waveforms of the scanning signal change at a change rate Sx which is a change quantity per unit time, and by desirably setting the change rate Sx, a change rate Sxl in the vicinity of an input-side end of the scanning signal line and a change rate SxN in the vicinity of the other end thereof are substantially equal to each other, not being influenced by signal delay transmission characteristic which the scanning signal line possesses, like scanning signal line waveforms Vg(1, j) and Vg(N, j).

Abstract: A display apparatus of the present invention is provided with (i) a second memory for storing therein data of one frame for a whole display area of a display section, (ii) a first memory, provided in addition of the second memory, for storing therein data of one frame for a partial display area, (iii) a control section for causing the data respectively read out from the memories, to be respectively written in the display areas to which the data correspond to, and casing the partial display area to move to an predetermined position within a display screen of the display section, when a predetermined time lapses. The display apparatus has an improved display quality by moving the partial display area without affecting an image displayed in an area other than the partial display area.

Abstract: The present invention is so arranged as to include (a) gradation reference potential generating means including a group of output terminals whose voltages are determined in accordance with a voltage division ratio of one ladder resistor, so as to output gradation reference potentials, for example, of 1024, which is a 16 multiple of a required 64-gradations; (b) output terminal designating means including a memory for designating, among from the output terminals, an output terminal for each of the 64-gradations required, in accordance with the display modes; and (c) selecting means for selecting an output terminal that corresponds to an input gradation signal, among from the output terminals designated by the output terminal designating section, and for applying a voltage via the thus selected output terminal to a display screen.

Abstract: The present invention is so arranged as to include (a) gradation reference potential generating means including a group of output terminals whose voltages are determined in accordance with a voltage division ratio of one ladder resistor, so as to output gradation reference potentials, for example, of 1024, which is a 16 multiple of a required 64-gradations; (b) output terminal designating means including a memory for designating, among from the output terminals, an output terminal for each of the 64-gradations required, in accordance with the display modes; and (c) selecting means for selecting an output terminal that corresponds to an input gradation signal, among from the output terminals designated by the output terminal designating section, and for applying a voltage via the thus selected output terminal to a display screen.

Abstract: A display device is provided with a display panel, and a source driver and a gate driver both for driving the display panel and includes a nonvolatile memory for storing a test sequence representing the procedures for a display test and testing patterns to be displayed in the display test and a control section for, in accordance with a test control signal supplied externally, controlling the source driver and the gate driver so as to display the testing patterns on the display panel in accordance with the test sequence. Since the test sequence and the testing patterns are stored in the nonvolatile memory of the display device, this eliminates the need for cumbersome and extensive tasks of preparing testing devices respectively corresponding to the models of the display device and a great number of complex data of the test sequence and the testing pattern which are respectively suitable for the models of the display device and storing them in the testing devices, respectively.

Abstract: In a liquid crystal display device, a first skipping scanning process is performed by activating the scanning signals G(1), G(3) and G(5) corresponding to the odd-numbered rows in a pixel matrix made of numerous pixel formation portions in that order in a first half-period of a given frame, and voltages corresponding to the pixel values to be written into the pixel formation portions of the odd-numbered rows of the pixel matrix are applied to the video signal lines as positive-polarity video signals. In a second half-period of that frame, a second skipping scanning process is performed by activating the scanning signals G(2), G(4) and G(6) corresponding to the even-numbered rows in the pixel matrix in that order, and voltages corresponding to the pixel values to be written into the pixel formation portions of the even-numbered rows of the pixel matrix are applied to the video signal lines as negative-polarity video signals. Thus, line inversion driving is accomplished.

Abstract: A display device includes an inaction control circuit and a DCK-PLL circuit. The inaction control circuit stops driving of driving circuits, such as a signal line driving circuit, a scanning line driving circuit, analog circuit and the like, which are provided for driving an active matrix panel. The inaction control circuit stops the control circuits in a non-refresh period where all scanning lines become non-scanning state and provided between refresh periods for scanning a screen of the active matrix panel. The inaction control circuit also stops driving of the DCK-PLL circuit in the non-refresh period, in addition to stopping driving of the driving circuits.

Abstract: The signal line drive circuit is provided with: a reference voltage chooser circuit for choosing one of incoming voltages in accordance with tones represented by an image signal to output the chosen voltage as a signal line drive signal; and a reference voltage line for directly transmitting first reference voltages VB1 (inclusive of a maximum voltage value VB1max and a minimum voltage value VB1min) supplied by an external reference power supply circuit to the reference voltage chooser circuit. The arrangement eliminates the need to provide a buffer circuit to a reference voltage line over which the first reference voltage is directly transmitted, thereby reducing that electric current which would otherwise flow through the buffer circuit.

Abstract: A drive circuit for use in a liquid crystal display supplies source signals from a source driver to pixel electrodes through switching by means of TFTs according to scan signals from a gate driver, includes a reference voltage generator circuit for adjusting potential differences between the pixel electrodes and a common electrode so as to compensate for the effects of variations in drain voltages caused by parasitic capacity in the TFTs and compensate for irregularities in DC voltage caused by asymmetry in properties between an active matrix substrate and an opposite substrate sandwiching a liquid crystal layer. The reference voltage generator circuit is composed of a reference voltage generator circuit for shifting the voltage levels of the source signals supplied by the source driver equally for all the pixel electrodes.