Patents by Inventor Toshihiro Yanagi

Toshihiro Yanagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7126595
    Abstract: Adapting to load currents which differ by more than 100 times between a scanning mode and a hold mode, a frequency of pump operation is decided according to the maximum value of the load currents, and circuit elements of a power supply, for example, such as capacitance of a capacitor for pump operation or a smoothing capacitor, element configurations of switching elements, or capacitance or resistance value of a CR oscillator are set based on this frequency, so that a load current detector lowers the frequency of the pump operation under light load to reduce a self-loss of power in the power supply. This realizes a charge-pump power supply which is installed in a liquid crystal display device of a terminal device of a portable phone, with reduced power consumption under light load and a longer standby time.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: October 24, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihiro Yanagi, Kouji Kumada, Takashige Ohta
  • Patent number: 7113180
    Abstract: A plurality of column electrode driving circuits is used in a matrix type display device including a plurality of row electrode driving circuits each for driving a plurality of row electrodes and the plurality of column electrode driving circuits each for driving a plurality of column electrodes.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: September 26, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Taketoshi Nakano, Takafumi Kawaguchi, Toshihiro Yanagi, Keishi Nishikubo
  • Patent number: 7098901
    Abstract: A display device includes a display panel including a bus line section; and at least one driver for driving the bus line section included in the display panel. Each of the at least one driver includes an amplifier for generating a non-driving signal based on an input signal, the non-driving signal not contributing to driving of the bus line section.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: August 29, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Taketoshi Nakano, Takafumi Kawaguchi, Toshihiro Yanagi, Keishi Nishikubo
  • Publication number: 20060187159
    Abstract: A display device includes a display panel including a bus line section; and at least one driver for driving the bus line section included in the display panel. Each of the at least one driver includes an amplifier for generating a non-driving signal based on an input signal, the non-driving signal not contributing to driving of the bus line section.
    Type: Application
    Filed: April 5, 2006
    Publication date: August 24, 2006
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Taketoshi Nakano, Takafumi Kawaguchi, Toshihiro Yanagi, Keishi Nishikubo
  • Publication number: 20060077163
    Abstract: In the display device and the display method of the present invention, a scanning signal line driving circuit controls falls of a scanning signal line, so as to make level shifts occurring to pixel potentials substantially uniform throughout display plane, the level shifts being caused by parasitic capacitances which parasitically exist in scanning signal lines. Fall waveforms of the scanning signal change at a change rate Sx which is a change quantity per unit time, and by desirably setting the change rate Sx, a change rate Sxl in the vicinity of an input-side end of the scanning signal line and a change rate SxN in the vicinity of the other end thereof are substantially equal to each other, not being influenced by signal delay transmission characteristic which the scanning signal line possesses, like scanning signal line waveforms Vg(1, j) and Vg(N, j).
    Type: Application
    Filed: September 29, 2005
    Publication date: April 13, 2006
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Toshihiro Yanagi, Hideki Morii, Hidekazu Miyata
  • Patent number: 7027024
    Abstract: In the display device and the display method of the present invention, a scanning signal line driving circuit controls falls of a scanning signal line, so as to make level shifts occurring to pixel potentials substantially uniform throughout display plane, the level shifts being caused by parasitic capacitances which parasitically exist in scanning signal lines. Fall waveforms of the scanning signal change at a change rate Sx which is a change quantity per unit time, and by desirably setting the change rate Sx, a change rate Sx1 in the vicinity of an input-side end of the scanning signal line and a change rate SxN in the vicinity of the other end thereof are substantially equal to each other, not being influenced by signal delay transmission characteristic which the scanning signal line possesses, like scanning signal line waveforms Vg(1, j) and Vg(N, j).
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: April 11, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihiro Yanagi, Hideki Morii, Hidekazu Miyata
  • Patent number: 7002541
    Abstract: In an active matrix type display device, a signal voltage is applied from a signal line driving circuit via an active element such as a TFT to display electrodes on a matrix substrate, and a common voltage is applied to a counter electrode on a facing substrate so that the common voltage is shared by respective display cells. A level of the common voltage is switched in every refresh period of a different length. Thus, it is possible to appropriately set a value of the common voltage which is a reference for specifying an effective voltage of positive polarity and an effective voltage of negative polarity according to the refresh periods. As a result, even when the refresh periods of a different length exist in a mixed manner, it is possible to equalize the effective voltage of positive polarity and the effective voltage of negative polarity so as to suppress an occurrence of a flicker.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: February 21, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihiro Yanagi, Kouji Kumada, Takashige Ohta, Katsuya Mizukata
  • Patent number: 6867760
    Abstract: In the display device and the display method of the present invention, a scanning signal line driving circuit controls falls of a scanning signal line, so as to make level shifts occurring to pixel potentials substantially uniform throughout display plane, the level shifts being caused by parasitic capacitances which parasitically exist in scanning signal lines. Fall waveforms of the scanning signal change at a change rate Sx which is a change quantity per unit time, and by desirably setting the change rate Sx, a change rate Sx1 in the vicinity of an input-side end of the scanning signal line and a change rate SxN in the vicinity of the other end thereof are substantially equal to each other, not being influenced by signal delay transmission characteristic which the scanning signal line possesses, like scanning signal line waveforms Vg(1, j) and Vg(N, j).
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: March 15, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihiro Yanagi, Hideki Morii, Hidekazu Miyata
  • Patent number: 6831620
    Abstract: An object of the invention is to provide a liquid crystal display device capable of attaining smooth gray scale display and greatly improved display quality, free from the display problems of flicker and the like. The resistance division ratios for gray scale voltage generating resistors provided in the source driver of a source line drive circuit for applying gray scale voltages to pixels via source lines are optimized in accordance with a gray scale display characteristic, and the positive-side voltage resistance division ratios and the negative-side voltage resistance division ratios are set so as to be asymmetrical with one another in consideration of a level shift characteristic.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: December 14, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Keishi Nishikubo, Toshihiro Yanagi
  • Publication number: 20040246245
    Abstract: In the display device and the display method of the present invention, a scanning signal line driving circuit controls falls of a scanning signal line, so as to make level shifts occurring to pixel potentials substantially uniform throughout display plane, the level shifts being caused by parasitic capacitances which parasitically exist in scanning signal lines. Fall waveforms of the scanning signal change at a change rate Sx which is a change quantity per unit time, and by desirably setting the change rate Sx, a change rate Sx1 in the vicinity of an input-side end of the scanning signal line and a change rate SxN in the vicinity of the other end thereof are substantially equal to each other, not being influenced by signal delay transmission characteristic which the scanning signal line possesses, like scanning signal line waveforms Vg(1, j) and Vg(N, j).
    Type: Application
    Filed: June 30, 2004
    Publication date: December 9, 2004
    Inventors: Toshihiro Yanagi, Hideki Morii, Hidekazu Miyata
  • Publication number: 20040212632
    Abstract: In a gradation voltage generation circuit used in a video signal line driving circuit for driving video signal lines of a liquid crystal display device by time division based on switching control signals, a first variable resistor circuit is connected between one terminal of a voltage divider circuit for generating a gradation voltage group and a power source line for supplying a high-level voltage, and a second variable resistor circuit is connected between the other terminal of the voltage divider circuit and a power source line for supplying a low-level voltage. The resistances of the variable resistor circuits are switched based on the switching control signal. Thus, in the periods in which the video signal lines respectively connected to R, G and B pixel formation portions are driven, gradation voltages that are adapted to the gradation reproducibility for R, G and B are outputted respectively.
    Type: Application
    Filed: April 7, 2004
    Publication date: October 28, 2004
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Ken Inada, Taketoshi Nakano, Toshihiro Yanagi
  • Publication number: 20040183768
    Abstract: In a liquid crystal display device, a first skipping scanning process is performed by activating the scanning signals G(1), G(3) and G(5) corresponding to the odd-numbered rows in a pixel matrix made of numerous pixel formation portions in that order in a first half-period of a given frame, and voltages corresponding to the pixel values to be written into the pixel formation portions of the odd-numbered rows of the pixel matrix are applied to the video signal lines as positive-polarity video signals. In a second half-period of that frame, a second skipping scanning process is performed by activating the scanning signals G(2), G(4) and G(6) corresponding to the even-numbered rows in the pixel matrix in that order, and voltages corresponding to the pixel values to be written into the pixel formation portions of the even-numbered rows of the pixel matrix are applied to the video signal lines as negative-polarity video signals. Thus, line inversion driving is accomplished.
    Type: Application
    Filed: March 19, 2004
    Publication date: September 23, 2004
    Inventors: Asahi Yamato, Taketoshi Nakano, Toshihiro Yanagi
  • Patent number: 6784863
    Abstract: An active matrix liquid crystal display drives liquid crystal by writing through TFTs, etc. a source signal from a signal line drive circuit to display electrodes in display cells on a matrix substrate and applying a common signal supplied from a common signal generator to common electrodes on an opposite substrate, the common signal changing in polarity in each frame. After scanning is completed for scan lines corresponding to one frame, a controller controls the interval between scan periods and the cycle of change in polarity of the common signal so as to provide a non-scan period that is longer than the scan period. The provision of the non-scan period extends the duration in which a specified voltage is retained by the display cell. This reduces the effects of variations in retained voltages caused by parasitic capacitance which develops in reflective electrode structures in which the display electrodes partly overlook scan lines and signal lines.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: August 31, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihiro Yanagi, Kouji Kumada, Takashige Ohta, Katsuya Mizukata
  • Patent number: 6771282
    Abstract: In a matrix display device, when cells of first to third colors composing one pixel are first to third cells, the second cell is disposed on one side of the first cell in a signal line alignment direction while disposing the third cell on the other side of the first cell in a scanning line alignment direction, and the first to third cells form the shape of a letter L. One pixel and another pixel adjacent to either side of the former pixel in the scanning line alignment direction are a first pixel in the shape of the letter L and a second pixel in the shape of the letter L and in a state rotating by 180° with respect to the first pixel, respectively.
    Type: Grant
    Filed: May 9, 2001
    Date of Patent: August 3, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihiro Yanagi, Takafumi Kawaguchi, Taketoshi Nakano
  • Patent number: 6765551
    Abstract: A column electrode driving circuit for an image display device for selecting, from among a plurality of reference voltage levels, reference voltage levels respectively corresponding to gray scale levels in input data, and outputting the respective selected voltage levels to at least one data line. The input data includes data of a first color, a second color, and a third color. The reference voltage levels are independently selected corresponding to the gray scale levels in the input data of the first, second, and third colors. Among the reference voltage levels independently selected corresponding to a given gray scale level in the input data of the first, second, and third colors, the reference voltage level selected corresponding to at least one color is different from the reference voltage level or levels selected corresponding to the other color or colors, the given gray scale level being within a predetermined range.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: July 20, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Taketoshi Nakano, Takafumi Kawaguchi, Toshihiro Yanagi
  • Patent number: 6741229
    Abstract: A device for displaying a video signal which is supplied to the device along with a vertical synchronizing signal, includes a plurality of pixels arranged in a matrix, a switching element connected to each of the plurality of pixels, and a driving circuit for writing the video signal into each of the plurality of pixels via the switching element. The driving circuit writes the video signal to each of the plurality of pixels with a cycle TW1 shorter than one cycle of the vertical synchronizing signal.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: May 25, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihiro Yanagi, Takafumi Kawaguchi
  • Publication number: 20040085275
    Abstract: A display device is provided with a display panel, and a source driver and a gate driver both for driving the display panel and includes a nonvolatile memory for storing a test sequence representing the procedures for a display test and testing patterns to be displayed in the display test and a control section for, in accordance with a test control signal supplied externally, controlling the source driver and the gate driver so as to display the testing patterns on the display panel in accordance with the test sequence. Since the test sequence and the testing patterns are stored in the nonvolatile memory of the display device, this eliminates the need for cumbersome and extensive tasks of preparing testing devices respectively corresponding to the models of the display device and a great number of complex data of the test sequence and the testing pattern which are respectively suitable for the models of the display device and storing them in the testing devices, respectively.
    Type: Application
    Filed: October 29, 2003
    Publication date: May 6, 2004
    Inventors: Hiroaki Sugiyama, Taketoshi Nakano, Toshihiro Yanagi
  • Publication number: 20040085635
    Abstract: The present invention is so arranged as to include (a) gradation reference potential generating means including a group of output terminals whose voltages are determined in accordance with a voltage division ratio of one ladder resistor, so as to output gradation reference potentials, for example, of 1024, which is a 16 multiple of a required 64-gradations; (b) output terminal designating means including a memory for designating, among from the output terminals, an output terminal for each of the 64-gradations required, in accordance with the display modes; and (c) selecting means for selecting an output terminal that corresponds to an input gradation signal, among from the output terminals designated by the output terminal designating section, and for applying a voltage via the thus selected output terminal to a display screen.
    Type: Application
    Filed: September 26, 2003
    Publication date: May 6, 2004
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kiyoshi Nakagawa, Toshihiro Yanagi, Taketoshi Nakano
  • Publication number: 20040056834
    Abstract: A liquid crystal display device includes a liquid crystal display panel, a row electrode drive circuit (scanning signal line drive circuit), a column electrode drive circuit (source signal line drive circuit), a power supply circuit, a common electrode drive circuit, and a memory (storage means). The memory stores the respective optimum applied voltages for the source electrode corresponding to display modes of the liquid crystal display device, a reflective mode and a transmissive mode. With the above arrangement, in the case where the display mode is switched among a plurality of display modes, the above active matrix display device can reset an optimum applied voltage for a common electrode or a source electrode in accordance with each of the display modes to suppress the occurrence of flickers, thus allowing the display device to maintain a high quality of display all the time.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 25, 2004
    Inventors: Kouji Saitou, Toshihiro Yanagi, Taketoshi Nakano
  • Publication number: 20040051706
    Abstract: A display apparatus of the present invention is provided with (i) a second memory for storing therein data of one frame for a whole display area of a display section, (ii) a first memory, provided in addition of the second memory, for storing therein data of one frame for a partial display area, (iii) a control section for causing the data respectively read out from the memories, to be respectively written in the display areas to which the data correspond to, and casing the partial display area to move to an predetermined position within a display screen of the display section, when a predetermined time lapses. The display apparatus has an improved display quality by moving the partial display area without affecting an image displayed in an area other than the partial display area.
    Type: Application
    Filed: July 11, 2003
    Publication date: March 18, 2004
    Inventors: Taketoshi Nakano, Toshihiro Yanagi, Takafumi Kawaguchi