Patents by Inventor Toshiki Hara
Toshiki Hara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100212129Abstract: A method for manufacturing a liquid ejecting head, which has a piezoelectric element including a first electrode, a piezoelectric layer formed on the first electrode, and a second electrode formed on the piezoelectric layer on the opposite side of the first electrode. The liquid ejecting head ejects liquid droplets from a nozzle opening by generating pressure in a pressure-generating chamber using the piezoelectric element. The method includes forming the first electrode, forming a piezoelectric precursor film on the first electrode, first heat treatment of forming a piezoelectric film by crystallizing the piezoelectric precursor film by heat treatment, forming the second electrode, and second heat treatment of heating the piezoelectric layer composed of the piezoelectric film at a temperature of 150° C. or more while applying a voltage between the first electrode and the second electrode.Type: ApplicationFiled: February 16, 2010Publication date: August 26, 2010Applicant: SEIKO EPSON CORPORATIONInventor: Toshiki HARA
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Patent number: 7592208Abstract: A method for manufacturing a semiconductor substrate, includes: forming a first semiconductor layer on a semiconductor base material; forming a second semiconductor layer on the first semiconductor layer, the second semiconductor layer having an etching selectivity larger than that of the first semiconductor layer; forming, at the second semiconductor layer and the first semiconductor layer in the vicinity of an element region, at least three or more hole portions for exposing the semiconductor base material; forming, on the semiconductor base material, a supporting body for supporting the second semiconductor layer on the semiconductor base material so that the hole portions are filled and the second semiconductor layer is covered; etching the supporting body at regions other than predetermined regions including the hole portions and the element region to form an aperture plane in the supporting body, the aperture plane exposes a part of an end section of the first semiconductor layer; etching the first semiType: GrantFiled: August 17, 2006Date of Patent: September 22, 2009Assignee: Seiko Epson CorporationInventor: Toshiki Hara
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Patent number: 7553713Abstract: A semiconductor substrate includes a semiconductor base substrate that has an oxide film selectively formed on a part thereof, the oxide film having a non-uniform thickness; and a semiconductor layer that is formed on the oxide film by epitaxial growth so as to have a non-uniform thickness.Type: GrantFiled: October 31, 2005Date of Patent: June 30, 2009Assignee: Seiko Epson CorporationInventor: Toshiki Hara
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Patent number: 7541258Abstract: A semiconductor is manufactured by forming a ?-aluminum oxide layer on a semiconductor substrate, forming a semiconductor layer on the ?-aluminum oxide layer, forming an exposed portion for exposing a part of the ?-aluminum oxide layer through the semiconductor layer, forming a support which is formed of a material having an etching rate smaller than that of the ?-aluminum oxide layer and which supports the semiconductor layer on the semiconductor substrate, forming a cavity between the semiconductor substrate and the semiconductor layer, forming a buried insulating layer in the cavity, forming a gate electrode on the semiconductor layer with a gate insulating layer therebetween and forming source/drain layers, which are disposed on both sides of the gate electrode, in the semiconductor layer.Type: GrantFiled: November 14, 2005Date of Patent: June 2, 2009Assignee: Seiko Epson CorporationInventor: Toshiki Hara
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Patent number: 7534687Abstract: A semiconductor device, comprises: a transistor having structured to include a gate electrode formed on a semiconductor layer on a semiconductor substrate via a gate insulating film, and a source layer and a drain layer formed on the semiconductor layer sandwiching the gate electrode; a hollow portion existing between the source layer and the semiconductor substrate, and between the drain layer and the semiconductor substrate, respectively; and the hollow portion in absence between the semiconductor layer under the gate electrode and the semiconductor substrate.Type: GrantFiled: July 13, 2006Date of Patent: May 19, 2009Assignee: Seiko Epson CorporationInventor: Toshiki Hara
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Patent number: 7465641Abstract: Manufacturing a semiconductor device by removing the insulation film in an alignment mark-forming region, depositing a first semiconductor layer, removing the insulation film on the semiconductor substrate after the second semiconductor layer is formed, forming a first exposing region for exposing the semiconductor substrate through the second semiconductor layer and the first semiconductor layer with reference to the second semiconductor layer in the alignment mark-forming region as a first alignment mark for positioning, while forming, on the semiconductor substrate, a second alignment mark, forming a second exposing region for exposing the first semiconductor layer by using the second alignment mark as a reference for positioning, forming a cavity and forming a buried insulation layer in the cavity, and forming a first grate electrode by using the second alignment mark as a reference for positioning.Type: GrantFiled: March 29, 2006Date of Patent: December 16, 2008Assignee: Seiko Epson CorporationInventors: Toshiki Hara, Kei Kanemoto
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Publication number: 20080173468Abstract: A wiring substrate comprises: a flexible substrate having a first region and a second region; a wiring line formed on the flexible substrate; and an electronic element that is disposed on the flexible substrate in the first region and electrically coupled to the wiring line. Flexibility of the first region is lower than flexibility of the second region.Type: ApplicationFiled: December 18, 2007Publication date: July 24, 2008Applicant: SEIKO EPSON CORPORATIONInventor: Toshiki HARA
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Publication number: 20080110017Abstract: A method of manufacturing a wiring substrate includes the steps of bonding a first substrate, which includes a pixel area and a drive area located around the pixel area, and is provided with a protruding section formed in the pixel area, to a second substrate on which a peripheral circuit is disposed, so that the peripheral circuit faces the drive area, and separating the second substrate from the first substrate while leaving the peripheral circuit on the first substrate. In the step of bonding the first and the second substrates, the peripheral circuit is pressure-bonded to the first substrate, and the protruding section is made abut on the second substrate in the pixel area.Type: ApplicationFiled: October 3, 2007Publication date: May 15, 2008Applicant: SEIKO EPSON CORPORATIONInventor: Toshiki HARA
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Publication number: 20080012121Abstract: A method for manufacturing a semiconductor apparatus including a plurality of device chips aligned approximately in an L-shape at the perimeter of the two adjacent sides of a flexible substrate and a circuit coupled with the device chip, the method including: aligning, on a temporal substrate, the plurality of device chips approximately in an L-shape, in an arrangement as on a surface of the flexible substrate, so as to form a group of device chips, and arranging a plurality of arrays of device chips on the temporal substrate, each array of device chips formed by the plurality of groups of device chips arranged in a band-shape, from one long side to the other long side of the temporal substrate, each L-shape formed by the group of device chips pointing towards the same direction, a front of the band-shape being a corner of a perimeter of the group; delaminating the group of device chips as one unit from the temporal substrate, transferring onto the surface of the flexible substrate; and coupling each of the dType: ApplicationFiled: June 29, 2007Publication date: January 17, 2008Applicant: SEIKO EPSON CORPORATIONInventor: Toshiki HARA
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Publication number: 20080012012Abstract: A method for manufacturing a semiconductor device which is equipped with a switching element having an organic semiconductor layer and a drive circuit electrically coupled to the switching element on a first surface of a flexible substrate, the method including: providing the drive circuit above a temporary substrate in advance, transferring the drive circuit to the first surface of the flexible substrate, and then providing the organic semiconductor layer by a liquid phase process.Type: ApplicationFiled: June 29, 2007Publication date: January 17, 2008Applicant: SEIKO EPSON CORPORATIONInventor: Toshiki HARA
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Patent number: 7316943Abstract: A method for manufacturing a semiconductor apparatus, comprises: forming a first semiconductor layer on a semiconductor substrate of a transistor formation region; etching and removing a part of the first semiconductor layer sandwiched by a source formation region and a drain formation region to form a groove section in which a surface of the semiconductor substrate is exposed in the first semiconductor layer; forming a second semiconductor layer having an etching selectivity smaller than that of the first semiconductor layer on the semiconductor substrate of the transistor formation region so that the groove section is filled and the surface of the first semiconductor layer is covered; etching and removing the first semiconductor layer under the second semiconductor layer from the outside of the transistor formation region to form a cavity section under the second semiconductor layer; and forming a buried oxide film in the cavity section.Type: GrantFiled: July 13, 2006Date of Patent: January 8, 2008Assignee: Seiko Epson CorporationInventor: Toshiki Hara
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Publication number: 20070296000Abstract: A method for manufacturing a semiconductor device, includes: partially forming an epitaxial growth stopper film on a single crystal semiconductor substrate; sequentially depositing a first semiconductor layer and a second semiconductor layer on the semiconductor substrate by an epitaxial growth process; forming a first groove penetrating through the second semiconductor layer and the first semiconductor layer on the semiconductor substrate, at a region inside from an outer peripheral portion of the epitaxial growth stopper film, by partially etching the second semiconductor layer and the first semiconductor layer; forming a support body film on an entire surface of the semiconductor substrate, so as to fill the first groove and cover the second semiconductor layer; forming a support body in a shape covering the second semiconductor layer from the first groove to an element region extending over the outer peripheral portion of the epitaxial growth stopper film, by partially etching the support body film; formiType: ApplicationFiled: June 15, 2007Publication date: December 27, 2007Applicant: Seiko Epson CorporationInventor: Toshiki Hara
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Patent number: 7271447Abstract: A semiconductor substrate includes a first semiconductor layer that is formed on a semiconductor base substrate, a second semiconductor layer that is formed on the first semiconductor layer and that has an etching selection ratio smaller than that of the first semiconductor layer, a cavity portion that is formed below the second semiconductor layer by removing a portion of the first semiconductor layer, a thermal oxidation film that is formed on the surface of the second semiconductor layer in the cavity portion, and a buried insulating film that is buried in the cavity portion.Type: GrantFiled: August 26, 2005Date of Patent: September 18, 2007Assignee: Seiko Epson CorporationInventors: Teruo Takizawa, Kei Kanemoto, Juri Kato, Toshiki Hara
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Publication number: 20070170579Abstract: A method of manufacturing a semiconductor substrate includes: forming on a semiconductor base a first isolation layer for isolating an element region from another region; forming a first semiconductor layer on the semiconductor base; forming a second semiconductor layer on the first semiconductor layer, the second semiconductor layer having an etch selectivity less than that of the first semiconductor layer; forming a support hole by removing a portion of the second semiconductor layer and a portion of the first semiconductor layer each corresponding to the support hole; forming a support formation layer above the semiconductor base so as to cover the support hole and the second semiconductor layer; forming a support and an exposed surface for exposing part of an end of each of the first semiconductor layer and the second semiconductor layer by etching an area other than that including the support hole and the element region therein, the first semiconductor layer and the second semiconductor layer being locatType: ApplicationFiled: January 16, 2007Publication date: July 26, 2007Applicant: Seiko Epson CorporationInventor: Toshiki Hara
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Publication number: 20070170468Abstract: A method for manufacturing a semiconductor substrate includes: forming an element isolation layer on a semiconductor base material for separating an element region from the other regions; forming a first semiconductor layer on the semiconductor base material; forming a second semiconductor layer on the first semiconductor layer, the second semiconductor layer having an etching selection ratio smaller than that of the first semiconductor layer; forming support holes by removing portions of the first semiconductor layer and the second semiconductor layer, the portions corresponding to regions for the support holes; forming a support forming layer on the semiconductor base material such that the support holes and the second semiconductor layer are covered by the support forming layer; forming exposed surfaces such that portions of the support forming layer other than a region including the support holes and the element region are etched to expose a support and portions of end portions of the first semiconductorType: ApplicationFiled: January 16, 2007Publication date: July 26, 2007Applicant: Seiko Epson CorporationInventor: Toshiki Hara
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Publication number: 20070075317Abstract: A semiconductor device includes a back gate electrode composed of a first single-crystal semiconductor layer formed on a first insulating layer; a second insulating layer formed on the first single-crystal semiconductor layer and having a film thickness smaller than a film thickness of the first insulating layer; a second single-crystal semiconductor layer formed on the second insulating layer; a gate electrode formed on the second single-crystal semiconductor layer; and source and drain layers that are formed on the second single-crystal semiconductor layer and arranged on respective sides of the gate electrode.Type: ApplicationFiled: July 20, 2006Publication date: April 5, 2007Applicants: SEIKO EPSON CORPORATION, TOKYO INSTITUTE OF TECHNOLOGYInventors: Juri Kato, Hideaki Oka, Kei Kanemoto, Toshiki Hara, Tetsushi Sakai
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Publication number: 20070045739Abstract: A method for manufacturing a semiconductor substrate, includes: forming a first semiconductor layer on a semiconductor base material; forming a second semiconductor layer on the first semiconductor layer, the second semiconductor layer having an etching selectivity larger than that of the first semiconductor layer; forming, at the second semiconductor layer and the first semiconductor layer in the vicinity of an element region, at least three or more hole portions for exposing the semiconductor base material; forming, on the semiconductor base material, a supporting body for supporting the second semiconductor layer on the semiconductor base material so that the hole portions are filled and the second semiconductor layer is covered; etching the supporting body at regions other than predetermined regions including the hole portions and the element region to form an aperture plane in the supporting body, the aperture plane exposes a part of an end section of the first semiconductor layer; etching the first semiType: ApplicationFiled: August 17, 2006Publication date: March 1, 2007Applicant: SEIKO EPSON CORPORATIONInventor: Toshiki HARA
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Publication number: 20070018246Abstract: A semiconductor device includes a back gate electrode composed of a first single-crystal semiconductor layer formed on a first insulating layer, a second insulating layer formed on the first single-crystal semiconductor layer, a second single-crystal semiconductor layer formed on the second insulating layer and having a film thickness smaller than a film thickness of the first single-crystal semiconductor layer, a gate electrode formed on the second single-crystal semiconductor layer, and source and drain layers that are formed on the second single-crystal semiconductor layer and arranged on respective sides of the gate electrode.Type: ApplicationFiled: June 7, 2006Publication date: January 25, 2007Applicants: SEIKO EPSON CORPORATION, TOKYO INSTITUTE OF TECHNOLOGYInventors: Juri Kato, Hideaki Oka, Kei Kanemoto, Toshiki Hara, Tetsushi Sakai
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Publication number: 20070020828Abstract: A method for manufacturing a semiconductor apparatus, comprises: forming a first semiconductor layer on a semiconductor substrate of a transistor formation region; etching and removing a part of the first semiconductor layer sandwiched by a source formation region and a drain formation region to form a groove section in which a surface of the semiconductor substrate is exposed in the first semiconductor layer; forming a second semiconductor layer having an etching selectivity smaller than that of the first semiconductor layer on the semiconductor substrate of the transistor formation region so that the groove section is filled and the surface of the first semiconductor layer is covered; etching and removing the first semiconductor layer under the second semiconductor layer from the outside of the transistor formation region to form a cavity section under the second semiconductor layer; and forming a buried oxide film in the cavity section.Type: ApplicationFiled: July 13, 2006Publication date: January 25, 2007Applicant: Seiko Epson CorporationInventor: Toshiki Hara
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Publication number: 20070013005Abstract: A semiconductor device, comprises: a transistor having structured to include a gate electrode formed on a semiconductor layer on a semiconductor substrate via a gate insulating film, and a source layer and a drain layer formed on the semiconductor layer sandwiching the gate electrode; a hollow portion existing between the source layer and the semiconductor substrate, and between the drain layer and the semiconductor substrate, respectively; and the hollow portion in absence between the semiconductor layer under the gate electrode and the semiconductor substrate.Type: ApplicationFiled: July 13, 2006Publication date: January 18, 2007Applicant: Seiko Epson CorporationInventor: Toshiki Hara