Patents by Inventor Toshiki Hara

Toshiki Hara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060223270
    Abstract: A method of manufacturing a semiconductor device including a step of forming an insulating film on a semiconductor substrate, a step of removing the insulating film selectively in a first alignment mark forming region and a silicon-on-insulator (SOI) structure forming region that are provided on the semiconductor substrate by patterning the insulating film, a step of forming a first semiconductor layer selectively in the first alignment mark forming region and the SOI structure forming region by epitaxial growth, a step of forming a second semiconductor layer whose etching rate is smaller than an etching rate of the first semiconductor layer selectively on the first semiconductor layer by the epitaxial growth, and removing the insulating film on the semiconductor substrate after the second semiconductor layer is formed.
    Type: Application
    Filed: March 29, 2006
    Publication date: October 5, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Toshiki Hara
  • Publication number: 20060223271
    Abstract: Manufacturing a semiconductor device by removing the insulation film in an alignment mark-forming region, depositing a first semiconductor layer, removing the insulation film on the semiconductor substrate after the second semiconductor layer is formed, forming a first exposing region for exposing the semiconductor substrate through the second semiconductor layer and the first semiconductor layer with reference to the second semiconductor layer in the alignment mark-forming region as a first alignment mark for positioning, while forming, on the semiconductor substrate, a second alignment mark, forming a second exposing region for exposing the first semiconductor layer by using the second alignment mark as a reference for positioning, forming a cavity and forming a buried insulation layer in the cavity, and forming a first grate electrode by using the second alignment mark as a reference for positioning.
    Type: Application
    Filed: March 29, 2006
    Publication date: October 5, 2006
    Applicant: Seiko Epson Corporation
    Inventors: Toshiki Hara, Kei Kanemoto
  • Publication number: 20060115935
    Abstract: There is provided a method of manufacturing a semiconductor device, the method including: forming a ?-aluminum oxide layer on a semiconductor substrate; forming a semiconductor layer on the ?-aluminum oxide layer; forming an exposed portion for exposing a part of the ?-aluminum oxide layer through the semiconductor layer; forming a support which is formed of a material having an etching rate smaller than that of the ?-aluminum oxide layer and which supports the semiconductor layer on the semiconductor substrate; forming a cavity, which the ?-aluminum oxide layer is removed from, between the semiconductor substrate and the semiconductor layer by selectively etching the ?-aluminum oxide layer through the exposed portion; forming a buried insulating layer in the cavity by thermally oxidizing the semiconductor substrate and the semiconductor layer inside the cavity through the exposed portion; forming a gate electrode on the semiconductor layer with a gate insulating layer therebetween; and forming source/drain l
    Type: Application
    Filed: November 14, 2005
    Publication date: June 1, 2006
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Toshiki Hara
  • Publication number: 20060091426
    Abstract: A semiconductor substrate includes a semiconductor base substrate that has an oxide film selectively formed on a part thereof, the oxide film having a non-uniform thickness; and a semiconductor layer that is formed on the oxide film by epitaxial growth so as to have a non-uniform thickness.
    Type: Application
    Filed: October 31, 2005
    Publication date: May 4, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Toshiki Hara
  • Publication number: 20060060921
    Abstract: A semiconductor substrate includes a first semiconductor layer that is formed on a semiconductor base substrate, a second semiconductor layer that is formed on the first semiconductor layer and that has an etching selection ratio smaller than that of the first semiconductor layer, a cavity portion that is formed below the second semiconductor layer by removing a portion of the first semiconductor layer, a thermal oxidation film that is formed on the surface of the second semiconductor layer in the cavity portion, and a buried insulating film that is buried in the cavity portion.
    Type: Application
    Filed: August 26, 2005
    Publication date: March 23, 2006
    Inventors: Teruo Takizawa, Kei Kanemoto, Juri Kato, Toshiki Hara