Patents by Inventor Toshiki Hikosaka

Toshiki Hikosaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230049717
    Abstract: According to one embodiment, a nitride semiconductor includes a base body, and a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), and a second nitride region including Alx2Ga1-x2N (0?x2<1, x2<x1). The first nitride region is between the base body and the second nitride region. The first nitride region includes a first portion and a second portion. The second portion is between the first portion and the second nitride region. An oxygen concentration in the first portion is higher than an oxygen concentration in the second portion. The oxygen concentration in the second portion is not more than 1×1018/cm3. A first thickness of the first portion in a first direction from the first to second nitride regions is thinner than a second thickness of the second portion in the first direction.
    Type: Application
    Filed: February 1, 2022
    Publication date: February 16, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Publication number: 20230046560
    Abstract: According to one embodiment, a nitride semiconductor includes a base body, a nitride member, and an intermediate region provided between the base body and the nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), and a second nitride region including Alx2Ga1-x2N (0?x2<1, x2<x1). The first nitride region is between the intermediate region and the second nitride region. The intermediate region includes nitrogen and carbon. A concentration of carbon in the intermediate region is not less than 1.5×1019/cm3 and not more than 6×1020/cm3.
    Type: Application
    Filed: February 10, 2022
    Publication date: February 16, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Patent number: 11581407
    Abstract: According to one embodiment, a semiconductor device includes a substrate, and a first semiconductor layer including magnesium and Alx1Ga1-x1N. The first semiconductor layer includes first, second, and third regions. The first region is between the substrate and the third region. The second region is between the first and third regions. A first concentration of magnesium in the first region is greater than a third concentration of magnesium in the third region. A second concentration of magnesium in the second region decreases along a first orientation. The first orientation is from the substrate toward the first semiconductor layer. A second change rate of a logarithm of the second concentration with respect to a change of a position along the first orientation is greater than a third change rate of a logarithm of the third concentration with respect to the change of the position along the first orientation.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: February 14, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Jumpei Tajima, Shinya Nunoue
  • Patent number: 11545553
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: January 3, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Hiroshi Ono, Jumpei Tajima, Masahiko Kuraguchi, Shinya Nunoue
  • Patent number: 11538909
    Abstract: According to one embodiment, a semiconductor device includes a first crystal region, a second crystal region, a third crystal region, and a fourth crystal region. The first crystal region includes magnesium and Alx1Ga1-x1N (0?x1<1). The second crystal region includes Alx2Ga1-x2N (0<x2?1). The third crystal region is provided between the first crystal region and the second crystal region. The third crystal region includes oxygen and Alx3Ga1-x3N (0?x3?1 and x3<x2). The fourth crystal region is provided between the third crystal region and the second crystal region. The fourth crystal region includes Alx4Ga1-x4N (0?x4<1 and x4<x2).
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: December 27, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jumpei Tajima, Toshiki Hikosaka, Shinya Nunoue
  • Publication number: 20220367644
    Abstract: A method for manufacturing a semiconductor device is provided, the method including forming an intermediate region including Alx3Ga1-x3N (0<x3?1 and x2<x3) on a first semiconductor layer including Alx1Ga1-x1N (0?x1<1); and forming a second semiconductor layer including Alx2In1-x2N (0<x2<1 and x1<x2) on the intermediate region, a first gas being used to form the intermediate region in the forming of the intermediate region, the first gas including a gas including Al, a gas including ammonia, and a gas including hydrogen, and a second gas being used to form the second semiconductor layer in the forming of the second semiconductor layer, the second gas including a gas including Al, a gas including In, a gas including ammonia, and a gas including nitrogen.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime NAGO, Jumpei TAJIMA, Toshiki HIKOSAKA
  • Patent number: 11469304
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer including Alx1Ga1-x1N (0?x1<1), a second semiconductor layer including Alx2In1-x2N (0<x2<1 and x1<x2), and an intermediate region provided between the first and second semiconductor layers. The intermediate region includes Alx3Ga1-x3N (0<x3?1 and x2<x3). The second semiconductor layer includes first and second surfaces. The second surface is between the intermediate region and the first surface in a first direction. The first direction is from the first semiconductor layer toward the second semiconductor layer. The second semiconductor layer includes a plurality of first pits provided in the first surface. Widths of the first pits are 200 nm or more. A density in the first surface of the first pits is not less than 5×107/cm2 and not more than 1×108/cm2.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: October 11, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime Nago, Jumpei Tajima, Toshiki Hikosaka
  • Patent number: 11444189
    Abstract: According to one embodiment, a semiconductor device includes first, second, and third electrodes, first, second, and third semiconductor layers, and a first insulating member. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. A direction from the first partial region toward the second partial region is along a first direction. The first electrode includes a first electrode portion. A direction from the first electrode portion toward the second electrode is along the first direction. A second direction from the third partial region toward the third electrode crosses the first direction. The second semiconductor layer includes a first semiconductor portion and a second semiconductor portion. At least a portion of the first semiconductor layer is between the third and second semiconductor layers. The first insulating member includes a first insulating portion. The first insulating portion is provided between the third partial region and the third electrode.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: September 13, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jumpei Tajima, Toshiki Hikosaka, Shinya Nunoue
  • Publication number: 20220283199
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member including a first nitride region, a second nitride region, and a third nitride region. The second nitride region is between the first nitride region and the third nitride region in a first direction. A HAADF-STEM (High Angle Annular Dark-Field Scanning Transmission Electron Microscopy) image of the nitride member includes a plurality of bright points and a dark area between the bright points. The dark area is darker than the bright points. A third brightness of the dark area in a third image region corresponding to the third nitride region is lower than a first brightness of the dark area in a first image region corresponding to the first nitride region. A second brightness of the dark area in a second image region corresponding to the second nitride region is lower than the third brightness.
    Type: Application
    Filed: August 12, 2021
    Publication date: September 8, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime NAGO, Jumpei TAJIMA, Toshiki HIKOSAKA
  • Publication number: 20220190119
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), a second nitride region including Alx2Ga1-x2N (0<x2<1, x2<x1), and a third nitride region. The second nitride region is between the first nitride region and the third nitride region. The third nitride region includes Al, Ga, and N. The third nitride region does not include carbon, alternately a third carbon concentration in the third nitride region is lower than a second carbon concentration in the second nitride region.
    Type: Application
    Filed: July 8, 2021
    Publication date: June 16, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Publication number: 20220102512
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Application
    Filed: November 3, 2021
    Publication date: March 31, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hiroshi ONO, Jumpei TAJIMA, Masahiko KURAGUCHI, Shinya NUNOUE
  • Patent number: 11251293
    Abstract: According to one embodiment, a semiconductor device includes first to fourth semiconductor regions, and an insulating part. The third electrode is between the first and second electrodes in a first direction from the first electrode toward the second electrode. The first semiconductor region includes Alx1Ga1-x1N and includes first to fifth partial regions. A second direction from the first partial region toward the first electrode crosses the first direction. The second semiconductor region includes Alx2Ga1-x2N and includes sixth and seventh partial regions. The third semiconductor region includes Alx3Ga1-x3N and includes an eighth partial region between the fifth and seventh partial regions. The fourth semiconductor region includes Alx4Ga1-x4N and includes a first portion between the fifth and eighth partial regions. The fourth semiconductor region includes a first element not included the first to third semiconductor regions. The insulating part includes first to third insulating regions.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: February 15, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Kajiwara, Hiroshi Ono, Jumpei Tajima, Toshiki Hikosaka, Shinya Nunoue, Masahiko Kuraguchi
  • Patent number: 11211463
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: December 28, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Hiroshi Ono, Jumpei Tajima, Masahiko Kuraguchi, Shinya Nunoue
  • Publication number: 20210313432
    Abstract: According to one embodiment, a semiconductor device includes a first crystal region, a second crystal region, a third crystal region, and a fourth crystal region. The first crystal region includes magnesium and Alx1Ga1-x1N (0?x1<1). The second crystal region includes Alx2Ga1-x2N (0<x2?1). The third crystal region is provided between the first crystal region and the second crystal region. The third crystal region includes oxygen and Alx3Ga1-x3N (0?x3?1 and x3<x2). The fourth crystal region is provided between the third crystal region and the second crystal region. The fourth crystal region includes Alx4Ga1-x4N (0?x4<1 and x4<x2).
    Type: Application
    Filed: January 5, 2021
    Publication date: October 7, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jumpei TAJIMA, Toshiki HIKOSAKA, Shinya NUNOUE
  • Publication number: 20210273057
    Abstract: According to one embodiment, a nitride crystal includes first, second, and third nitride crystal regions. The third nitride crystal region includes Al, and is provided between the first and second nitride crystal regions. A third oxygen concentration in the third nitride crystal region is greater than a first oxygen concentration in the first nitride crystal region and greater than a second oxygen concentration in the second nitride crystal region. A third carbon concentration in the third nitride crystal region is greater than a first carbon concentration in the first nitride crystal region and greater than a second carbon concentration in the second nitride crystal region. A <0001> direction of the first nitride crystal region is one of a first orientation from the second nitride crystal region toward the first nitride crystal region or a second orientation from the first nitride crystal region toward the second nitride crystal region.
    Type: Application
    Filed: January 5, 2021
    Publication date: September 2, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, OSAKA UNIVERSITY
    Inventors: Toshiki HIKOSAKA, Shinya NUNOUE, Tomoyuki TANIKAWA, Ryuji KATAYAMA, Masahiro UEMUKAI
  • Publication number: 20210234008
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer including Alx1Ga1-x1N (0?x1<1), a second semiconductor layer including Alx2In1-x2N (0<x2<1 and x1<x2), and an intermediate region provided between the first and second semiconductor layers. The intermediate region includes Alx3Ga1-x3N (0<x3?1 and x2<x3). The second semiconductor layer includes first and second surfaces. The second surface is between the intermediate region and the first surface in a first direction. The first direction is from the first semiconductor layer toward the second semiconductor layer. The second semiconductor layer includes a plurality of first pits provided in the first surface. Widths of the first pits are 200 nm or more. A density in the first surface of the first pits is not less than 5×107/cm2 and not more than 1×108/cm2.
    Type: Application
    Filed: September 8, 2020
    Publication date: July 29, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime NAGO, Jumpei TAJIMA, Toshiki HIKOSAKA
  • Publication number: 20210226016
    Abstract: According to one embodiment, a semiconductor device includes a substrate, and a first semiconductor layer including magnesium and Alx1Ga1-x1N. The first semiconductor layer includes first, second, and third regions. The first region is between the substrate and the third region. The second region is between the first and third regions. A first concentration of magnesium in the first region is greater than a third concentration of magnesium in the third region. A second concentration of magnesium in the second region decreases along a first orientation. The first orientation is from the substrate toward the first semiconductor layer. A second change rate of a logarithm of the second concentration with respect to a change of a position along the first orientation is greater than a third change rate of a logarithm of the third concentration with respect to the change of the position along the first orientation.
    Type: Application
    Filed: September 9, 2020
    Publication date: July 22, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Jumpei TAJIMA, Shinya NUNOUE
  • Publication number: 20210184028
    Abstract: According to one embodiment, a semiconductor device includes first, second, and third electrodes, first, second, and third semiconductor layers, and a first insulating member. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The first electrode includes a first electrode portion. The second semiconductor layer includes first and second semiconductor portions. The third semiconductor layer includes first and second semiconductor regions. The second semiconductor region is electrically connected to the first semiconductor region and the first electrode portion. The first insulating member includes a first insulating portion. The first insulating portion is provided between the third partial region and the third electrode.
    Type: Application
    Filed: September 8, 2020
    Publication date: June 17, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jumpei TAJIMA, Toshiki HIKOSAKA, Shinya NUNOUE
  • Publication number: 20210184026
    Abstract: According to one embodiment, a semiconductor device includes first, second, and third electrodes, first, second, and third semiconductor layers, and a first insulating member. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. A direction from the first partial region toward the second partial region is along a first direction. The first electrode includes a first electrode portion. A direction from the first electrode portion toward the second electrode is along the first direction. A second direction from the third partial region toward the third electrode crosses the first direction. The second semiconductor layer includes a first semiconductor portion and a second semiconductor portion. At least a portion of the first semiconductor layer is between the third and second semiconductor layers. The first insulating member includes a first insulating portion. The first insulating portion is provided between the third partial region and the third electrode.
    Type: Application
    Filed: September 8, 2020
    Publication date: June 17, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jumpei TAJIMA, Toshiki HIKOSAKA, Shinya NUNOUE
  • Patent number: 11024717
    Abstract: In one embodiment, a semiconductor device is provided with a substrate, a first nitride semiconductor layer above the substrate, a second nitride semiconductor layer which is provided on the first nitride semiconductor layer and is in contact with the first nitride semiconductor layer, a source electrode provided between the substrate and the first nitride semiconductor layer and electrically connected to the first nitride semiconductor layer, a drain electrode provided on the second nitride semiconductor layer and electrically connected to the second nitride semiconductor layer, a gate insulating layer provided at least between the substrate and the first nitride semiconductor layer, a gate electrode between the substrate and the gate insulating layer, and a first insulating layer between the substrate and the gate insulating layer to cover the gate electrode and the source electrode.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: June 1, 2021
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jumpei Tajima, Toshiki Hikosaka, Kenjiro Uesugi, Masahiko Kuraguchi, Shinya Nunoue