Abstract: According to one embodiment, a semiconductor device includes first to fourth semiconductor regions, and an insulating part. The third electrode is between the first and second electrodes in a first direction from the first electrode toward the second electrode. The first semiconductor region includes Alx1Ga1-x1N and includes first to fifth partial regions. A second direction from the first partial region toward the first electrode crosses the first direction. The second semiconductor region includes Alx2Ga1-x2N and includes sixth and seventh partial regions. The third semiconductor region includes Alx3Ga1-x3N and includes an eighth partial region between the fifth and seventh partial regions. The fourth semiconductor region includes Alx4Ga1-x4N and includes a first portion between the fifth and eighth partial regions. The fourth semiconductor region includes a first element not included the first to third semiconductor regions. The insulating part includes first to third insulating regions.

Abstract: According to one embodiment, a semiconductor element includes a first nitride semiconductor region, a second nitride semiconductor region, and an intermediate region provided between the first nitride semiconductor region and the second nitride semiconductor region. A Si concentration in the intermediate region is not less than 1×1018/cm3 and not more than 1×1019/cm3. A charge density in the intermediate region is 3×1017/cm3 or less.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to fourth semiconductor regions, a first layer including, and a first insulating layer. The first semiconductor region includes Alx1Ga1-x1N and includes first to fifth partial regions. The third partial region includes a first element including at least one selected from the group consisting of Mg, Zn, and C. The second semiconductor region includes Alx2Ga1-x2N and includes a sixth partial region and a seventh partial region. The third semiconductor region includes Alx3Ga1-x3N and includes an eighth partial region and a ninth partial region. The fourth semiconductor region includes Alx4Ga1-x4N and includes a tenth partial region and an eleventh partial region. The first layer includes AlyGa1-yN and includes a first portion provided between the third partial region and the third electrode. The first insulating layer includes a second portion provided between the first portion and the third electrode.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to fourth semiconductor regions, a first layer including, and a first insulating layer. The first semiconductor region includes Alx1Ga1-x1N and includes first to fifth partial regions. The third partial region includes a first element including at least one selected from the group consisting of Mg, Zn, and C. The second semiconductor region includes Alx2Ga1-x2N and includes a sixth partial region and a seventh partial region. The third semiconductor region includes Alx3Ga1-x3N and includes an eighth partial region and a ninth partial region. The fourth semiconductor region includes Alx4Ga1-x4N and includes a tenth partial region and an eleventh partial region. The first layer includes AlyGa1-yN and includes a first portion provided between the third partial region and the third electrode. The first insulating layer includes a second portion provided between the first portion and the third electrode.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to fifth layers, and an insulating portion. A position of the third electrode is between a position of the first electrode and a position of the second electrode. The first layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions. The second partial region is between the third and fifth partial regions. The second layer includes first and second semiconductor regions. The third layer is provided between the third partial region and the third electrode. The fourth layer is provided between the third partial region and the third layer. The fifth layer includes first and second intermediate regions. The third layer is provided between the first and second intermediate regions. The insulating portion includes a first insulating region provided between the third layer and the third electrode.

Abstract: According to one embodiment, a waveguide element includes a first crystal region, and a second crystal region. The first crystal region extends in a first direction and includes a first nitride semiconductor. The second crystal region extends in the first direction, includes a second nitride semiconductor, and is continuous with the first crystal region. A second direction crosses the first direction. The second direction is from the first crystal region toward the second crystal region. A <0001> direction of the first crystal region is from the first crystal region toward the second crystal region. A <0001> direction of the second crystal region is from the second crystal region toward the first crystal region.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to fifth layers, and an insulating portion. A position of the third electrode is between a position of the first electrode and a position of the second electrode. The first layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions. The second partial region is between the third and fifth partial regions. The second layer includes first and second semiconductor regions. The third layer is provided between the third partial region and the third electrode. The fourth layer is provided between the third partial region and the third layer. The fifth layer includes first and second intermediate regions. The third layer is provided between the first and second intermediate regions. The insulating portion includes a first insulating region provided between the third layer and the third electrode.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, and first to third semiconductor regions. The third electrode is separated from the second electrode in a first direction. The first semiconductor region includes a first partial region separated from the first electrode, a second partial region separated from the second electrode, and a third partial region separated from the third electrode. The second semiconductor region includes a fourth partial region positioned between the first electrode and the first partial region, a fifth partial region positioned between the second electrode and the second partial region, and a sixth partial region positioned between the third electrode and the third partial region. The third semiconductor region includes a seventh partial region positioned between the second electrode and the fifth partial region and an eighth partial region positioned between the third electrode and the sixth partial region.

Abstract: According to one embodiment, a semiconductor element includes a first nitride semiconductor region, a second nitride semiconductor region, and an intermediate region provided between the first nitride semiconductor region and the second nitride semiconductor region. A Si concentration in the intermediate region is not less than 1×1018/cm3 and not more than 1×1019/cm3. A charge density in the intermediate region is 3×1017/cm3 or less.

Abstract: In one embodiment, a nitride semiconductor device is provided with a first semiconductor layer that is a layer of Alx1Ga(1-x1)N (0<x1?1), a second semiconductor layer that is on the first semiconductor layer and is a layer of a nitride semiconductor Iny2Alx2Ga(1-x2-y2)N (0<x2<1, 0<y2<1, 0<x2+y2?1) containing indium, a third semiconductor layer that is on the second semiconductor layer and is a layer of Alx3Ga(1-x3)N (0?x3<1), and a fourth semiconductor layer that is on the third semiconductor layer and is an layer of Iny4Alx4Ga(1-x4-y4)N (0<x4<1, 0?y4<1, 0<x4+y4?1).

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first layer, a second layer, a third layer, and an insulating layer. A position of the third electrode is between a position of the first electrode and a position of the second electrode. The first layer includes at least one of Alx1Ga1-x1N (0<x1<1) or p-type Alz1Ga1-z1N (0?z1<1) and has a first surface, a second surface, and a third surface. The second layer includes Alx2Ga1-x2N (0?x2<1 and x2<x1) and includes a first partial region, a second partial region, and a third partial region. The third layer includes Alx3Ga1-x3N (0<x3<1 and x2<x3) and includes a fourth partial region, a fifth partial region, and a sixth partial region.

Abstract: In one embodiment, a semiconductor device is provided with a substrate, a first nitride semiconductor layer above the substrate, a second nitride semiconductor layer which is provided on the first nitride semiconductor layer and is in contact with the first nitride semiconductor layer, a source electrode provided between the substrate and the first nitride semiconductor layer and electrically connected to the first nitride semiconductor layer, a drain electrode provided on the second nitride semiconductor layer and electrically connected to the second nitride semiconductor layer, a gate insulating layer provided at least between the substrate and the first nitride semiconductor layer, a gate electrode between the substrate and the gate insulating layer, and a first insulating layer between the substrate and the gate insulating layer to cover the gate electrode and the source electrode.

Abstract: According to one embodiment, a semiconductor device includes first, second, and third electrodes, and first, second, third, fourth, and fifth semiconductor regions. The first electrode includes a first conductive region. The second electrode includes a second conductive region separated. The third electrode includes a third conductive region. The first semiconductor region is separated from the first, second, and third conductive regions. The second semiconductor region is provided between the first conductive and semiconductor regions, between the second conductive and first semiconductor regions, and between the third conductive and first semiconductor regions. The third semiconductor region is provided between the first conductive region and the second semiconductor region. The fourth semiconductor region is provided between the second conductive region and the second semiconductor region.

Abstract: In one embodiment, a nitride semiconductor device is provided with a first semiconductor layer that is a layer of Alx1Ga(1-x1)N (0<x1?1), a second semiconductor layer that is on the first semiconductor layer and is a layer of a nitride semiconductor Iny2Alx2Ga(1-x2-y2)N (0<x2<1, 0<y2<1, 0<x2+y2?1) containing indium, a third semiconductor layer that is on the second semiconductor layer and is a layer of Alx3Ga(1-x3)N (0?x3<1), and a fourth semiconductor layer that is on the third semiconductor layer and is an layer of Iny4Alx4Ga(1-x4-y4)N (0<x4<1, 0?y4<1, 0<x4+y4?1).

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first layer, a second layer, a third layer, and an insulating layer. A position of the third electrode is between a position of the first electrode and a position of the second electrode. The first layer includes at least one of Alx1Ga1-x1N (0<x1<1) or p-type Alz1Ga1-z1N (0?z1<1) and has a first surface, a second surface, and a third surface. The second layer includes Alx2Ga1-x2N (0?x2<1 and x2<x1) and includes a first partial region, a second partial region, and a third partial region. The third layer includes Alx3Ga1-x3N (0<x3<1 and x2<x3) and includes a fourth partial region, a fifth partial region, and a sixth partial region.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first layer, a second layer, a third layer, and an insulating layer. A position of the third electrode is between a position of the first electrode and a position of the second electrode. The first layer includes at least one of Alx1Ga1-x1N (0<x1<1) or p-type Alz1Ga1-z1N (0?z1<1) and has a first surface, a second surface, and a third surface. The second layer includes Alx2Ga1-x2N (0?x2<1 and x2<x1) and includes a first partial region, a second partial region, and a third partial region. The third layer includes Alx3Ga1-x3N (0<x3<1 and x2<x3) and includes a fourth partial region, a fifth partial region, and a sixth partial region.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first layer, a second layer, a third layer, and an insulating layer. A position of the third electrode is between a position of the first electrode and a position of the second electrode. The first layer includes at least one of Alx1Ga1-x1N (0<x1<1) or p-type Alz1Ga1-z1N (0?z1<1) and has a first surface, a second surface, and a third surface. The second layer includes Alx2Ga1-x2N (0?x2<1 and x2<x1) and includes a first partial region, a second partial region, and a third partial region. The third layer includes Alx3Ga1-x3N (0<x3<1 and x2<x3) and includes a fourth partial region, a fifth partial region, and a sixth partial region.

Abstract: According to one embodiment, a semiconductor substrate includes a first semiconductor layer including Alx1Ga1-x1N (0<x1?1) and including carbon and oxygen, and a second semiconductor layer including Alx2Ga1-x2N (0<x2<x1) and including carbon and oxygen. A second ratio of a carbon concentration of the second semiconductor layer to an oxygen concentration of the second semiconductor layer is 730 or more.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, and first to third semiconductor regions. The third electrode is separated from the second electrode in a first direction. The first semiconductor region includes a first partial region separated from the first electrode, a second partial region separated from the second electrode, and a third partial region separated from the third electrode. The second semiconductor region includes a fourth partial region positioned between the first electrode and the first partial region, a fifth partial region positioned between the second electrode and the second partial region, and a sixth partial region positioned between the third electrode and the third partial region. The third semiconductor region includes a seventh partial region positioned between the second electrode and the fifth partial region and an eighth partial region positioned between the third electrode and the sixth partial region.