Patents by Inventor Toshinari Takayanagi

Toshinari Takayanagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5210236
    Abstract: A differential amplifier has a pair of inputs and a pair of outputs. Each of the outputs is connected between a high potential source and a low potential source through a pair of FETs, respectively. These FETs have the same conduction type. A gate of one of the FETs is connected to one of the inputs, and a gate of the other FET is connected to the other input. This arrangement suppresses output offset and realizes a wide sensitivity range.
    Type: Grant
    Filed: September 20, 1991
    Date of Patent: May 11, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshinari Takayanagi
  • Patent number: 5136545
    Abstract: A semiconductor memory device includes a sense amplifier circuit which includes a load circuit. The impedance of the load circuit is adjustable by a bias voltage. The bias voltage is generated by a bias circuit which also controls a bit line initial potential.
    Type: Grant
    Filed: November 29, 1990
    Date of Patent: August 4, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshinari Takayanagi