Patents by Inventor Toshio Fujii
Toshio Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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FLIP CHIP MOUNTING BODY AND METHOD FOR MOUNTING SUCH FLIP CHIP MOUNTING BODY AND BUMP FORMING METHOD
Publication number: 20090203169Abstract: In a flip chip mounted body in which a semiconductor chip (20) having a plurality of electrode terminals (21) is disposed so as to be opposed to a wiring board (10) having a plurality of connection terminals (11), with the connection terminals (11) and the electrode terminals (21) being connected electrically, a resin (13) containing electrically conductive particles (12) is supplied between the connection terminals (11) and the electrode terminals (21), the electrically conductive particles (12) and the resin (13) are heated and melted, and vibrations are applied so as to make them flow. The molten electrically conductive particles (12) are allowed to self-assemble between the connection terminals (11) and the electrode terminals (21), thereby forming connectors (22) that connect them electrically.Type: ApplicationFiled: February 2, 2006Publication date: August 13, 2009Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihiro Tomita, Koichi Hirano, Seiji Karashima, Takashi Ichiryu, Toshio Fujii -
Patent number: 7553956Abstract: An object of the present invention is to provide probes and primers for detecting beer-spoilage lactic acid bacteria with accuracy. The probes and primers for detecting beer-spoilage lactic acid bacteria according to the present invention each comprises a nucleotide sequence consisting of at least 15 nucleotides that hybridizes with the nucleotide sequence of SEQ ID NO: 1 or the complementary sequence thereof.Type: GrantFiled: May 23, 2002Date of Patent: June 30, 2009Assignee: Kirin Beer Kabushiki KaishaInventor: Toshio Fujii
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Patent number: 7531754Abstract: A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.Type: GrantFiled: March 2, 2007Date of Patent: May 12, 2009Assignee: Panasonic CorporationInventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
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Publication number: 20090108436Abstract: In a semiconductor package, a semiconductor chip is adhered with an adhesive member, with a circuit face of the semiconductor chip facing upward, onto a circuit board including a plurality of interconnections, a plurality of through holes, wire bonding pads and a solder resist for protecting the interconnections and the through holes. A plurality of electrodes of the semiconductor chip are electrically connected to the plural wire bonding pads of the circuit board through wires. A concave is formed in the solder resist of the circuit board correspondingly to every through hole of the circuit board, and concaves present in a region opposing a rim portion of the semiconductor chip and a region surrounding the semiconductor chip are buried with a resin so as to attain a flat top face.Type: ApplicationFiled: April 9, 2008Publication date: April 30, 2009Inventors: Toshio Fujii, Masashi Funakoshi, Satoru Atsuta
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Patent number: 7473922Abstract: At least one or more dark current reducing layers having a quantum well structure are provided at an end portion in a stacking direction of an infrared detecting section in which quantum dot layers are stacked.Type: GrantFiled: June 6, 2006Date of Patent: January 6, 2009Assignee: Fujitsu LimitedInventors: Yasuhito Uchiyama, Toshio Fujii, Nobuyuki Kajihara, Hironori Nishino, Yusuke Matsukura
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Publication number: 20080210458Abstract: A flexible substrate comprises: (i) a film; (ii) an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; (iii) a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and (iv) a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.Type: ApplicationFiled: October 29, 2007Publication date: September 4, 2008Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
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Publication number: 20080165518Abstract: A flip chip mounting process or a bump-forming process according to the present invention is characterized in that electrically-conductive particles are fixed on electrodes formed on an electronic component. A composition comprising solder powder, a convection additive and a resin component is supplied onto a surface of the electronic component, the surface is provided with the electrodes. The supplied composition is heated up to a temperature enabling the solder powder to melt. As a result, the convection additive boils or is decomposed so as to generate a gas. The generated gas produces a convection phenomenon within the supplied composition. Since the convection phenomenon promotes the movement of the solder powder, the solder powder can move freely within the composition. The electrically-conductive particles serve as nuclei for the solder powder to self-assemble and grow.Type: ApplicationFiled: March 13, 2006Publication date: July 10, 2008Inventors: Takashi Ichiryu, Seiichi Nakatani, Seiji Karashima, Yoshihiro Tomita, Koichi Hirano, Toshio Fujii
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Patent number: 7385048Abstract: The present invention relates to improved promoters and utilization thereof, in particular to promoters which are improved so as not to undergo methylation in the course of constructing transformants, and utilization thereof. According to the present invention, the expression efficiency of a structural gene can be enhanced even in a plant, e.g. chrysanthemum, which has weak expression of the structural gene by a cauliflower mosaic virus 35S promoter which as been considered a high expression promoter for plants.Type: GrantFiled: August 9, 2006Date of Patent: June 10, 2008Assignee: Kirin Beer Kabushiki KaishaInventors: Toshio Fujii, Toshiya Ogawa, Masaharu Yoshioka, Kanji Mamiya, Toshihiro Toguri
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Patent number: 7321496Abstract: A flexible substrate comprises: a film; an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.Type: GrantFiled: March 15, 2005Date of Patent: January 22, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
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Patent number: 7248482Abstract: A module with a built-in circuit component of the present invention includes an electric insulating layer, a pair of wiring layers provided on both principal planes of the electric insulating layer, a plurality of via conductors electrically connecting the pair of wiring layers and passing through the electric insulating layer in a thickness direction thereof, and a circuit component buried in the electric insulating layer, wherein the plurality of via conductors are disposed in a circumferential portion of the electric insulating layer in accordance with a predetermined rule. The plurality of via conductors are placed at an interval, for example, so as to form at least one straight line, in a cut surface of the electric insulating layer in a direction parallel to a principal plane thereof.Type: GrantFiled: May 12, 2004Date of Patent: July 24, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshiyuki Asahi, Yutaka Taguchi, Yasuhiro Sugaya, Seiichi Nakatani, Toshio Fujii
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Publication number: 20070158838Abstract: A circuit board for flip-chip packaging is provided which can achieve the connection reliability of a semiconductor device and the circuit board. The circuit board for flip-chip packaging includes, on a surface of a substrate (6), wiring patterns (1), connection pads (2) for flip-chip packaging, and a solder resist (3) having openings (4) formed on the connection pads (2). In the circuit board, conductive members (5) are formed in the openings (4).Type: ApplicationFiled: January 5, 2007Publication date: July 12, 2007Applicant: Matsushita Electric Industrial Co., Ltd.Inventor: Toshio Fujii
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Publication number: 20070151756Abstract: A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.Type: ApplicationFiled: March 2, 2007Publication date: July 5, 2007Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
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Publication number: 20070131923Abstract: At least one or more dark current reducing layers having a quantum well structure are provided at an end portion in a stacking direction of an infrared detecting section in which quantum dot layers are stacked.Type: ApplicationFiled: June 6, 2006Publication date: June 14, 2007Applicant: FUJITSU LIMITEDInventors: Yasuhito Uchiyama, Toshio Fujii, Nobuyuki Kajihara, Hironori Nishino, Yusuke Matsukura
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Patent number: 7205483Abstract: A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.Type: GrantFiled: March 15, 2005Date of Patent: April 17, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
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Publication number: 20060277623Abstract: The present invention relates to improved promoters and utilization thereof, in particular to promoters which are improved so as not to undergo methylation in the course of constructing transformants, and utilization thereof. The improved promoters of the present invention are represented by the following (1) and (2): (1) a DNA comprising the nucleotide sequences shown in SEQ ID NOS: 1 to 4; (2) a DNA comprising a nucleotide sequence consisting of the nucleotide sequences shown in SEQ ID NOS 1 to 4, wherein one to several nucleotides are deleted, added or inserted and the deleted, added or inserted sequence is free from any consecutive sequences represented by CG, CAG, CTG, CCG or CGG; the DNA having promoter activity. According to the present invention, the expression efficiency of a structural gene can be enhanced even in a plant, e.g. chrysanthemum, which has weak expression of the structural gene by a cauliflower mosaic virus 35S promoter which has been considered a high expression promoter for plants.Type: ApplicationFiled: August 9, 2006Publication date: December 7, 2006Inventors: Toshio Fujii, Toshiya Ogawa, Masaharu Yoshioka, Kanji Mamiya, Toshihiro Toguri
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Patent number: 7115420Abstract: The present invention relates to improved promoters and utilization thereof, in particular to promoters which are improved so as not to undergo methylation in the course of constructing transformants, and utilization thereof. According to the present invention, the expression efficiency of a structural gene can be enhanced even in a plant, e.g. chrysanthemum, which has weak expression of the structural gene by a cauliflower mosaic virus 35S promoter which as been considered a high expression promoter for plants.Type: GrantFiled: February 23, 2001Date of Patent: October 3, 2006Assignee: Kirin Beer Kabushiki KaishaInventors: Toshio Fujii, Toshiya Ogawa, Masaharu Yoshioka, Kanji Mamiya, Toshihiro Toguri
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Patent number: 7042541Abstract: A liquid crystal display apparatus is produced by the steps of arranging pixel electrodes, TFT devices and signal wiring on one surface of one substrate, arranging a transparent layer on a portion of one surface of a transparent substrate which portion is to be a display portion, bonding the one substrate and the transparent substrate to each other while the one surface having the pixel electrodes formed thereon faces the one surface having the transparent layer formed thereon, and injecting a liquid crystal between the substrates to form a liquid crystal layer. A fluidization path of the liquid crystal can be secured in a non-display portion, too, in which the TFT devices and the signal wiring are disposed when the liquid crystal is injected. Therefore, it is possible to shorten the injection time by increasing the liquid crystal injection speed and to improve productivity.Type: GrantFiled: September 23, 2003Date of Patent: May 9, 2006Assignee: Sharp Kabushiki KaishaInventors: Toshio Fujii, Naofumi Kondo
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Publication number: 20060088513Abstract: The object of the present invention is to provide an antiallergic composition useful to prevention/treatment of allergy, its preparation method, and its use as foods or drinks or the like. As for means for solving the object, it is to provide an antiallergic composition comprising as active ingredients the lactic acid bacteria showing equal interleukin 12 production level compared to when Lactobacillus paracasei KW 3110 strain is used as the lactic acid bacteria to be tested, or showing 60% or more of interleukin 12 production level compared to when Lactobacillus paracasei KW 3110 strain is used, and showing less than 50% of interleukin 4 production level of a control wherein the lactic acid bacteria are not added, in case lymphocytes derived from mouse spleen sensitized with ovalbumin are suspended in a medium containing ovalbumin, and cultured by adding the lactic acid bacteria to be tested.Type: ApplicationFiled: February 27, 2004Publication date: April 27, 2006Inventors: Sayo Inoue, Toshio Fujii, Daisuke Fujiwara, Akira Saiki, Minoru Takahashi, Koichiro Yamauchi, Masami Gotou, Satoshi Nishida, Keiji Deuchi, Hideyuki Wakabayashi, Toshihiro Komeda
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Publication number: 20050205291Abstract: A process for producing a flexible substrate comprising of a film, an insulating resin layer, and a wiring pattern, said process comprising the steps of: (a) preparing a sheet member comprising, (i) the film, (ii) the insulating resin layer formed on each of a front face of said film and a rear face of said film which face is opposite to said front face, and (iii) a front-sided wiring pattern embedded in said insulating resin layer formed on said front face of said film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on said rear face of said film; and (b) pressing a part of at least one of said front-sided wiring pattern and said rear-sided wiring pattern into the inside of said sheet member so that a part of said front-sided wiring pattern and a part of said rear-sided wiring pattern are jointed to each other to form a junction.Type: ApplicationFiled: March 15, 2005Publication date: September 22, 2005Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
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Publication number: 20050205294Abstract: A flexible substrate comprising: (i) a film; (ii) an insulating resin layer formed on each of a front face of said film and a rear face of said film which face is opposite to said front face; (iii) a front-sided wiring pattern embedded in the insulating resin layer formed on said front face of said film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on said rear face of said film; and (iv) a via which is located between a front-sided wiring pattern and a rear-sided wiring pattern and serves to electrically connect between said front-sided wiring pattern and said rear-sided wiring pattern; wherein said insulating resin layer formed on each of said front face and said rear face of the said film is thicker than said film.Type: ApplicationFiled: March 15, 2005Publication date: September 22, 2005Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe