Abstract: A switched capacitor filter for applying a filter processing including an integration processing to input analog signals of plural channels on a time shared basis includes an integration sections for sequentially implementing the integration processing for the respective channels on a time shared basis, integrated value storage sections for storing integrated value signals representing results of the integration processing for the respective channels, switches for causing, each time the integration processing for the respective channels is interrupted, an integrated value signal representing result of the integration processing for the particular channel at the time of interruption to be stored in the integrated value storage sections and initializing the result of the integration processing by the integration section and, each time the integration processing for the respective channels is implemented, supplying the integrated value signal for the particular channel from the integrated value storage sections

Abstract: An analog/digital converter where input analog signals are successively converted into digital signals under a time sharing control system; the analog/digital converter includes an integrating portion, a plurality of integrated calculus memory portions, a signal digitalizing portion, a feedback analog signal generating portion, and a switching portion. According to the disclosed analog/digital converter, input analog signals for a plurality of channels or input analog signals for highly-ordered integrating processes can be converted into digital signals without making the size of the circuit large.

Abstract: A delta-sigma A/D converter has a delta-sigma modulator that converts an analog signal input thereto into a 1-bit digital bit stream by a delta-sigma modulation wherein the difference between the analog signal and a feedback reference voltage is integrated and quantized, the feedback reference voltage being set to a value greater than a specified maximum level of the analog signal. A data converter is connected to an output of the delta-sigma modulator and converts the 1-bit digital bit stream from the delta-sigma modulator into a multi-bit digital bit stream, using a predetermined conversion value. A decimation filter is connected to an output of the data converter and extracts low frequency components corresponding to the analog signal, contained in the multi-bit digital bit stream from the data converter and outputs multi-bit digital data representative of the analog signal.

Abstract: A low insertion pressure connector including a first connector housing having driven protrusions, a second connector housing having guide grooves formed in the connector fitting direction corresponding to the driven protrusions respectively, and slide member insertion holes formed in the direction perpendicular to the connector fitting direction, a slide member having slide plates capable of being inserted into the slide member insertion holes respectively, and cam holes formed in the slide plates respectively so that each of which has first and second inclined portions to be bent into an approximate L shape. Stepped portions may be formed in the slide plates respectively, and supporting protrusions may be formed in the second connector housing so as to be capable of getting over the stepped portions to thereby support the slide plates in inclined states respectively. Inclined guide portions may be formed in the driven protrusions corresponding to inner turning points of -the cam holes respectively.

Abstract: An analog-digital converter comprises a .DELTA. .SIGMA. modulator, a digital filter, a high-pass filter and a multiplier which are connected in series. Analog input is converted into serial-bit strings by the .DELTA. .SIGMA. modulator, for which gain `1/A` is set. The digital filter extracts low-frequency components, corresponding to the analog input, from the serial-bit strings, so the low-frequency components are converted into parallel-bit digital data. The high-pass filter removes DC offset component from output of the digital filter; and then, output thereof is multiplied by scaling gain `A` by the multiplier so that digital output is produced. The .DELTA. .SIGMA. modulator comprises at least three switched-capacitor integrators and a one-bit quantizer, which are connected in series, as well as a one-sample delay circuit. One-bit output, produced by the one-bit quantizer, is delayed by the one-sample delay circuit, whose output is delivered to each switched-capacitor integrator.

Abstract: An automatic gain control circuit is provided, which has minimum variations in the output signal level even with the presence of variations in component parts thereof and the temperature dependency of component parts thereof and can therefore dispense with the use of an additional amplifier circuit for adjusting the output level. An input signal-attenuating circuit attenuates the level of an input signal to a voltage amplifier circuit. An output level-detecting circuit detects the voltage level of an output signal from the voltage amplifier circuit to thereby carry out feedback control by controlling the attenuating characteristic of the input signal-attenuating circuit in response to the detected voltage of the output signal such that the voltage level of the output signal from the voltage amplifier circuit is maintained at a constant level.

Abstract: A D/A converter is formed of a combination of switches and capacitors. A voltage source supplies a plurality of different predetermined voltages corresponding, respectively, to different logical levels of bit data of input digital data. A first switch device is connected to the voltage source for selecting the different predetermined voltages. A first capacitor is connected to the voltage source by way of the first switch device, and charged by the different voltages selected by the first switch device. A second capacitor is connected to the first capacitor by way of a second switch device, for carrying out distribution of charge between the first and second capacitors. A charge-to-voltage converter circuit is associated with the second capacitor, for converting charge from the second capacitor to voltage. A clock signal generator circuit generates clock signals for selectively driving the first and second switch devices, in synchronism with the bit data of the input digital data.