Patents by Inventor Toshio Ueda

Toshio Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6496194
    Abstract: A halftone display method utilizes an activation sequence, having a plurality of luminance blocks predefined in each frame or field to display an image and having redundancy, that enables one gray-scale level to be expressed by any one of a plurality of combinations of subframes (luminance blocks). When determining luminance blocks for use to display gray scale of an arbitrary first pixel, the luminance blocks to be used for the first pixel are selected in accordance with a predetermined rule, based on how the luminance blocks are used for a second pixel located in close proximity to the first pixel. In this way, by actively utilizing the redundancy of the activation sequence, the occurrence of moving-image false contours (false color contours) in video can be minimized, and also a motion compensation equalizing pulse method can be effectively applied to further improve the image display quality.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: December 17, 2002
    Assignees: Fujitsu Limited
    Inventors: Shigeo Mikoshiba, Tomokazu Shiga, Yiwen Zhu, Kiyoshi Igarashi, Kosaku Toda, Toshio Ueda, Kyoji Kariya, Takayuki Ooe, Kazuki Sawa
  • Publication number: 20020154073
    Abstract: A display apparatus, that can prevent thermal destruction and burning with a simple structure, has been disclosed. In the apparatus it is judged that there is possibility of a pattern, whose area with high brightness is small, being displayed frequently, when a state in which the total light emission pulse number remains large occurs with high frequency, and if such a state is detected, the total light emission pulse number (sustain frequency) is reduced to prevent the thermal destruction and burning.
    Type: Application
    Filed: August 15, 2001
    Publication date: October 24, 2002
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Ayahito Kojima, Shigeki Kameyama, Hirohito Kuriyama, Yoshikazu Kanazawa, Toshio Ueda
  • Publication number: 20020130826
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of subfields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 throuh SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Application
    Filed: March 13, 2002
    Publication date: September 19, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda
  • Patent number: 6417835
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: July 9, 2002
    Assignee: Fujitsu Limited
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda
  • Publication number: 20020063729
    Abstract: A method of driving a display device assumes a specific pixel on a retina that is formed on the retina based on an input image, and controls light emission of each subframe such that luminance of a specific pixel on the retina becomes substantially equal to luminance of a pixel corresponding to the input image. The display device is driven by constructing one frame with a plurality of subframes, for displaying the input image that moves on a display panel.
    Type: Application
    Filed: August 16, 2001
    Publication date: May 30, 2002
    Inventors: Takayuki Ooe, Toshio Ueda, Kosaku Toda, Kyoji Kariya, Shigeo Mikoshiba, Tomokazu Shiga, Makiko Yamada
  • Publication number: 20020053268
    Abstract: A machine tool which can avoid interference between a tool post body and a second headstock without increasing the size of a fixed bed or decreasing the structural support rigidity is disclosed. Specifically, a combined-machining lathe comprises a first headstock fixed on a fixed bed; at least one of a tailstock and a second headstock is movably disposed on the fixed bed so as to be movable along the fixed bed; and a tool post body for rotationally supporting a turret having a plurality of tools set thereon. The tool post body is movably disposed between the first headstock and the at least one of a tailstock and a second headstock. The turret is placed on one side of the tool post body that is closer to the at least one of a tailstock and a second headstock, and the first headstock has a recessed portion that is dimensioned to accommodate the tool post body therein.
    Type: Application
    Filed: August 15, 2001
    Publication date: May 9, 2002
    Inventors: Toshio Ueda, Tsutomu Tokuma
  • Patent number: 6373452
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Grant
    Filed: July 31, 1996
    Date of Patent: April 16, 2002
    Assignee: Fujiitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Publication number: 20020021265
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Application
    Filed: September 28, 2001
    Publication date: February 21, 2002
    Applicant: Fujitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Publication number: 20020017888
    Abstract: A C-axis driving system for machine tools is disclosed that comprises a worm wheel mounted on a spindle that is rotatably supported by a headstock. The C-axis driving system also includes a worm shaft with a worm formed therein directed perpendicular to an axis of the spindle and placed so as to be pivotable about a pivotal shaft between an engagement position, and a disengagement position. The C-axis driving system also includes a C-axis driving motor connected to the worm shaft and serving to rotationally index the spindle to a specified rotational angle. The pivotal shaft is provided on the worm shaft base so as to be directed perpendicular to an axis of the worm shaft. Thus, the C-axis driving system for machine tools is capable of reducing the size of the C-axis unit as well as the cost while allowing a smooth engagement with the worm wheel.
    Type: Application
    Filed: May 29, 2001
    Publication date: February 14, 2002
    Inventors: Toshio Ueda, Yoshitane Uemura, Nobuaki Sasabe
  • Publication number: 20020012073
    Abstract: The color reproduction correction circuit which corrects the color distortion caused when color signals using the first combination of the three primary colors are reproduced in a color display of the second combination of the different primary color sources has been disclosed, wherein: a provided color correction circuit generates the mixed color signal by multiplying the color signal in question by the specified coefficients and adding the mixed color signal to other color signals; the mixed colors in the second combination are used as primary color light sources in the second combination; the specified coefficients are determined so that these mixed color light sources are made close to the coordinates of the primary color light sources of the first combination; and the luminescent chromaticity values of the three primary colors are corrected so that the chromaticity values of the device match those specified by the signal system.
    Type: Application
    Filed: June 12, 2001
    Publication date: January 31, 2002
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Ken Kumakura, Kazuyoshi Yamada, Hideaki Ohki, Hiroshi Ohtaka, Toshio Ueda
  • Publication number: 20010045923
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Application
    Filed: April 12, 2000
    Publication date: November 29, 2001
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda
  • Patent number: 6288714
    Abstract: A PDP not posing the problem that previous display data appears at the time of activation, and a wave generating circuit capable of generating a complex wave without the necessity of expanding a quantity of ROM data and of increasing a reading speed have been disclosed. A plasma display panel display comprising a plasma display panel that includes a plurality of cells to be selectively discharged to glow, a reset unit for bringing the plurality of cells to a given state, an addressing unit for setting the plurality of cells to states associated with display data, and a sustaining discharge unit for enabling the plurality of cells to glow according to the set states further comprises an operation halt factor detector for detecting the fact that a factor of halting the operation of the plasma display panel has occurred, and an initialization unit that when it is detected that the operation halt factor has occurred, initializes memory information in the plasma display panel.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: September 11, 2001
    Assignee: Fujitsu Limited
    Inventors: Akira Yamamoto, Masaya Tajima, Toshio Ueda, Hirohito Kuriyama, Katsuhiro Ishida
  • Patent number: 6259511
    Abstract: A scanning type exposure apparatus includes a mask stage which can move a mask along a predetermined scanning direction; a substrate stage which can move a substrate, onto which a pattern on the mask is to be transferred, along the scanning direction; a fine movement stage which is arranged on one of the mask stage and the substrate stage, and is movable along the scanning direction relative to the one stage; a first measuring device for detecting the position, along the scanning direction, of the fine movement stage; a second measuring device for detecting the position, along the scanning direction, of the other one of the mask stage and the substrate stage; a speed controller for controlling the ratio between the speeds of the mask stage and the substrate stage to a predetermined value while the pattern on the mask is scanning-exposed on the substrate; and a control device for controlling the position of the fine movement stage in accordance with the difference between the position measured by the first mea
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: July 10, 2001
    Assignee: Nikon Corporation
    Inventors: Susumu Makinouchi, Toshio Ueda
  • Publication number: 20010005202
    Abstract: A PDP not posing the problem that previous display data appears at the time of activation, and a wave generating circuit capable of generating a complex wave without the necessity of expanding a quantity of ROM data and of increasing a reading speed have been disclosed. A plasma display panel display comprising a plasma display panel that includes a plurality of cells to be selectively discharged to glow, a reset unit for bringing the plurality of cells to a given state, an addressing unit for setting the plurality of cells to states associated with display data, and a sustaining discharge unit for enabling the plurality of cells to glow according to the set states further comprises an operation halt factor detector for detecting the fact that a factor of halting the operation of the plasma display panel has occurred, and an initialization unit that when it is detected that the operation halt factor has occurred, initializes memory information in the plasma display panel.
    Type: Application
    Filed: February 17, 1999
    Publication date: June 28, 2001
    Inventors: SHIGETOSHI TOMIO, YOSHIKAZU KANAZAWA, TOMOKATSU KISHI, TETSUYA SAKAMOTO, AKIRA YAMAMOTO, MASAYA TAJIMA, TOSHIO UEDA, HIROHITO KURIYAMA, KATSUHIRO ISHIDA
  • Patent number: 6249265
    Abstract: An intraframe time-division multiplexing type display device prevents prominent image defects, such as flicker, and affords a high-quality image display. A single frame of an image is displayed while changing a gray-scale level thereof by means of a number of sub-frames, each sub-frame comprising at least an address period and a sustained discharge period; further, the sub-frames have respective, mutually different sustained discharge periods. A gray-scale level adjustment unit arbitrarily sets the selection sequence of each of the number of sub-frames within an individual frame that is to be in a sustained discharge state.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: June 19, 2001
    Assignee: Fujitsu Limited
    Inventors: Masaya Tajima, Toshio Ueda, Katsuhiro Ishida, Naoki Matsui, Kyoji Kariya, Akira Yamamoto, Hirohito Kuriyama
  • Patent number: 6222512
    Abstract: An intraframe time-division multiplexing type display device prevents prominent image defects, such as flicker, and affords a high-quality image display. A single frame of an image is displayed while changing a gray-scale level thereof by means of a number of sub-frames, each sub-frame comprising at least an address period and a sustained discharge period; further, the sub-frames have respective, mutually different sustained discharge periods. A gray-scale level adjustment unit arbitrarily sets the selection sequence of each of the number of sub-frames within an individual frame that is to be in a sustained discharge state.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: April 24, 2001
    Assignee: Fujitsu Limited
    Inventors: Masaya Tajima, Toshio Ueda, Katsuhiro Ishida, Naoki Matsui, Kyoji Kariya, Akira Yamamoto, Hirohito Kuriyama
  • Patent number: 6191844
    Abstract: When the scanning of a mask stage and a substrate stage is started, an interferometer measures the position of the substrate stage, while an interferometer unit differentiates the output of the interferometer to give a speed signal on the substrate stage, and delivers this speed signal. A main control unit produces a target value for the amount of exposure light adapted to this speed signal. A light amount adjustment system adjusts the amount of exposure light from an exposure light source in response to the target value calculated by the main control unit. Thus, exposure with appropriate amount of light adapted to the speed of the substrate stage is performed over all of the time zones from the start of drive of the substrate stage in the scan direction until its standstill. Hence, the exposure time can be shortened, and the throughput can be increased, in comparison with exposure being performed only in the constant speed zone of the stage.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: February 20, 2001
    Assignee: Nikon Corporation
    Inventor: Toshio Ueda
  • Patent number: 6169527
    Abstract: A plasma display panel displaying interlaced images is provided with shades blocking a part of the light emitted by respective outermost display lines, suppressing flicker caused by the part of the light emitted thereby and improving display quality.
    Type: Grant
    Filed: August 7, 1997
    Date of Patent: January 2, 2001
    Assignee: Fujitsu Limited
    Inventors: Yoshikazu Kanazawa, Toshio Ueda
  • Patent number: 6166812
    Abstract: A stage apparatus of the present invention includes a plurality of interferometers 14H, 14J, 14R for measuring the displacements of a fine adjustment stage 11 at respective measuring sites, a plurality of actuators 29h, 29j, 29r for independently moving the stage 11, and a mathematical operational conversion unit 43. Deviations .DELTA.H, .DELTA.J and .DELTA.R are derived by a subtracting displacements H, J, R of the stage 11 actually measured by the interferometers from the target displacements HT, JT, RT of the stage 11, and supplied to the mathematical operational conversion unit 43, where the target driven increments .DELTA.h, .DELTA.j, .DELTA.r are derived by a calculation using a predetermined mathematical model (this model is an inverse matrix T.sup.-1, which is the inverse of the matrix T describing the operation for deriving the displacements measured by the interferometers from the displacement produced by the actuators).
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: December 26, 2000
    Assignee: Nikon Corporation
    Inventor: Toshio Ueda
  • Patent number: 6144364
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Grant
    Filed: October 23, 1996
    Date of Patent: November 7, 2000
    Assignee: Fujitsu Limited
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda