Abstract: Provided is a virtual machine including a first virtualization module operating on a physical CPU, for providing a first CPU, and a second virtualization module operating on the first CPU, for providing second CPU. The second virtualization module includes first processor control information holding a state of the first CPU obtained at a time of execution of the user program. The first virtualization module includes second processor control information containing a state of the physical CPU obtained at the time of the execution of the second virtualization module, third processor control information containing a state of the physical CPU obtained at the time of the execution of the user program, and prefetch entry information in which information to be prefetched from the third processor control information is set, and, upon detection of a event, the information set in the prefetch entry information is reflected to the first processor control information.

Abstract: There is a need for providing the Xeon CPU with a two-level VM that is independent of VMM types and prevents the throughput from degrading when the OS operates the privilege register. A machine is provided with a processor and memory. The machine includes a first virtual machine manager for managing a virtual machine, a second virtual machine for managing an operating system, first management information, and second management information. The processor is provided with a register and a shadowing function. The machine uses a virtualization method. The first virtual machine manager detects a call from the second virtual machine manager. The first virtual machine manager enables the shadowing function when it is determined that an instruction for enabling the shadowing function caused the call.

Abstract: In a memory inspection in a computer installing a x86 CPU, system software related to low-frequent processing is prevented from going down, and the suppression of performance degradation and the avoidance of a reduction in memory capacity by the memory inspection is realized. The computer having a processor, a memory, and an I/O device. The memory stores a system software realizing a system control unit, and an inspection program realizing an inspection unit. The processor has a memory fault notifying unit notifying the system control unit of a fault address. The system control unit includes an adjustment unit that determines whether the inspection program needs to be executed, or not, based on the type of event occurring, plural event processing units processing the event by using different storage areas of the memory, a fault recording unit recording the memory fault, and an event processing unit selector.

Abstract: A next-generation OS with a virtualization feature is executed as a user program on a first virtual processor by selecting, in response to a cause of a call for a host VMM, one of a guest status area (221) for executing a user program on a second virtual processor and a host status area (222) for executing the guest VMM, and by updating a guest status area (131) of a shadow VMCS for controlling a physical processor. Accordingly, without a decrease in performance of a virtual computer, the next-generation OS incorporating the virtualization feature is executed on a virtual server, and the next-generation OS and an existing OS are integrated on a single physical computer.

Abstract: A computer, having: a first OS to which a first processor core group is allocated; and a virtualization module to which a second processor core group is allocated, wherein a virtualization module registers interrupt handler processing for resetting the second processor core group, wherein a first OS has: a monitoring module for monitoring the virtualization module; and an interrupt control module for obtaining identifiers of the second processor core group at a time of booting of the virtualization module, and, when the monitoring module determines to reboot the virtualization module, issuing resetting interrupt to the processor cores of the second processor core group that are associated with the kept identifiers, wherein the second processor core group receives the resetting interrupt and executes the interrupt handler processing to reset its own processor cores, wherein the interrupt control module issues startup interrupt to the second processor core group.

Abstract: A next-generation OS with a virtualization feature is executed as a user program on a first virtual processor by selecting, in response to a cause of a call for a host VMM, one of a guest status area (221) for executing a user program on a second virtual processor and a host status area (222) for executing the guest VMM, and by updating a guest status area (131) of a shadow VMCS for controlling a physical processor. Accordingly, without a decrease in performance of a virtual computer, the next-generation OS incorporating the virtualization feature is executed on a virtual server, and the next-generation OS and an existing OS are integrated on a single physical computer.

Abstract: A first processor group of physical processors having hardware-assisted virtualization set disabled among the plurality of physical processors; a second processor group of physical processors having the hardware-assisted virtualization set enabled among the plurality of physical processors; a first OS to which the first processor group is allocated; and a virtualization part to which the second processor group is allocated, the virtualization part is configured to: allocate a predetermined area within the memory and a predetermined one of the plurality of physical processors within the second processor group to the second OS as the virtualized processor, and boot the second OS to be provided as the virtual machine; and set a shared area, which is readable/writable by both the first OS and the virtualization part, and set interrupt routing information comprising a correspondence relationship between a logical interrupt to the second OS and a physical interrupt thereto.

Abstract: A computer system comprising a plurality of computers on which a plurality of operating systems run, wherein a memory stores a first hardware control unit, wherein a storage device stores a first OS image, a second OS image, a second hardware control unit for executing start processing of the second OS, and an address rewrite unit, wherein the second hardware control unit includes a start unit for starting the second hardware control unit, wherein the address rewrite unit which is started by the first OS is configured to: obtain an address of a storage area, in which address data to be rewritten is stored, as a target address, rewrite the address data stored in the storage area corresponding to the obtained target address and start the start unit, wherein the start unit is configured to start the second hardware control unit by using the rewritten address data.

Abstract: A computer system with a plurality of processors having a hardware-assisted virtualization and a memory, the computer system including a first processor group of the processors having hardware-assisted virtualization set disabled, and a second processor group of the processors and having hardware-assisted virtualization set enabled, the method having: booting a first OS by assigning the first processor group to the first OS; booting a virtual machine monitor to boot a virtual machine by assigning the second processor group to the virtual machine monitor; performed by the virtual machine monitor, booting a second OS by assigning a certain area of the memory to the second OS; and performed by the virtual machine monitor, setting a data path through which the first OS and second OS communicate with each other, the data path being set in the memory.

Abstract: A method of monitoring a virtual computer system including a network device coupled to a client computer, sever computers each coupled to the network device, and a performance degradation source locator apparatus coupled to the network device and the server computer, obtaining, by the performance degradation source locator apparatus, performance information on physical computer resources and performance information on virtual computer resources of extracted virtual machines and server computers and the virtual machine and the server computer in which the latency has increased to locate a part in which the latency has increased.

Abstract: In order to provide an inexpensive way to share an I/O device loaded in an I/O drawer among a plurality of blades, in a server system including a plurality of servers, a PCI device, and a manager for initializing a PCI switch, the PCI device has a plurality of virtual functions (VFs). The PCI switch, which has VF allocation information which indicates association between the servers and the VFs, is configured to: receive a transaction from one of the servers or from the PCI device; when the received transaction is a transaction sent from the one of the servers, remove a server identifier with which a sender server is identified and transfer the received transaction to the PCI device; and when the received transaction is a transaction sent from the PCI device, attach a server identifier that is determined based on the VF allocation information.

Abstract: In a memory inspection in a computer installing a x86 CPU, system software related to low-frequent processing is prevented from going down, and the suppression of performance degradation and the avoidance of a reduction in memory capacity by the memory inspection is realized. The computer having a processor, a memory, and an I/O device. The memory stores a system software realizing a system control unit, and an inspection program realizing an inspection unit. The processor has a memory fault notifying unit notifying the system control unit of a fault address. The system control unit includes an adjustment unit that determines whether the inspection program needs to be executed, or not, based on the type of event occurring, plural event processing units processing the event by using different storage areas of the memory, a fault recording unit recording the memory fault, and an event processing unit selector.

Abstract: The program attains compatibility of suppression of an overhead accompanying page exception handling in the case of operating a program whose amount of memory use is large on a virtual machine and suppression of the overhead accompanying page exception handling in the case of operating a first OS that has a function of making another OS run on a virtual machine. A VMM creates a shadow PT (Page Table) for prohibiting reading-writing of privileged memory that requires emulation of reading/writing by using a RSV-bit, and registers the shadow PT and the second PT that a second OS operating on the first OS has in an x86 compatible CPU equipped with page exception detecting function using two PT's. When a page exception occurs, the VMM refers to cause code of the page exception and, when a P field of the cause code is 0, determines immediately that emulation is unnecessary.

Abstract: A failure management method for a computer including a processor, and a memory connected to the processor, and in which the processor containing a memory protection function, executes a first software program and a second software program monitoring the operation of the first software program, and the second software program retains error information including address information and access-related information; and the method implemented by the by the second software program includes a step for detecting the occurrence of errors in the memory; and a step for prohibiting access to the address of the memory where the error occurred, and monitoring the access state; and a step for executing the failure processing when accessing by the first software program of the address of the memory where the error occurred was detected.

Abstract: Provided is a virtual machine including a first virtualization module operating on a physical CPU, for providing a first CPU, and a second virtualization module operating on the first CPU, for providing second CPU. The second virtualization module includes first processor control information holding a state of the first CPU obtained at a time of execution of the user program. The first virtualization module includes second processor control information containing a state of the physical CPU obtained at the time of the execution of the second virtualization module, third processor control information containing a state of the physical CPU obtained at the time of the execution of the user program, and prefetch entry information in which information to be prefetched from the third processor control information is set, and, upon detection of a event, the information set in the prefetch entry information is reflected to the first processor control information.

Abstract: In a multi-tenancy information processing system, a necessary setting change item and a target NW device are specified at the time of changing a configuration of a virtual machine of a tenant. A management server 116 includes a device management table 352 for each tenant and each segment, in which an NW setting item set for a network (NW) device is stored for each of the NW devices corresponding to the segment of the tenant, in advance. The management server 116 receives a configuration change request including type information on a request representing addition, deletion, or movement of the virtual machine, an identifier of a target tenant, and an identifier of a target segment.

Abstract: A VMM disables an interrupt interception flag on at least one CPU to execute, upon reception of an interrupt, an interrupt handler code of an OS, and enables the interrupt interception flag on the at least one CPU to execute, upon the reception of the interrupt, an emulator in the VMM. When, to a virtual machine, an I/O device is assigned in a dedicated form, and when the CPU is assigned while the interrupt interception is disabled, a destination of the interrupt from the physical I/O device is set to the corresponding CPU on which the interrupt interception is disabled. When, to the virtual machine, the I/O device is assigned in a shared form, or when the CPU is assigned while the interrupt interception is disabled, the destination of the interrupt from the physical I/O device is set to the corresponding CPU on which the interrupt interception is enabled.

Abstract: In order to provide an inexpensive way to share an I/O device loaded in an I/O drawer among a plurality of blades, in a server system including a plurality of servers, a PCI device, and a manager for initializing a PCI switch, the PCI device has a plurality of virtual functions (VFs). The PCI switch, which has VF allocation information which indicates association between the servers and the VFs, is configured to: receive a transaction from one of the servers or from the PCI device; when the received transaction is a transaction sent from the one of the servers, remove a server identifier with which a sender server is identified and transfer the received transaction to the PCI device; and when the received transaction is a transaction sent from the PCI device, attach a server identifier that is determined based on the VF allocation information.

Abstract: Provided is a virtual machine including a first virtualization module operating on a physical CPU, for providing a first CPU, and a second virtualization module operating on the first CPU, for providing second CPU. The second virtualization module includes first processor control information holding a state of the first CPU obtained at a time of execution of the user program. The first virtualization module includes second processor control information containing a state of the physical CPU obtained at the time of the execution of the second virtualization module, third processor control information containing a state of the physical CPU obtained at the time of the execution of the user program, and prefetch entry information in which information to be prefetched from the third processor control information is set, and, upon detection of a event, the information set in the prefetch entry information is reflected to the first processor control information.

Abstract: In order to provide an inexpensive way to share an I/O device loaded in an I/O drawer among a plurality of blades, in a server system including a plurality of servers, a PCI device, and a manager for initializing a PCI switch, the PCI device has a plurality of virtual functions (VFs). The PCI switch, which has VF allocation information which indicates association between the servers and the VFs, is configured to: receive a transaction from one of the servers or from the PCI device; when the received transaction is a transaction sent from the one of the servers, remove a server identifier with which a sender server is identified and transfer the received transaction to the PCI device; and when the received transaction is a transaction sent from the PCI device, attach a server identifier that is determined based on the VF allocation information.