Abstract: In order to eliminate an increase in the source potential of a transistor selected during writing or reading, this semiconductor device is equipped with: a variable-resistance type first switch having a first terminal and a second terminal; a variable-resistance type second switch having a third terminal and a fourth terminal, the third terminal being connected to the second terminal to form an intermediate node; first wiring connected to the first terminal; second wiring connected to the fourth terminal and, in a planar view, extending in a direction crossing the first wiring; a first selection transistor connected to the first wiring; a second selection transistor connected to the second wiring; a first well terminal connection line to which a well terminal of the first selection transistor is connected; and a second well terminal connection line to which a well terminal of the second selection transistor is connected.

Abstract: Provided is an integrated circuit that has reduced power consumption. The integrated circuit is provided with: a plurality of first wires one end of each of which is used as an input terminal; a plurality of second wires one end of each of which is used as an output terminal and which are respectively connected to the first wires; a bias wire which is connected to each of the second wires, and which is connected to a power supply or ground; a plurality of switches which connect the first wires or the bias wire and the second wires; and a selection circuit which selects electrical connection between the bias wire and the power supply or ground.

Abstract: A reconfigurable circuit comprising: a complementary resistive switch; a write circuit to configure the complementary resistive switch; a read circuit to get ON/OFF information of the complementary resistive switch; a register to store ON/OFF information of the complementary resistive switch.

Abstract: A reconfigurable circuit comprising: crossbar switches; wires, each of which is coupled to one output port of one crossbar switch and input ports of the other crossbar switches; at least one inverter inserted on each wire for driving long-distance signal transfer, wherein one or less first inverter is inserted on the wire between two adjacent crossbar switches; one or two second inverters inserted between a crossbar switch input port and its connected wire.

Abstract: A reconfigurable circuit includes: a plurality of first lines; one or more second lines; a non-volatile resistive cell coupling one of the first lines with one of the second lines at each cross-point between the first lines and the second lines; and first switch elements including first terminals respectively coupled to the first lines, wherein each of the first switch elements is separately turned on or off in accordance with a control signal applied thereto.

Abstract: A crossbar switch comprising: a first interconnect, a second interconnect, and a resistance change element. The resistance change element includes: a first electrode connected to the first interconnect and a second electrode connected to the second interconnect which are embedded in a first insulating film on a substrate having a transistor; a second insulating film covering the first insulating film and the first and second electrodes; first and second opening portions exposing parts of an upper surface including end portions of the first and second electrodes from the second insulating film with translational symmetry; first and second resistance change films covering the first and second opening portions and connecting to the first and second electrodes at the opening portions; third and fourth electrodes connecting to the first and second resistance change films; a fifth electrode connecting to the third and fourth electrodes and to a diffusion layer of the transistor.

Abstract: A crossbar switch includes a plurality of first wires extending in a first direction and second wires extending in a second direction. The switch includes third wires extending in a third direction and fourth wires extending in a fourth direction. The switch includes switch cells connected to the first and second wires. The first wires are skewed relative to the second and fourth wires, while the third wires are skewed relative to the second and fourth wires. The switch cells are connected to the third and fourth wires, and the third wires are also connected to the switch cells connected to the first wires adjacent to the respective first wires, or alternatively the fourth wires are also connected to the switch cells connected to the second wires adjacent to the respective second wires.

Abstract: A reconfigurable circuit includes first and second wires and two or more paths active at different times. Each path includes: a first NVRS whose first terminal is connected to the first wire; a first transistor whose drain terminal is connected to a second terminal of the first NVRS; a second NVRS whose first terminal is connected to the second terminal of the first NVRS; a second transistor whose source terminal is connected to a second terminal of the second NVRS and whose drain terminal is connected to the second wire; and a 2-input AND circuit whose output is connected to a gate terminal of the first transistor. A time control signal is supplied to a first input of the 2-input AND circuit and a gate terminal of the second transistor. A write control signal is supplied to a second input of the 2-input AND circuit.

Abstract: Provided is an integrated circuit that has reduced power consumption. The integrated circuit is provided with: a plurality of first wires one end of each of which is used as an input terminal; a plurality of second wires one end of each of which is used as an output terminal and which are respectively connected to the first wires; a bias wire which is connected to each of the second wires, and which is connected to a power supply or ground; a plurality of switches which connect the first wires or the bias wire and the second wires; and a selection circuit which selects electrical connection between the bias wire and the power supply or ground.

Abstract: In switching elements each using a two-terminal-type variable resistance element, improper writing or any improper operation is often caused and the reliability of the switching elements cannot be improved easily. A switching element according to the present invention is equipped with a first variable resistance element equipped with a first input/output terminal and a first connection terminal, a second variable resistance element equipped with a second input/output terminal and a second connection terminal, and a rectifying element equipped with a control terminal and a third connection terminal, wherein the first connection terminal, the second connection terminal and the third connection terminal are connected to one another.

Abstract: In order to provide a highly reliable crossbar circuit that enables salvation of reversal of a resistive state of a variable resistance element, the semiconductor device has a configuration obtained by parallelly arranging two unit elements, each including variable-resistance two-terminal elements connected in series, the semiconductor device being provided with: a unit element group being connected to a first wiring and a second wiring; a first programming driver that changes, via the first wiring, a resistive state of the two-terminal element constituting the unit element group; a first selection transistor being connected to the first wiring and the first programming driver; a second programming driver that changes, via the second wiring, a resistive state of the two-terminal element constituting the unit element group; and a second selection transistor being connected to the second wiring and the second programming driver.

Abstract: An object of the present invention is to provide a method for effectively performing characterization for circuit verification by static timing analysis, of a programmable logic integrated circuit including a crossbar switch including a resistance-variable element, and a logic circuit logically configured with the crossbar switch, wherein: the programmable logic integrated circuit is divided into a plurality of leaf cells including a plurality of load circuits including a part of the crossbar switch, and a power supply element input to the crossbar switch; the leaf cell is divided into delay paths each including a base leaf cell and a correction leaf cell; and circuit verification is performed based on a delay information library in which a delay time for the base leaf cell and a correction delay for the correction leaf cell are integrated into a delay time for the leaf cell.

Abstract: A semiconductor device comprises a semiconductor substrate; a multilevel wiring layer structure on the semiconductor substrate; and a variable resistance element in the multilevel wiring layer structure, wherein the variable resistance element comprises a variable resistance element film whose resistance changes between a top electrode and a bottom electrode, wherein the multilevel wiring layer structure comprises at least a wiring electrically connected to the bottom electrode and a plug electrically connected to the top electrode, and wherein the wiring also serves as the bottom electrode.

Abstract: An object of the present invention is to provide a method for effectively performing characterization for circuit verification by static timing analysis, of a programmable logic integrated circuit including a crossbar switch including a resistance-variable element, and a logic circuit logically configured with the crossbar switch, wherein: the programmable logic integrated circuit is divided into a plurality of leaf cells including a plurality of load circuits including a part of the crossbar switch, and a power supply element input to the crossbar switch; the leaf cell is divided into delay paths each including a base leaf cell and a correction leaf cell; and circuit verification is performed based on a delay information library in which a delay time for the base leaf cell and a correction delay for the correction leaf cell are integrated into a delay time for the leaf cell.

Abstract: An object of the present invention is to provide a logic integrated circuit that increases reliability of configuration information held in a switch while maintaining high tamper resistance and a small chip area. The logic integrated circuit according to the present invention includes: a three-terminal resistance change switch including a first resistance change switch and a second resistance change switch connected in series; a reading circuit which reads first data based on a resistance state of the first resistance change switch and second data based on a resistance state of the second resistance change switch; and a first error detection circuit which compares the first data with the second data and issue an output based on a result of the comparison.

Abstract: The purpose of the present invention is to increase the efficiency with which silicon on a chip is used, and to easily reduce the size of a logic cell. To accomplish the purpose, this reconfigurable circuit includes: a logic memory unit configured from a resistance change element, and positioned distributed into at least two units; a logic unit for referencing the logic memory unit and performing logical operations; and a signal path switching unit for receiving the results of the logical operation of the logic unit and outputting said results to the outside. The logic memory part and the signal path switching part constitute part of a crossbar switching circuit, and share write wiring to the resistance change element.

Abstract: A reconfigurable circuit includes first and second wires and two or more paths active at different times. Each path includes: a first NVRS whose first terminal is connected to the first wire; a first transistor whose drain terminal is connected to a second terminal of the first NVRS; a second NVRS whose first terminal is connected to the second terminal of the first NVRS; a second transistor whose source terminal is connected to a second terminal of the second NVRS and whose drain terminal is connected to the second wire; and a 2-input AND circuit whose output is connected to a gate terminal of the first transistor. A time control signal is supplied to a first input of the 2-input AND circuit and a gate terminal of the second transistor. A write control signal is supplied to a second input of the 2-input AND circuit.

Abstract: The present invention provides a non-volatile switching element that can be applied to a programmable-logic wiring changeover switch and in which an electrochemical reaction is used. Of the two electrodes for applying a bias voltage to the variable resistance layer of the non-volatile switching element, the electrode that does not feed metal ions to the variable resistance layer when the switch is in the ON state is made from a ruthenium alloy. The ruthenium alloy includes ruthenium and a metal in which the standard Gibbs energy of forming ?G when metal ions are generated from the metal is higher in the negative direction than ?G of ruthenium. As a result, it becomes possible to maintain the low-resistance state in the ON state for a longer period of time without increasing the amount of electrical current required when a switch is made between the ON state and the OFF state.

Abstract: A resistance change element includes: a first insulating film provided on a semiconductor substrate formed on a transistor; first and second electrodes embedded in the first insulating film which supply metal ion; a second insulating film covering the first insulating film and the first and second electrodes; first and second opening portions exposing parts of an upper surface including end portions of the first and second electrodes from the second insulating film with translational symmetry; metal deposition type first and second resistance change films covering the first and second opening portions and connecting to the parts of the upper surface including the end portions of the first and second electrodes at the opening portions; third and fourth electrodes connecting to upper surfaces of the first and second resistance change films; and a fifth electrode connecting to the third and fourth electrodes and to a diffusion layer of the transistor.

Abstract: The semiconductor device according to the present invention has an upper electrode, a first lower layer wiring that also functions as a lower electrode, an electrical resistance-changing film interposed between the upper electrode and the first lower layer wiring, a second lower layer wiring, and a contact plug, the contact plug connecting to the upper electrode and to the second lower layer wiring. The present invention yields a semiconductor device with which it is possible to dispose elements in high density while maintaining the reliability and manufacturing yield of the electrical resistance-changing element.