Patents by Inventor Toshiyuki Kaya
Toshiyuki Kaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240143465Abstract: A semiconductor device includes first and second processor cores configured to perform a lock step operation and including first and second scan chains. The semiconductor device further includes a scan test control unit that controls a scan test of the first and second processor cores using the first and second scan chains, and a start-up control unit that outputs a reset signal for bringing the first and second processor cores into a reset state. The start-up control unit outputs an initialization scan request before the start of a lock step operation, and the scan test control unit performs an initialization scan test operation on the first and second processor cores by using an initialization pattern.Type: ApplicationFiled: August 18, 2023Publication date: May 2, 2024Inventors: Kiyoshi HAYASE, Yuki HAYAKAWA, Toshiyuki KAYA, Kyohei YAMAGUCHI, Takahiro IRITA, Shinichi SHIBAHARA
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Patent number: 11683497Abstract: A video image encoding device includes: an image encoding unit that performs predictive encoding by obtaining a difference between a divided image included in a frame as a target of predictive encoding and a prediction image; local decode generation unit that decodes an encoding result of the divided image by the image encoding unit to generate a reference image; a first buffer that stores pixel data generated by the local decode generation unit; a compression unit that refers to the first buffer to compress the reference image and generates compressed data; an allowable data amount setting unit that presets an allowable data amount to be stored in the memory for each predetermined area of the frame as the target of the predictive encoding; and a reference image storage determination unit that determines whether the compressed data is store in the memory based on the allowable data amount, and stores the compressed data in the memory based on a determination result of storing the compressed data in the memoryType: GrantFiled: October 21, 2020Date of Patent: June 20, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hung Van Cao, Toshiyuki Kaya, Tetsuya Shibayama
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Video encoding device, operating methods thereof, and vehicles equipped with a video encoding device
Patent number: 11606552Abstract: A video encoding device includes a local decode generation unit for generating a reference image based on a result of encoding of a divided image, a compression unit for compressing the reference image to generate a compressed data, a reference image storage determination unit for determining whether to store the compressed data in a memory, and an inter-prediction unit for performing motion vector search for inter-coding based on a reference image stored in the memory. The reference image storage determination unit sets an allowable data amount used for storing the reference image for each determined area of the moving image data, and determines whether or not to store the compressed data obtained by compressing the reference image in the memory based on the allowable data amount. Inter-prediction unit sets the reference image corresponding to the compressed data stored in the memory as the search range of motion vector search.Type: GrantFiled: July 20, 2021Date of Patent: March 14, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Maiki Hosokawa, Toshiyuki Kaya, Tetsuya Shibayama, Seiji Mochizuki, Tomohiro Une, Kazushi Akie -
Patent number: 11544192Abstract: A semiconductor device includes first and second CPUs, first and second SPUs for controlling a snoop operation, a controller supporting ASIL D of a functional safety standard and a memory. The controller sets permission of the snoop operation to the first and second SPUs when a software lock-step is not performed. The controller sets prohibition of the snoop operation to the first and second SPUs when the software lock-step is performed. The first CPU executes a first software for the software lock-step, and writes an execution result in a first area for the memory. The second CPU executes a second software for the software lock-step, and writes an execution result in a second area of the memory. The execution result written in the first area is compared with the execution result written in the second area.Type: GrantFiled: December 4, 2020Date of Patent: January 3, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yuki Hayakawa, Toshiyuki Kaya, Shinichi Shibahara
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VIDEO ENCODING DEVICE, OPERATING METHODS THEREOF, AND VEHICLES EQUIPPED WITH A VIDEO ENCODING DEVICE
Publication number: 20210352278Abstract: A video encoding device includes a local decode generation unit for generating a reference image based on a result of encoding of a divided image, a compression unit for compressing the reference image to generate a compressed data, a reference image storage determination unit for determining whether to store the compressed data in a memory, and an inter-prediction unit for performing motion vector search for inter-coding based on a reference image stored in the memory. The reference image storage determination unit sets an allowable data amount used for storing the reference image for each determined area of the moving image data, and determines whether or not to store the compressed data obtained by compressing the reference image in the memory based on the allowable data amount. Inter-prediction unit sets the reference image corresponding to the compressed data stored in the memory as the search range of motion vector search.Type: ApplicationFiled: July 20, 2021Publication date: November 11, 2021Inventors: Maiki HOSOKAWA, Toshiyuki KAYA, Tetsuya SHIBAYAMA, Seiji MOCHIZUKI, Tomohiro UNE, Kazushi AKIE -
Video encoding device, operating methods thereof, and vehicles equipped with a video encoding device
Patent number: 11102475Abstract: A video encoding device includes a local decode generation unit for generating a reference image based on a result of encoding of a divided image, a compression unit for compressing the reference image to generate a compressed data, a reference image storage determination unit for determining whether to store the compressed data in a memory, and an inter-prediction unit for performing motion vector search for inter-coding based on a reference image stored in the memory. The reference image storage determination unit sets an allowable data amount used for storing the reference image for each determined area of the moving image data, and determines whether or not to store the compressed data obtained by compressing the reference image in the memory based on the allowable data amount. Inter-prediction unit sets the reference image corresponding to the compressed data stored in the memory as the search range of motion vector search.Type: GrantFiled: October 24, 2019Date of Patent: August 24, 2021Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Maiki Hosokawa, Toshiyuki Kaya, Tetsuya Shibayama, Seiji Mochizuki, Tomohiro Une, Kazushi Akie -
Publication number: 20210136387Abstract: A video image encoding device includes: an image encoding unit that performs predictive encoding by obtaining a difference between a divided image included in a frame as a target of predictive encoding and a prediction image; local decode generation unit that decodes an encoding result of the divided image by the image encoding unit to generate a reference image; a first buffer that stores pixel data generated by the local decode generation unit; a compression unit that refers to the first buffer to compress the reference image and generates compressed data; an allowable data amount setting unit that presets an allowable data amount to be stored in the memory for each predetermined area of the frame as the target of the predictive encoding; and a reference image storage determination unit that determines whether the compressed data is store in the memory based on the allowable data amount, and stores the compressed data in the memory based on a determination result of storing the compressed data in the memoryType: ApplicationFiled: October 21, 2020Publication date: May 6, 2021Inventors: Hung Van Cao, Toshiyuki Kaya, Tetsuya Shibayama
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Publication number: 20210089453Abstract: A semiconductor device includes first and second CPUs, first and second SPUs for controlling a snoop operation, a controller supporting ASIL D of a functional safety standard and a memory. The controller sets permission of the snoop operation to the first and second SPUs when a software lock-step is not performed. The controller sets prohibition of the snoop operation to the first and second SPUs when the software lock-step is performed. The first CPU executes a first software for the software lock-step, and writes an execution result in a first area for the memory. The second CPU executes a second software for the software lock-step, and writes an execution result in a second area of the memory. The execution result written in the first area is compared with the execution result written in the second area.Type: ApplicationFiled: December 4, 2020Publication date: March 25, 2021Inventors: Yuki HAYAKAWA, Toshiyuki KAYA, Shinichi SHIBAHARA
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Patent number: 10860486Abstract: A semiconductor device includes first and second CPUs, first and second SPUs for controlling a snoop operation, a controller supporting ASIL D of a functional safety standard and a memory. The controller sets permission of the snoop operation to the first and second SPUs when a software lock-step is not performed. The controller sets prohibition of the snoop operation to the first and second SPUs when the software lock-step is performed. The first CPU executes a first software for the software lock-step, and writes an execution result in a first area for the memory. The second CPU executes a second software for the software lock-step, and writes an execution result in a second area of the memory. The execution result written in the first area is compared with the execution result written in the second area.Type: GrantFiled: June 19, 2019Date of Patent: December 8, 2020Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yuki Hayakawa, Toshiyuki Kaya, Shinichi Shibahara
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Patent number: 10782886Abstract: To provide a semiconductor device which suppresses a delay in processing. The semiconductor device is equipped with a plurality of read units which read data stored across a plurality of banks in a memory having the banks, and an access method managing section which, when one of the read units reads the data, determines a read start bank number being a bank number to start reading according to operation situations of the read units excepting the one read unit, and instructs the determined read start bank number to the one read unit.Type: GrantFiled: September 11, 2018Date of Patent: September 22, 2020Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Nhat Van Huynh, Seiji Mochizuki, Katsushige Matsubara, Toshiyuki Kaya
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VIDEO ENCODING DEVICE, OPERATING METHODS THEREOF, AND VEHICLES EQUIPPED WITH A VIDEO ENCODING DEVICE
Publication number: 20200195918Abstract: A video encoding device includes a local decode generation unit for generating a reference image based on a result of encoding of a divided image, a compression unit for compressing the reference image to generate a compressed data, a reference image storage determination unit for determining whether to store the compressed data in a memory, and an inter-prediction unit for performing motion vector search for inter-coding based on a reference image stored in the memory. The reference image storage determination unit sets an allowable data amount used for storing the reference image for each determined area of the moving image data, and determines whether or not to store the compressed data obtained by compressing the reference image in the memory based on the allowable data amount. Inter-prediction unit sets the reference image corresponding to the compressed data stored in the memory as the search range of motion vector search.Type: ApplicationFiled: October 24, 2019Publication date: June 18, 2020Inventors: Maiki HOSOKAWA, Toshiyuki KAYA, Tetsuya SHIBAYAMA, Seiji MOCHIZUKI, Tomohiro UNE, Kazushi AKIE -
Patent number: 10638148Abstract: A video encoding/decoding system includes a video encoding device, and a video decoding device. The video encoding device includes an encoding circuit for encoding an image including a diagnostic image or a normal image. The video decoding device includes a decoding circuit for decoding the image encoded in the encoding circuit, a check signal generation circuit for generating a check signal of the decoded image, a storage circuit for storing the check signal generated by the check signal generation circuit, and a comparison circuit for comparing the check signal stored in the storage circuit with the check signal generated by the check signal generation circuit. The failure is detected by comparing the check signal including an expected value stored in the storage circuit with the check signal including a comparison value generated by the check signal generation circuit by processing the same image data a plurality of times.Type: GrantFiled: August 2, 2018Date of Patent: April 28, 2020Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Seiji Mochizuki, Toshiyuki Kaya, Hiroshi Ueda, Tetsuya Shibayama
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Patent number: 10587888Abstract: A video encoding/decoding system includes a video encoding device, and a video decoding device. The video encoding device includes an encoding circuit for encoding an image including a diagnostic image or a normal image. The video decoding device includes a decoding circuit for decoding the image encoded in the encoding circuit, a check signal generation circuit for generating a check signal of the decoded image, a storage circuit for storing the check signal generated by the check signal generation circuit, and a comparison circuit for comparing the check signal stored in the storage circuit with the check signal generated by the check signal generation circuit. The failure is detected by comparing the check signal including an expected value stored in the storage circuit with the check signal including a comparison value generated by the check signal generation circuit by processing the same image data a plurality of times.Type: GrantFiled: August 2, 2018Date of Patent: March 10, 2020Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Seiji Mochizuki, Toshiyuki Kaya, Hiroshi Ueda, Tetsuya Shibayama
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Publication number: 20200073806Abstract: A semiconductor device includes first and second CPUs, first and second SPUs for controlling a snoop operation, a controller supporting ASIL D of a functional safety standard and a memory. The controller sets permission of the snoop operation to the first and second SPUs when a software lock-step is not performed. The controller sets prohibition of the snoop operation to the first and second SPUs when the software lock-step is performed. The first CPU executes a first software for the software lock-step, and writes an execution result in a first area for the memory. The second CPU executes a second software for the software lock-step, and writes an execution result in a second area of the memory. The execution result written in the first area is compared with the execution result written in the second area.Type: ApplicationFiled: June 19, 2019Publication date: March 5, 2020Inventors: Yuki HAYAKAWA, Toshiyuki KAYA, Shinichi SHIBAHARA
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Publication number: 20200005353Abstract: The present invention provides a service car in which the effect of advertisement is increased and the convenience for users is increased. The processing executed by the CPU of the moving object as the service car includes the steps of obtaining an advertisement from the server (S505), displaying the advertisement on a monitor outside the moving object (S510), accepting input of each signal output from an external information acquisition device (camera, microphone, sensor) provided in the moving object (S520), obtaining external information representing the periphery of the moving object and storing the information (S530), obtaining the travel information of the moving object (S540), estimating the effect of the advertisement based on the external information and the travel information (S550), determining a reward for the advertisement based on a predetermined reward criterion and the effect (S560), and calculating a usage fee for the moving object based on the determined reward.Type: ApplicationFiled: June 20, 2019Publication date: January 2, 2020Inventors: Tetsuya SHIBAYAMA, Seiji MOCHIZUKI, Nhat Van HUYNH, Hiroshi UEDA, Toshiyuki KAYA
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Patent number: 10497149Abstract: An image processing apparatus according to one embodiment determines target resolutions of a plurality of source images based on a first horizontal direction size and a first vertical direction size which are a horizontal direction size and a vertical direction size of a backlight control unit of a first display, and a second horizontal direction size and a second vertical direction size which are a horizontal direction size and a vertical direction size of a backlight control unit of a second display, and converts the resolution of each of a plurality of source images such that the resolution of each of a plurality of source images becomes the target resolution.Type: GrantFiled: January 3, 2018Date of Patent: December 3, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Ryuichi Igarashi, Seiji Mochizuki, Katsushige Matsubara, Toshiyuki Kaya
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Patent number: 10459646Abstract: Disclosed is a semiconductor device capable of performing compression and decompression with increased appropriateness. The semiconductor device includes a computing module and a memory control module. The computing module includes a computing unit and a compression circuit. The computing unit performs arithmetic processing. The compression circuit compresses data indicative of the result of arithmetic processing. The memory control module includes an access circuit and a decompression circuit. The access circuit writes compressed data into a memory and reads written data from the memory. The decompression circuit decompresses data read from the memory and outputs the decompressed data to the computing module.Type: GrantFiled: November 18, 2016Date of Patent: October 29, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Katsushige Matsubara, Seiji Mochizuki, Ryoji Hashimoto, Toshiyuki Kaya, Kimihiko Nakazawa, Takahiro Irita, Tetsuji Tsuda
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Patent number: 10452587Abstract: A plurality of transfer modules (402-0 to 402-M) that transfer data between processing units are provided so as to respectively correspond to a plurality of processing units (401-0 to 401-M). First ring buses (403-0 to 403-M) connect, for each of the processing units (401-0 to 401-M), subunits within a corresponding processing unit and the transfer module corresponding to the processing unit so that they form a ring shape. The plurality of transfer modules (402-0 to 402-M) are connected so that they form a ring shape by a second ring bus (404).Type: GrantFiled: December 10, 2015Date of Patent: October 22, 2019Assignee: RENESAS ELECTRONICS COPRORATIONInventors: Hiroshi Ueda, Seiji Mochizuki, Toshiyuki Kaya, Kenichi Iwata, Katsushige Matsubara
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Patent number: 10419753Abstract: A display area can be smoothly moved. A semiconductor device sequentially receives a plurality of whole images, each of which includes a plurality of small screen images and which are temporally continuous and form a moving image, and decodes a received whole image. Here, the semiconductor device includes a reception unit that receives the whole image including the small screen images, a determination unit that determines a decoding area which includes a small screen image to be decoded and which is included in the whole image, and a decoding unit that decodes the small screen image in the decoding area which is determined by the determination unit and which is included in the whole image. The determination unit determines a new decoding area when a small screen image of intra frame appears in the decoding area.Type: GrantFiled: September 8, 2017Date of Patent: September 17, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Kazushi Akie, Seiji Mochizuki, Toshiyuki Kaya, Katsushige Matsubara, Hiroshi Ueda, Ren Imaoka, Ryoji Hashimoto
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Patent number: 10419663Abstract: A semiconductor device includes: an encoding processing unit that stores an encoded stream of an input data that is encoded based on the specified encoding control information; a buffer management unit that calculates the transmission buffer occupancy indicating the amount of data stored in a transmission buffer according to the generated data amount, and the reception buffer occupancy indicating the amount of data stored in a reception buffer, which is the destination of the encoded stream; and a control information specifying unit that, when the transmission buffer occupancy is equal to or less than a first threshold, specifies the encoding control information based on the reception buffer occupancy, and when the transmission buffer occupancy is greater than the first threshold, specifies the encoding control information to further reduce the generated data amount than in the case of equal to or less than the first threshold, to the encoding processing unit.Type: GrantFiled: February 1, 2017Date of Patent: September 17, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Tetsuya Shibayama, Toshiyuki Kaya, Seiji Mochizuki, Ryoji Hashimoto