Patents by Inventor Travis J. Anderson

Travis J. Anderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11486158
    Abstract: A shearwall is disclosed for use in lightweight or other constructions to transmit lateral shear forces and dissipate energy on the construction. In examples, the shearwall includes a central panel formed of wood, and side plates formed of steel. The side plates may be affixed at lower corners of first and second opposed surfaces of the central panel. Each side plate may include a fastening plate for affixing the side plate to the central panel, and a restraint plate which fits within a reduced area section of the central panel between the first and second surfaces.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: November 1, 2022
    Assignee: Simpson Strong-Tie Company Inc.
    Inventors: Travis R. Anderson, Caleb J. Knudson
  • Patent number: 11470758
    Abstract: In one embodiment, an agricultural implement system includes a row unit, the row unit configured to dispose seed into a ground trench, and closing system corresponding to the row unit, the closing system configured to close the ground trench after disposition of the seed. The agricultural implement system further includes a double acting cylinder mechanically coupled to the closing system, the double acting cylinder comprising a cylinder side port and a rod side port and a fluid source fluidly coupled to the cylinder side port and configured to provide a cylinder side fluid. The agricultural implement system additionally includes a filter fluidly coupled to the rod side port. Filtered fluid enters the double acting cylinder via the rod side port.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: October 18, 2022
    Assignee: CNH Industrial America LLC
    Inventors: Ryan R. Raetzman, Marvin A. Prickel, Brian J. Anderson, Travis Lester Harnetiaux, Johnathon R. Dienst
  • Publication number: 20220269917
    Abstract: Optical articles including a spatially defined arrangement of a plurality of data rich retroreflective elements, wherein the plurality of retroreflective elements comprise retroreflective elements having at least two different retroreflective properties and at least two different optical contrasts with respect to a background substrate when observed within an ultraviolet spectrum, a visible spectrum, a near-infrared spectrum, or a combination thereof.
    Type: Application
    Filed: March 11, 2022
    Publication date: August 25, 2022
    Inventors: Michael A. McCoy, Anne C. Gold, Silvia Geciova-Borovova Guttmann, Glenn E. Casner, Timothy J. Gardner, Steven H. Kong, Gautam Singh, Jonathan T. Kahl, Nathan J. Anderson, Catherine L. Aune, Caroline M. Ylitalo, Britton G. Billingsley, Muhammad J. Afridi, Kui Chen-Ho, Travis L. Potts, Robert W. Shannon, Guruprasad Somasundaram
  • Patent number: 11415518
    Abstract: A method for mapping and analyzing a GaN substrate to identify areas of the substrate suitable for fabrication of electronic devices thereon. Raman spectroscopy is performed over the surface of a GaN substrate to produce maps of the E2 and A1 peaks at a plurality of areas on the substrate surface, the E2 and A1 peaks being associated with known concentrations of defects and charge carriers, so that areas of the GaN substrate having relatively high resistivity or conductivity which make those areas suitable or unsuitable for fabrication of electronic devices can be identified. The devices can then be fabricated only on suitable areas of the substrate, or the size of the devices can be tailored to maximize the yield of devices fabricated thereon. Substrates not meeting a threshold level of defect and/or charge carrier concentration can be discarded without fabrication of poor-quality devices thereon.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: August 16, 2022
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Jennifer K. Hite, James C. Gallagher, Karl D. Hobart
  • Publication number: 20220254639
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Application
    Filed: January 26, 2022
    Publication date: August 11, 2022
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Patent number: 11373076
    Abstract: Optical articles including a spatially defined arrangement of a plurality of data rich retroreflective elements, wherein the plurality of retroreflective elements comprise retroreflective elements having at least two different retroreflective properties and at least two different optical contrasts with respect to a background substrate when observed within an ultraviolet spectrum, a visible spectrum, a near-infrared spectrum, or a combination thereof.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: June 28, 2022
    Assignee: 3M Innovative Properties Company
    Inventors: Michael A. McCoy, Anne C. Gold, Silvia Geciova-Borovova Guttmann, Glenn E. Casner, Timothy J. Gardner, Steven H. Kong, Gautam Singh, Jonathan T. Kahl, Nathan J. Anderson, Catherine L. Aune, Caroline M. Ylitalo, Britton G. Billingsley, Muhammad J. Afridi, Kui Chen-Ho, Travis L. Potts, Robert W. Shannon, Guruprasad Somasundaram
  • Patent number: 11342420
    Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: May 24, 2022
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart
  • Publication number: 20220069668
    Abstract: An example electric motor includes a housing, a stator fixed relative to the housing, a rotor, a brake assembly, a first bearing, and a second bearing. The rotor has a hub portion, a cylindrical portion, and a disk portion. The hub portion of the rotor has a first end, a second end, and a through hole therethrough. The brake assembly is fixed relative to the housing and configured to selectively couple the disk portion of the rotor to the housing. The first bearing is mounted between the first end of the hub portion of the rotor and the disk portion of the rotor. The second bearing is mounted between the second end of the hub portion of the rotor and the disk portion of the rotor.
    Type: Application
    Filed: April 17, 2020
    Publication date: March 3, 2022
    Inventors: Steven R. Huard, Travis J. Anderson, Kevin B. Henke, Joseph L. Dobmeier, John P. Blomberg, Justin O. Byers
  • Publication number: 20220059353
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Application
    Filed: November 8, 2021
    Publication date: February 24, 2022
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Publication number: 20220059352
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Application
    Filed: November 8, 2021
    Publication date: February 24, 2022
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Patent number: 11227943
    Abstract: A high electron mobility transistor (HEMT) and method of producing the same are provided. The HEMT includes a barrier layer formed on a GaN layer. The HEMT also includes a ZrO2 gate dielectric layer formed by either a ZTB precursor, a TDMA-Zr precursor, or both. The HEMT may also include a recess in the barrier layer in the gate region of the HEMT. The HEMTs may operate in an enhancement mode.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: January 18, 2022
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Virginia D. Wheeler, Karl D. Hobart, Francis J. Kub
  • Publication number: 20210389126
    Abstract: An improved method for evaluating GaN wafers. RMS analysis of wafer heights obtained by optical interferometric profilometry is combined with an extreme Studentized deviate (ESD) analysis to obtain a map of the wafer surface that more accurately identifies areas on the surface of a GaN wafer having defects that making those areas unsuitable for fabrication of a vertical electronic device thereon such as bumps and/or pits that can lower the breakdown voltage, increase the on-resistance, and increase the ideality factor.
    Type: Application
    Filed: June 11, 2021
    Publication date: December 16, 2021
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: James C. Gallagher, Travis J. Anderson, Jennifer K. Hite, Karl D. Hobart
  • Patent number: 11201058
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: December 14, 2021
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Publication number: 20210381127
    Abstract: A method for growing polycrystalline diamond films having engineered grain growth and microstructure. Grain growth of a polycrystalline diamond film on a substrate is manipulated by growing the diamond on a nanopatterned substrate having features on the order of the initial grain size of the diamond film. By growing the diamond on such nanopatterned substrates, the crystal texture of a polycrystalline diamond film can be engineered to favor the preferred <110> orientation texture, which in turn enhances the thermal conductivity of the diamond film.
    Type: Application
    Filed: August 24, 2021
    Publication date: December 9, 2021
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Tatyana I. Feygelson, Marko J. Tadjer, Travis J. Anderson, Andrew D. Koehler, Samuel Graham, JR., Mark Goorsky, Zhe Cheng, Luke Yates, Tingyu Bai, Yekan Wang
  • Publication number: 20210375680
    Abstract: Methods for obtaining a free-standing thick (>5 ?m) epitaxial material layer or heterostructure stack and for transferring the thick epitaxial layer or stack to an arbitrary substrate. A thick epitaxial layer or heterostructure stack is formed on an engineered substrate, with a sacrificial layer disposed between the epitaxial layer and the engineered substrate. When the sacrificial layer is removed, the epitaxial layer becomes a thick freestanding layer that can be transferred to an arbitrary substrate, with the remaining engineered substrate being reusable for subsequent material layer growth. In an exemplary case, the material layer is a GaN layer and can be selectively bonded to an arbitrary substrate to selectively produce a Ga-polar or an N-polar GaN layer.
    Type: Application
    Filed: May 24, 2021
    Publication date: December 2, 2021
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Marko J. Tadjer, Karl D. Hobart
  • Patent number: 11131039
    Abstract: A method for growing polycrystalline diamond films having engineered grain growth and microstructure. Grain growth of a polycrystalline diamond film on a substrate is manipulated by growing the diamond on a nanopatterned substrate having features on the order of the initial grain size of the diamond film. By growing the diamond on such nanopatterned substrates, the crystal texture of a polycrystalline diamond film can be engineered to favor the preferred <110> orientation texture, which in turn enhances the thermal conductivity of the diamond film.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: September 28, 2021
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Tatyana I. Feygelson, Marko J. Tadjer, Travis J. Anderson, Andrew D. Koehler, Samuel Graham, Jr., Mark Goorsky, Zhe Cheng, Luke Yates, Tingyu Bai, Yekan Wang
  • Publication number: 20210028020
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Application
    Filed: July 13, 2020
    Publication date: January 28, 2021
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Publication number: 20210005721
    Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.
    Type: Application
    Filed: September 15, 2020
    Publication date: January 7, 2021
    Inventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart
  • Publication number: 20200400578
    Abstract: A method for mapping and analyzing a GaN substrate to identify areas of the substrate suitable for fabrication of electronic devices thereon. Raman spectroscopy is performed over the surface of a GaN substrate to produce maps of the E2 and A1 peaks at a plurality of areas on the substrate surface, the E2 and A1 peaks being associated with known concentrations of defects and charge carriers, so that areas of the GaN substrate having relatively high resistivity or conductivity which make those areas suitable or unsuitable for fabrication of electronic devices can be identified. The devices can then be fabricated only on suitable areas of the substrate, or the size of the devices can be tailored to maximize the yield of devices fabricated thereon. Substrates not meeting a threshold level of defect and/or charge carrier concentration can be discarded without fabrication of poor-quality devices thereon.
    Type: Application
    Filed: June 19, 2020
    Publication date: December 24, 2020
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Jennifer K. Hite, James C. Gallagher, Karl D. Hobart
  • Patent number: 10777644
    Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: September 15, 2020
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart