Patents by Inventor Travis J. Anderson

Travis J. Anderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11131039
    Abstract: A method for growing polycrystalline diamond films having engineered grain growth and microstructure. Grain growth of a polycrystalline diamond film on a substrate is manipulated by growing the diamond on a nanopatterned substrate having features on the order of the initial grain size of the diamond film. By growing the diamond on such nanopatterned substrates, the crystal texture of a polycrystalline diamond film can be engineered to favor the preferred <110> orientation texture, which in turn enhances the thermal conductivity of the diamond film.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: September 28, 2021
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Tatyana I. Feygelson, Marko J. Tadjer, Travis J. Anderson, Andrew D. Koehler, Samuel Graham, Jr., Mark Goorsky, Zhe Cheng, Luke Yates, Tingyu Bai, Yekan Wang
  • Publication number: 20210028020
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Application
    Filed: July 13, 2020
    Publication date: January 28, 2021
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Publication number: 20210005721
    Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.
    Type: Application
    Filed: September 15, 2020
    Publication date: January 7, 2021
    Inventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart
  • Publication number: 20200400578
    Abstract: A method for mapping and analyzing a GaN substrate to identify areas of the substrate suitable for fabrication of electronic devices thereon. Raman spectroscopy is performed over the surface of a GaN substrate to produce maps of the E2 and A1 peaks at a plurality of areas on the substrate surface, the E2 and A1 peaks being associated with known concentrations of defects and charge carriers, so that areas of the GaN substrate having relatively high resistivity or conductivity which make those areas suitable or unsuitable for fabrication of electronic devices can be identified. The devices can then be fabricated only on suitable areas of the substrate, or the size of the devices can be tailored to maximize the yield of devices fabricated thereon. Substrates not meeting a threshold level of defect and/or charge carrier concentration can be discarded without fabrication of poor-quality devices thereon.
    Type: Application
    Filed: June 19, 2020
    Publication date: December 24, 2020
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Jennifer K. Hite, James C. Gallagher, Karl D. Hobart
  • Patent number: 10777644
    Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: September 15, 2020
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart
  • Patent number: 10494738
    Abstract: A method of growing crystalline materials on two-dimensional inert materials comprising functionalizing a surface of a two-dimensional inert material, growing a nucleation layer on the functionalized surface, and growing a crystalline material. A crystalline material grown on a two-dimensional inert material made from the process comprising functionalizing a surface of a two-dimensional inert material, growing a nucleation layer on the functionalized surface, and growing a crystalline material.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: December 3, 2019
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Neeraj Nepal, Virginia Wheeler, Charles R. Eddy, Jr., Francis J. Kub, Travis J. Anderson, Michael A. Mastro, Rachael L. Myers-Ward, Sandra C. Hangarter
  • Publication number: 20190360117
    Abstract: A method for growing polycrystalline diamond films having engineered grain growth and microstructure. Grain growth of a polycrystalline diamond film on a substrate is manipulated by growing the diamond on a nanopatterned substrate having features on the order of the initial grain size of the diamond film. By growing the diamond on such nanopatterned substrates, the crystal texture of a polycrystalline diamond film can be engineered to favor the preferred <110> orientation texture, which in turn enhances the thermal conductivity of the diamond film.
    Type: Application
    Filed: May 23, 2019
    Publication date: November 28, 2019
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Tatyana I. Feygelson, Marko J. Tadjer, Travis J. Anderson, Andrew D. Koehler, Sam Graham, JR., Mark Goorsky, Zhe Cheng, Luke Yates, Tingyu Bai, Yekan Wang
  • Publication number: 20190305157
    Abstract: An extreme ultraviolet (EUV) photodetector is formed by providing a substrate having a first doping type of material; forming a photodetector body layer having the first doping type of material over the substrate, wherein the photodetector body layer includes a carrier collection region and a potential barrier maximum level; and forming a carrier collection material layer over the photodetector body layer. The carrier collection region includes a region between the potential barrier maximum level and the carrier collection material layer. The potential barrier maximum level includes a height within the photodetector body layer that prevents photogenerated carriers created at a depth deeper than the potential barrier maximum level from transporting to the carrier collection region and the carrier collection material layer.
    Type: Application
    Filed: April 2, 2018
    Publication date: October 3, 2019
    Inventors: Francis J. Kub, Travis J. Anderson, Karl D. Hobart, Andrew D. Koehler
  • Patent number: 10424643
    Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: September 24, 2019
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
  • Publication number: 20190252501
    Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.
    Type: Application
    Filed: April 23, 2019
    Publication date: August 15, 2019
    Inventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
  • Patent number: 10312175
    Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: June 4, 2019
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
  • Publication number: 20190161887
    Abstract: A method of growing crystalline materials on two-dimensional inert materials comprising functionalizing a surface of a two-dimensional inert material, growing a nucleation layer on the functionalized surface, and growing a crystalline material. A crystalline material grown on a two-dimensional inert material made from the process comprising functionalizing a surface of a two-dimensional inert material, growing a nucleation layer on the functionalized surface, and growing a crystalline material.
    Type: Application
    Filed: January 28, 2019
    Publication date: May 30, 2019
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Neeraj Nepal, Virginia Wheeler, Charles R. Eddy, JR., Francis J. Kub, Travis J. Anderson, Michael A. Mastro, Rachael L. Myers-Ward, Sandra C. Hangarter
  • Publication number: 20190157181
    Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.
    Type: Application
    Filed: April 5, 2018
    Publication date: May 23, 2019
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
  • Patent number: 10266963
    Abstract: A method of growing crystalline materials on two-dimensional inert materials comprising functionalizing a surface of a two-dimensional inert material, growing a nucleation layer on the functionalized surface, and growing a crystalline material. A crystalline material grown on a two-dimensional inert material made from the process comprising functionalizing a surface of a two-dimensional inert material, growing a nucleation layer on the functionalized surface, and growing a crystalline material.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: April 23, 2019
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Neeraj Nepal, Virginia D. Wheeler, Charles R. Eddy, Jr., Francis J. Kub, Travis J. Anderson, Michael A. Mastro, Rachael L. Myers-Ward, Sandra C. Hangarter
  • Patent number: 10229839
    Abstract: An method of annealing by: providing a substrate having a III-nitride, sapphire, silicon, diamond, gallium arsenide, or silicon carbide surface; depositing a layer of a transition metal nitride directly on the surface; and annealing the substrate at at least 900° C. in an oxygen-free environment. An article having: a substrate having a III-nitride, sapphire, silicon, diamond, gallium arsenide, or silicon carbide surface; and a layer of a transition metal nitride directly on the surface.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: March 12, 2019
    Assignee: The United States of America, as Represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Boris N. Feygelson, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Jordan Greenlee
  • Publication number: 20180374944
    Abstract: A high electron mobility transistor (HEMT) and method of producing the same are provided. The HEMT includes a barrier layer formed on a GaN layer. The HEMT also includes a ZrO2 gate dielectric layer formed by either a ZTB precursor, a TDMA-Zr precursor, or both. The HEMT may also include a recess in the barrier layer in the gate region of the HEMT. The HEMTs may operate in an enhancement mode.
    Type: Application
    Filed: June 25, 2018
    Publication date: December 27, 2018
    Inventors: Travis J. Anderson, Virginia D. Wheeler, Karl D. Hobart, Francis J. Kub
  • Patent number: 10158009
    Abstract: A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region wherein the base region comprises one or more sheets of graphene and wherein the base region is intermediate the electron injection region and the electron collection region and forms electrical interfaces therewith.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: December 18, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Andrew D. Koehler
  • Publication number: 20180315820
    Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.
    Type: Application
    Filed: April 27, 2018
    Publication date: November 1, 2018
    Inventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart
  • Patent number: 10002958
    Abstract: Systems and method are provided for depositing metal on GaN transistors after gate formation using a metal nitride Schottky gate. Embodiments of the present disclosure use a “diamond last” process using thermally stable metal nitride gate electrodes to enable thicker heat spreading films and facilitate process integration. In an embodiment, the “diamond last” process with high thermal conductivity diamond is enabled by the integration of thermally stable metal-nitride gate electrodes.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: June 19, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Virginia D. Wheeler, Andrew D. Koehler, Karl D. Hobart
  • Patent number: 9991354
    Abstract: Systems and methods are provided that enable the production of semiconductor devices having a metal nitride layer in direct contact with a semiconductor layer to form a Schottky diode, such as a TiN gate on an AlGaN/GaN high electron mobility transistor (HEMT). Metal nitrides offer exceptional thermal stability and a lower diffusion coefficient. Technology enabled by embodiments of the present disclosure improves the reliability of GaN-based microwave power transistors.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: June 5, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Virginia D. Wheeler, David Shahin, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Marko J. Tadjer