Patents by Inventor Trung (Tim) Trinh

Trung (Tim) Trinh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10148610
    Abstract: A system, method, and computer-readable medium are disclosed for using Zero Configuration Networking (ZeroConf) to automate the discovery of the Internet Protocol (IP) network address of a remote access controller (RAC). A RAC service associated with a networking device is registered programmatically or as a result of receiving user input to a command line interface. Available services that include the registered RAC service are browsed, followed by resolving the registered RAC service to an IP address, which is then discovered. The discovered IP address is then displayed within a user interface (UI) window.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: December 4, 2018
    Assignee: DELL PRODUCTS L.P.
    Inventors: Trung M. Tran, Muhammad Rahman
  • Publication number: 20180333436
    Abstract: An object of the present invention is to provide novel mesenchymal stem cells demonstrating superior therapeutic effects against various diseases, a novel pharmaceutical composition containing these mesenchymal stem cells, and a method for preparing the same. The present invention relates to ROR1-positive mesenchymal stem cells. The ROR1-positive mesenchymal stem cells are preferably positive for CD29, CD73, CD90, CD105 and CD166 and are derived from umbilical cord or adipose tissue.
    Type: Application
    Filed: August 29, 2016
    Publication date: November 22, 2018
    Applicant: ROHTO PHARMACEUTICAL CO., LTD.
    Inventors: Yoshifumi Ikeyama, Hiroyuki Nishida, Tomohiro Tsuda, Eiko Uno, Masayo Yumoto, Kazuma Suda, Mihoko Yoshino, Xuan Trung Ngo
  • Patent number: 10133676
    Abstract: Embodiments related to a cache memory that supports tagless addressing are disclosed. Some embodiments receive a request to perform a memory access, wherein the request includes a virtual address. In response, the system performs an address-translation operation, which translates the virtual address into both a physical address and a cache address. Next, the system uses the physical address to access one or more levels of physically addressed cache memory, wherein accessing a given level of physically addressed cache memory involves performing a tag-checking operation based on the physical address. If the access to the one or more levels of physically addressed cache memory fails to hit on a cache line for the memory access, the system uses the cache address to directly index a cache memory, wherein directly indexing the cache memory does not involve performing a tag-checking operation and eliminates the tag storage overhead.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: November 20, 2018
    Assignee: Rambus Inc.
    Inventors: Hongzhong Zheng, Trung A. Diep
  • Publication number: 20180328956
    Abstract: A method and corresponding device are provided for determining a flow speed in a fluid conduit. The fluid conduit is provided with first, second and third ultrasonic transducers, wherein respective connection lines between transducers extend outside of a symmetry axis of the fluid conduit. First and second measuring signals are applied to the first ultrasonic transducer and received at the second and the third ultrasonic transducer, respectively. The measuring signals comprise a respective reversed signal portion with respect to time of a response signal. Respective first and second response signals are measured and the flow speed is derived from at least one of the first and second response signals.
    Type: Application
    Filed: July 20, 2018
    Publication date: November 15, 2018
    Inventors: Thomas Werner HIES, Juergen Heinz-Friedrich SKRIPALLE, Trung Dung LUONG, Claus-Dieter OHL
  • Patent number: 10120716
    Abstract: Mechanisms for improving computing system performance by a processor device. System resources are organized into a plurality of groups. Each of the plurality of groups is assigned one of a plurality of predetermined task pools. Each of the predetermined task pools has a plurality of tasks. Each of the plurality of groups corresponds to at least one physical boundary of the system resources such that a speed of an execution of those of the plurality of tasks for a particular one of the plurality of predetermined task pools is optimized by a placement of an association with the at least one physical boundary and the plurality of groups.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: November 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Seamus J. Burke, Lokesh M. Gupta, Clint A. Hardy, Matthew J. Kalos, Trung N. Nguyen, Karl A. Nielsen, Louis A. Rasor, David B. Whitworth
  • Publication number: 20180314432
    Abstract: Provided are a computer program product, system, and method for invoking Input/Output (I/O) threads on processors to demote tracks from a cache. An Input/Output (I/O) thread, executed by a processor, processes I/O requests directed to tracks in the storage by accessing the tracks in the cache. After processing at least one I/O request, the I/O thread determines whether a number of free cache segments in the cache is below a free cache segment threshold. The I/O thread processes a demote ready list, indicating tracks eligible to demote from the cache, to demote tracks from the cache in response to determining that the number of free cache segments is below the free cache segment threshold. The I/O thread continues to process I/O requests directed to tracks from the storage stored in the cache after processing the demote ready list to demote tracks in the cache.
    Type: Application
    Filed: July 3, 2018
    Publication date: November 1, 2018
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
  • Patent number: 10114608
    Abstract: A multi-mode media system operable at a given time in one of a first or a second mode, selectively, the first mode comprising operation to access a media source co-housed with or connected to and operationally integrated with the media system and configured to stream media content to the multi-mode media system for playing by the media system, and the second mode comprising operation of the media system for controlling over a network a media source remote from the multi-mode media system for outputting media content on an output device separate from the multi-mode media system, the media system not being operable in both modes simultaneously nor operable exclusively only in a single one of such modes.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: October 30, 2018
    Assignee: Chestnut Hill Sound, Inc.
    Inventors: Steven Krampf, Evan B. Ross, Trung Quoc Phung
  • Patent number: 10114633
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: October 30, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10104997
    Abstract: A motor drive system for operating a mechanism for raising and lowering window coverings includes a motor operating under electrical power and an electrically powered drive system. The motor drive system advances a continuous cord loop in response to positional commands from a controller. An input-output device includes a capacitive touch strip that receives user inputs along an input axis, and an LEDs strip aligned with the input axis. A group mode module communicates the positional commands to other motor drive systems within an identified group to operate respective other mechanisms of the other motor drive systems. A set control module enables user calibration of a top position and a bottom position of travel of the window covering. The input-output device extends vertically on the exterior of a housing for the motor drive system, and the housing supports input buttons of the group mode module and the set control module.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: October 23, 2018
    Assignee: AXIS Labs Inc.
    Inventors: Trung Duc Pham, Alan Wing Hor Cheng, Marc Rashad Bishara
  • Patent number: 10102140
    Abstract: A cache memory includes cache lines to store information. The stored information is associated with physical addresses that include first, second, and third distinct portions. The cache lines are indexed by the second portions of respective physical addresses associated with the stored information. The cache memory also includes one or more tables, each of which includes respective table entries that are indexed by the first portions of the respective physical addresses. The respective table entries in each of the one or more tables are to store indications of the second portions of respective physical addresses associated with the stored information.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: October 16, 2018
    Assignee: RAMBUS INC.
    Inventors: Trung Diep, Hongzhong Zheng
  • Patent number: 10094838
    Abstract: Described herein are methods, compositions and articles of manufacture involving neutral conjugated polymers including methods for synthesis of neutral conjugated water-soluble polymers with linkers along the polymer main chain structure and terminal end capping units. Such polymers may serve in the fabrication of novel optoelectronic devices and in the development of highly efficient biosensors. The invention further relates to the application of these polymers in assay methods.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: October 9, 2018
    Assignee: Sirigen II Limited
    Inventors: Brent S. Gaylord, Glenn P. Bartholomew, Russell A. Baldocchi, Janice W. Hong, William H. Huisman, Yongchao Liang, Trung Nguyen, Lan T. Tran, Jean M. Wheeler, Adrian Charles Vernon Palmer, Frank Peter Uckert
  • Patent number: 10097953
    Abstract: An electronic system provides various features and functionality for managing resources. An alert may be sent when a mobile device crosses a geo-fence. The alert may describe how much of the resource is available for the types of transaction that are likely to occur within the geo-fence. The alert may request or confirm the allocation of the transaction to a resource pool or suggest alternative transactions.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: October 9, 2018
    Assignee: United Services Automobile Association (USAA)
    Inventors: Wayne Hartman, Nathan Mahoney, Hoang Trung Vo, Joshua Samuel Leonard, Michal Leighton Van Cleave, Jeffrey Young, Luke James Gradeless, Brandon K. Esplin
  • Patent number: 10097484
    Abstract: Provided are a computer program product, system, and method for using send buffers and receive buffers for sending messages among nodes in a network. A send buffer is provided for each of at least one receiving node comprising one of the nodes to which messages are sent. Each of the receiving nodes includes at least one receive buffer to receive messages from the send buffer at the sending node. A determination is made of a buffer entry for a send buffer and receive buffer pair that is available for use. Indication is made of the message in the determined buffer entry of the send buffer. The message is sent from the send buffer to the receiving node indicating the determined buffer entry in which the message is indicated to cause the receiving node to include the message in the indicated buffer entry in the receive buffer.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: October 9, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Trung N. Nguyen, Louis A. Rasor, Juan J. Ruiz
  • Publication number: 20180285259
    Abstract: Embodiments are disclosed for replacing one or more pages of a memory to level wear on the memory. In one embodiment, a system includes a page fault handling function and a memory address mapping function. Upon receipt of a page fault, the page fault handling function maps an evicted virtual memory address to a stressed page and maps a stressed virtual memory address to a free page using the memory address mapping function.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 4, 2018
    Inventors: Trung Diep, Eric Linstadt
  • Publication number: 20180286052
    Abstract: The present invention is a semi-automated process to extract object motion and attributes from utilizing a remote sensing methodology using Earth Observation data from single pass satellite imagery. Many single pass satellite sensors collect imagery that include a panchromatic and multispectral image with a slight temporal offset. The method of the present invention performs image processing, object segmentation, object measurement, image normalization and image matching and velocity calculation to extract physical attributes of the object, object location, and object motion.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 4, 2018
    Inventors: Steven MCARDLE, Trung PHAM, Jian YANG, Mehdi HOSSEINI
  • Publication number: 20180276144
    Abstract: Provided are a computer program product, system, and method for determining cores to assign to cache hostile tasks. A computer system has a plurality of cores. Each core is comprised of a plurality of processing units and at least one cache memory shared by the processing units on the core to cache data from a memory. A task is processed to determine one of the cores on which to dispatch the task. A determination is made as to whether the processed task is classified as cache hostile. A task is classified as cache hostile when the task accesses more than a threshold number of memory address ranges in the memory. The processed task is dispatched to at least one of the cores assigned to process cache hostile tasks.
    Type: Application
    Filed: May 30, 2018
    Publication date: September 27, 2018
    Inventors: Matthew G. Borlick, Lokesh M Gupta, Trung N. Nguyen
  • Patent number: 10082958
    Abstract: Provided are a computer program product, system, and method for invoking Input/Output (I/O) threads on processors to demote tracks from a cache. An Input/Output (I/O) thread, executed by a processor, processes I/O requests directed to tracks in the storage by accessing the tracks in the cache. After processing at least one I/O request, the I/O thread determines whether a number of free cache segments in the cache is below a free cache segment threshold. The I/O thread processes a demote ready list, indicating tracks eligible to demote from the cache, to demote tracks from the cache in response to determining that the number of free cache segments is below the free cache segment threshold. The I/O thread continues to process I/O requests directed to tracks from the storage stored in the cache after processing the demote ready list to demote tracks in the cache.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: September 25, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
  • Publication number: 20180267956
    Abstract: A computer implemented method and system identifies correct structured reading-order sequence of text segments that are extracted from a file structured in a portable document format. A probabilistic language model is generated from a large text corpus to comprise observed word sequence patterns for a given language. The language model measures whether splicing together a first text segment with another continuation text segment results in a phrase that is more likely than a phrase resulting from splicing together the first text segment with other continuation text segments. Sets of text segments are provided to the probabilistic model, where the sets of text segments comprise a first set including the first text segment and a first continuation text segment. A second set includes the first text segment and a second continuation text segment. A score is obtained for each set of text segments. The score is indicative of a likelihood of the set providing a correct structured reading-order sequence.
    Type: Application
    Filed: March 17, 2017
    Publication date: September 20, 2018
    Applicant: Adobe Systems Incorporated
    Inventors: Walter Chang, Trung Bui, Pranjal Daga, Michael Kraley, Hung Bui
  • Patent number: 10079892
    Abstract: Disclosed herein are systems, methods, and non-transitory computer-readable storage media for suggesting and inserting automated assistants in a graphical user interface for managing communication sessions. A system for suggesting an automated assistant generates a first vector describing a current context of a current communication session, and generates a comparison of the first vector and a second vector associated with a past context of an automated assistant in a past communication session. Then, if the comparison exceeds a similarity threshold, the system suggests the automated assistant to at least one user in the current communication session. Optionally, the system can predictively insert the automated assistant in a communication session if the comparison exceeds a similarity threshold. The graphical user interface for managing communication sessions displays automated assistants in a same manner as human participants.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: September 18, 2018
    Assignee: Avaya Inc.
    Inventors: Trung Dinh-Trong, Birgit Geppert, Frank Roessler
  • Publication number: 20180254443
    Abstract: A battery packaging arrangement. The battery packaging arrangement includes a first base configured to be fixedly coupled to a frame of a vehicle, a second base moveable with respect to the first base, and a plurality of cooling columns inter-disposed between the first base and the second base. Each of the plurality of cooling columns includes a plurality of receiving surfaces for receiving a corresponding plurality of battery cells. Each of the plurality of cooling columns is further configured to deform when the second base in response to a force moves towards the first base.
    Type: Application
    Filed: March 2, 2018
    Publication date: September 6, 2018
    Applicant: Purdue Research Foundation
    Inventors: Hangjie Liao, Waterloo Tsutsui, Trung N. Nguyen, Thomas Heinrich Siegmund, Weinong Wayne Chen