Patents by Inventor Trung (Tim) Trinh

Trung (Tim) Trinh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180138992
    Abstract: Systems, methods, and devices for evaluation of an earth formation intersected by a borehole using a logging tool. Methods include performing EM logging in a borehole intersecting an earth formation using a measurement signal from an antenna system in the borehole, the measurement signal dependent upon a parameter of interest of the formation and at least one antenna system parameter of the antenna system, comprising feeding a calibration signal into a signal path of the antenna system to generate a resultant signal; estimating at least one value of the at least one antenna system parameter by using the resultant signal; and performing further logging operations in dependence upon the at least one value of the at least one antenna system parameter. The calibration signal comprises at least two calibration subsignals with a first calibration subsignal having a first frequency and a second calibration subsignal having a second frequency.
    Type: Application
    Filed: November 17, 2016
    Publication date: May 17, 2018
    Applicant: BAKER HUGHES INCORPORATED
    Inventors: KERSTEN KRAFT, TRUNG H. LE
  • Publication number: 20180136986
    Abstract: Provided are techniques for lock profiling tool to identify code bottlenecks. A lock spin duration for a lock is determined. It is determined that the lock spin duration is greater than a lock trace threshold. The lock spin duration is classified into a time duration bucket. It is determining whether the lock is found in a list of locks for the time duration bucket. In response to determining that the lock is found in the list of locks, a lock count for the lock is incremented by one. In response to determining that the lock is not found in the list of locks, an entry for the lock is added in the list of locks for the time duration bucket and the lock count for the lock is initialized to one. A total spin duration time for the lock is updated by the lock spin duration.
    Type: Application
    Filed: November 14, 2016
    Publication date: May 17, 2018
    Inventors: Trung N. Nguyen, Louis A. Rasor
  • Patent number: 9971508
    Abstract: Provided are a computer program product, system, and method for invoking Input/Output (I/O) threads on processors to demote tracks from a cache. An Input/Output (I/O) thread, executed by a processor, processes I/O requests directed to tracks in the storage by accessing the tracks in the cache. After processing at least one I/O request, the I/O thread determines whether a number of free cache segments in the cache is below a free cache segment threshold. The I/O thread processes a demote ready list, indicating tracks eligible to demote from the cache, to demote tracks from the cache in response to determining that the number of free cache segments is below the free cache segment threshold. The I/O thread continues to process I/O requests directed to tracks from the storage stored in the cache after processing the demote ready list to demote tracks in the cache.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: May 15, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
  • Patent number: 9971689
    Abstract: Provided are a computer program product, system, and method for invoking Input/Output (I/O) threads and demote threads on processors to demote tracks from a cache. An Input/Output (I/O) thread, executed by a processor, processes I/O requests directed to tracks from the storage stored in the cache. A demote thread, executed by the processor, processes a demote ready list, indicating tracks eligible to demote from cache, to select tracks to demote from the cache to free cache segments in the cache. After processing a number of I/O requests, the I/O thread processes the demote ready list to demote tracks from the cache in response to determining that a number of free cache segments in the cache is below a free cache segment threshold.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: May 15, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
  • Publication number: 20180128560
    Abstract: Processes for controlling the rate and temperature of cooling fluid through a heat exchange zone in, for example, an alkylation reactor using an ionic liquid catalyst. A cooling fluid system may be used to provide the cooling fluid which includes a chiller and a reservoir. The cooling fluid may pass from the reservoir through the heat exchange zone. A bypass line may be used to pass a portion of the cooling fluid around the heat exchange zone. The amount of cooling fluid may be adjusted, with a valve, based upon the temperature of the cooled process fluid flowing out of the heat exchange zone. Some of the cooling fluid from the chiller may be circulated back to the chiller in a chiller loop.
    Type: Application
    Filed: December 15, 2017
    Publication date: May 10, 2018
    Inventors: Gregory J. Schrad, James G. Hagen, Sean G. Mueller, Trung Pham, Zhanping Xu
  • Publication number: 20180121256
    Abstract: A computational device maintains a spinlock for exclusive access of a resource by a process of a plurality of processes. In response to determining by the process that a turn for securing the spinlock has not arrived for the process, a sleep duration is determined for the process, prior to making a next attempt to secure the spinlock.
    Type: Application
    Filed: November 3, 2017
    Publication date: May 3, 2018
    Inventors: Seamus J. Burke, Trung N. Nguyen, Louis A. Rasor
  • Publication number: 20180122605
    Abstract: An electromechanical power switch device and methods thereof. At least some of the illustrative embodiments are devices including a semiconductor substrate, at least one integrated circuit device on a front surface of the semiconductor substrate, an insulating layer on the at least one integrated circuit device, and an electromechanical power switch on the insulating layer. By way of example, the electromechanical power switch may include a source and a drain, a body region disposed between the source and the drain, and a gate including a switching metal layer. In some embodiments, the body region includes a first body portion and a second body portion spaced a distance from the first body portion and defining a body discontinuity therebetween. Additionally, in various examples, the switching metal layer may be disposed over the body discontinuity.
    Type: Application
    Filed: October 16, 2017
    Publication date: May 3, 2018
    Inventors: Kiyoshi Mori, Ziep Tran, Giang Trung Dao, Michael Edward Ramon
  • Publication number: 20180113744
    Abstract: A plurality of processing entities of a processor complex is maintained, wherein each processing entity has a local cache and the processor complex has a shared cache and a shared memory. One of the plurality of processing entities is allocated for execution of a critical task. In response to the allocating of one of the plurality of processing entities for the execution of the critical task, other processing entities of the plurality of processing entities are folded. The critical task utilizes the local cache of the other processing entities that are folded, the shared memory, and the shared cache, in addition to the local cache of the processing entity allocated for the execution of the critical task.
    Type: Application
    Filed: October 24, 2016
    Publication date: April 26, 2018
    Inventors: Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
  • Publication number: 20180113145
    Abstract: A method and corresponding device are provided for determining a flow speed in a fluid conduit. The fluid conduit is provided with first, second and third ultrasonic transducers, wherein respective connection lines between transducers extend outside of a symmetry axis of the fluid conduit. First and second measuring signals are applied to the first ultrasonic transducer and received at the second and the third ultrasonic transducer, respectively. The measuring signals comprise a respective reversed signal portion with respect to time of a response signal. Respective first and second response signals are measured and the flow speed is derived from at least one of the first and second response signals.
    Type: Application
    Filed: December 15, 2017
    Publication date: April 26, 2018
    Inventors: Thomas Werner HIES, Juergen Heinz-Friedrich SKRIPALLE, Trung Dung LUONG, Claus-Dieter OHL
  • Publication number: 20180113737
    Abstract: A determination is made as to whether a plurality of processing entities in a processor complex exceeds a predetermined threshold number. In response to determining that the plurality of processing entities exceeds the predetermined threshold number, a processing entity of the plurality of processing entities is reserved for exclusive execution of critical tasks. In response to determining that the plurality of processing entities does not exceed the predetermined threshold number, and in response to receiving a task that is a critical task for execution, a determination is made as to which processing entity of the plurality of processing entities has a least amount of processing remaining to be performed for currently scheduled tasks. In response to moving tasks queued on the determined processing entity to other processing entities, the critical task is scheduled for execution on the determined processing entity.
    Type: Application
    Filed: October 24, 2016
    Publication date: April 26, 2018
    Inventors: Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
  • Publication number: 20180114997
    Abstract: A gas diffusion layer having a first major surface and a second major surface which is positioned opposite to said first major surface and an interior between said first and second major surfaces is formed. The gas diffusion layer comprises a porous carbon substrate which is directly fluorinated in the interior and is substantially free of fluorination on at least one of the first major surfaces or the second major surfaces, and preferably both surfaces. The gas diffusion layer may be formed using protective sandwich process during direct fluorination or by physically or chemically removing the C—F atomic layer at the major surfaces, for example by physical plasma etching or chemical reactive ion etching.
    Type: Application
    Filed: November 17, 2017
    Publication date: April 26, 2018
    Inventors: TRUNG VAN NGUYEN, XUHAI WANG
  • Patent number: 9952982
    Abstract: Provided are a computer program product, system, and method for invoking demote threads on processors to demote tracks from a cache. A plurality of demote ready lists indicate tracks eligible to demote from the cache. In response to determining that a number of free cache segments in the cache is below a free cache segment threshold, a determination is made of a number of demote threads to invoke on processors based on the number of free cache segments and the free cache segment threshold. The determined number of demote threads are invoked to demote tracks in the cache indicated in the demote ready lists, wherein each invoked demote thread processes one of the demote ready lists to select tracks to demote from the cache to free cache segments in the cache.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: April 24, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
  • Publication number: 20180107357
    Abstract: A controller for controlling the display of secondary digital content displayed in an overlay above a primary video stream. The controller includes a touch interface device, a processor, and a memory storing non-transitory instructions. These instructions, when executed, can include (i) detecting a first input gesture by a user on the touch interface device, (ii) in response to detecting the first input gesture, selecting an application for display, (iii) detecting a second input gesture by the user on the touch interface device, (iv) in response to detecting the second input gesture, scrolling through a currently-displayed layer of the selected application displayed, (v) detecting a third input gesture by the user on the touch interface device, and (vi) in response to detecting the third input gesture, scrolling between layers of the selected application in a simulated Z-space.
    Type: Application
    Filed: December 15, 2017
    Publication date: April 19, 2018
    Inventors: Dale Alan HERIGSTAD, Nam Hoai DO, Nhan Minh DANG, Hieu Trung TRAN, Quang Sy DINH, Thang Viet NGUYEN, Long Hai NGUYEN, Linh Chi NGUYEN
  • Publication number: 20180106812
    Abstract: Described herein are methods, compositions and articles of manufacture involving neutral conjugated polymers including methods for synthesis of neutral conjugated water-soluble polymers with linkers along the polymer main chain structure and terminal end capping units. Such polymers may serve in the fabrication of novel optoelectronic devices and in the development of highly efficient biosensors. The invention further relates to the application of these polymers in assay methods.
    Type: Application
    Filed: October 31, 2017
    Publication date: April 19, 2018
    Inventors: Brent S. GAYLORD, Glenn P. BARTHOLOMEW, Russell A. BALDOCCHI, Janice W. HONG, William H. HUISMAN, Yongchao LIANG, Trung NGUYEN, Lan T. TRAN, Jean M. WHEELER, Adrian Charles Vernon PALMER, Frank Peter UCKERT
  • Publication number: 20180107512
    Abstract: In one embodiment, performance-based multi-mode task dispatching for high temperature avoidance in accordance with the present description, includes selecting processor cores as available to receive a dispatched task. Tasks are dispatched to a set of available processor cores for processing in a performance-based dispatching mode. If monitored temperature rises above a threshold temperature value, task dispatching logic switches to a thermal-based dispatching mode. If a monitored temperature falls below another threshold temperature value, dispatching logic switches back to the performance-based dispatching mode. If a monitored temperature of an individual processor core rises above a threshold temperature value, the processor core is redesignated as unavailable to receive a dispatched task. If the temperature of an individual processor core falls below another threshold temperature value, the processor core is redesignated as available to receive a dispatched task.
    Type: Application
    Filed: August 2, 2017
    Publication date: April 19, 2018
    Inventors: Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
  • Publication number: 20180107449
    Abstract: A multi-mode media system operable at a given time in one of a first or a second mode, selectively, the first mode comprising operation to access a media source co-housed with or connected to and operationally integrated with the media system and configured to stream media content to the multi-mode media system for playing by the media system, and the second mode comprising operation of the media system for controlling over a network a media source remote from the multi-mode media system for outputting media content on an output device separate from the multi-mode media system, the media system not being operable in both modes simultaneously nor operable exclusively only in a single one of such modes.
    Type: Application
    Filed: December 18, 2017
    Publication date: April 19, 2018
    Inventors: Steven Krampf, Evan B. Ross, Trung Quoc Phung
  • Patent number: 9947119
    Abstract: Various embodiments provide a computer-implemented system and method providing a user interface framework for viewing large scale graphs. An example embodiment includes obtaining graph data including information related to a plurality of nodes, the plurality of nodes corresponding to search queries performed on a particular host site; constructing a plurality of sub-graphs, the sub-graphs being clusters of search results that are formed based on an amount of overlap among the search results produced from the search queries; rendering the graph by displaying each of the plurality of nodes at a respective absolute position within the graph and generating a plurality of tiles representing images of the plurality of sub-graphs; and displaying a sub-graph image corresponding to a selected position and zoom level.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: April 17, 2018
    Assignee: eBay Inc.
    Inventors: Roopnath Grandhi, Hill Trung Nguyen, Neelakantan Sundaresan
  • Patent number: 9945928
    Abstract: Systems and methods can support a computational signal processing architecture for electromagnetic signature analysis and threat detection. A plurality of sensor antennas can couple a radio frequency signal into a radio receiver. The radio receiver can generate digital samples of the signal. A raw signal analysis engine can identify signal features within the digital samples, generate signal feature vectors from the identified signal features, decode signal content from the signal feature vectors, and transmit the signal feature vectors into a signal feature network. The signal feature vectors may be aggregated from the signal feature network into a signal aggregation and analysis engine. The signal aggregation and analysis engine can refine feature vectors through processing such as identifying wireless attacks according to the signal features within the signal feature vectors. One or more operator interfaces and one or more analysis databases may support these operations.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: April 17, 2018
    Assignee: Bastille Networks, Inc.
    Inventors: Robert John Baxley, Trung Dinh, Christopher Jay Rouland, Michael Thomas Engle
  • Publication number: 20180101414
    Abstract: Provided are a computer program product, system, and method for managing processor threads of a plurality of processors. In one embodiment, a parameter of performance of the computing system is measured, and the configurations of one or more processor nodes are dynamically adjusted as a function of the measured parameter of performance. In this manner, the number of processor threads being concurrently executed by the plurality of processor nodes of the computing system may be dynamically adjusted in real time as the system operates to improve the performance of the system as it operates under various operating conditions. It is appreciated that systems employing processor thread management in accordance with the present description may provide other features in addition to or instead of those described herein, depending upon the particular application.
    Type: Application
    Filed: December 13, 2017
    Publication date: April 12, 2018
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
  • Patent number: 9937601
    Abstract: A retaining ring can be shaped by machining or lapping the bottom surface of the ring to form a shaped profile in the bottom surface. The bottom surface of the retaining ring can include flat, sloped and curved portions. The lapping can be performed using a machine that dedicated for use in lapping the bottom surface of retaining rings. During the lapping the ring can be permitted to rotate freely about an axis of the ring. The bottom surface of the retaining ring can have curved or flat portions.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: April 10, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Hung Chih Chen, Steven M. Zuniga, Charles C. Garretson, Douglas R. McAllister, Jian Lin, Stacy Meyer, Sidney P. Huey, Jeonghoon Oh, Trung T. Doan, Jeffrey P. Schmidt, Martin S. Wohlert, Kerry F. Hughes, James C. Wang, Danny Cam Toan Lu, Romain Beau De Lamenie, Venkata R. Balagani, Aden Martin Allen, Michael Jon Fong