Patents by Inventor Tsang-Yu Liu
Tsang-Yu Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9997473Abstract: A chip package including a substrate is provided. The substrate has a first surface and a second surface opposite thereto. The substrate includes a sensing or device region which is adjacent to the first surface. A recess is in the substrate. The recess extends from the second surface towards the first surface, and vertically overlaps the sensing or device region. A redistribution layer is electrically connected to the sensing or device region, and extends from the second surface into the recess. A method of forming the chip package is also provided.Type: GrantFiled: January 18, 2017Date of Patent: June 12, 2018Assignee: XINTEC INC.Inventors: Yen-Shih Ho, Tsang-Yu Liu, Chia-Sheng Lin, Chaung-Lin Lai
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Patent number: 9978788Abstract: A method for forming a photosensitive module is provided. The method includes providing a sensing device. The sensing device includes a conducting pad located on a substrate. A first opening penetrates the substrate and exposes the conducting pad. A redistribution layer is in the first opening to electrically connect to the conducting pad. A cover plate is located on the substrate and covers the conducting pad. The method also includes removing the cover plate of the sensing device. The method further includes bonding the sensing device to a circuit board after the removal of the cover plate. The redistribution layer in the first opening is exposed and faces the circuit board. In addition, the method includes mounting an optical component corresponding to the sensing device on the circuit board. A photosensitive module formed by the method is also provided.Type: GrantFiled: January 25, 2016Date of Patent: May 22, 2018Assignee: XINTEC INC.Inventors: Yen-Shih Ho, Tsang-Yu Liu, Chi-Chang Liao
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Patent number: 9966400Abstract: A method for forming a photosensitive module is provided. The method includes providing a sensing device. The sensing device includes a substrate having a first surface and a second surface opposite thereto. A conducting pad is located on the first surface. A first opening penetrates the substrate and exposes the conducting pad. A redistribution layer is in the first opening to electrically connect to the conducting pad. A cover plate is located on the first surface and covers the conducting pad. The method also includes bonding the sensing device to a circuit board. The cover plate is removed after bonding the sensing device to the circuit board. The method further includes mounting an optical component corresponding to the sensing device on the circuit board. A photosensitive module formed by the method is also provided.Type: GrantFiled: January 25, 2016Date of Patent: May 8, 2018Assignee: XINTEC INC.Inventors: Tsang-Yu Liu, Chi-Chang Liao
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Patent number: 9887229Abstract: This present invention provides a method of manufacturing a chip scale sensing chip package, comprising the steps of: providing a sensing device wafer having a first top surface and a first bottom surface opposite to each other, whereby the sensing device wafer comprises a plurality of chip areas, and each of the chip areas comprising a sensing device and a plurality of conductive pads adjacent to the sensing chip nearby the first top surface; providing a cap wafer having a second top surface and a second bottom surface opposite to each other, and bonding the second surface of the cap wafer to the first top surface of the sensing device wafer by sandwiching a first adhesive layer therebetween; providing a temporary carrier substrate, and bonding the temporary carrier substrate to the second top surface of the cap wafer by sandwiching a second adhesive layer therebetween; forming a wiring layer connecting to each of the conductive pads on the first bottom surface of the sensing device wafer; providing a firstType: GrantFiled: August 2, 2016Date of Patent: February 6, 2018Assignee: XINTEC INC.Inventors: Yen-Shih Ho, Tsang-Yu Liu, Chia-Sheng Lin, Chia-Ming Cheng
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Patent number: 9881889Abstract: A chip package is provided, in which includes: a packaging substrate, a chip and a plurality solder balls interposed between the packaging substrate and the chip for bonding the packaging substrate and the chip, wherein the solder balls include a first portion of a first size and a second portion of a second size that is different from the first size.Type: GrantFiled: April 11, 2014Date of Patent: January 30, 2018Assignee: XINTEC INC.Inventors: Yu-Lung Huang, Shu-Ming Chang, Tsang-Yu Liu, Yen-Shih Ho
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Patent number: 9780251Abstract: A semiconductor structure includes a silicon substrate, a protection layer, an electrical pad, an isolation layer, a redistribution layer, a conductive layer, a passivation layer, and a conductive structure. The silicon substrate has a concave region, a step structure, a tooth structure, a first surface, and a second surface opposite to the first surface. The step structure and the tooth structure surround the concave region. The step structure has a first oblique surface, a third surface, and a second oblique surface facing the concave region and connected in sequence. The protection layer is located on the first surface of the silicon substrate. The electrical pad is located in the protection layer and exposed through the concave region. The isolation layer is located on the first and second oblique surfaces, the second and third surfaces of the step structure, and the tooth structure.Type: GrantFiled: March 6, 2017Date of Patent: October 3, 2017Assignee: XINTEC INC.Inventors: Wei-Luen Suen, Wei-Ming Chien, Po-Han Lee, Tsang-Yu Liu, Yen-Shih Ho
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Publication number: 20170213805Abstract: A method for forming a chip package is provided. The method includes providing a first substrate and a second substrate. The first substrate is attached onto the second substrate by an adhesive layer. A first opening is formed to penetrate the first substrate and the adhesive layer and separate the first substrate and the adhesive layer into portions. A chip package formed by the method is also provided.Type: ApplicationFiled: April 10, 2017Publication date: July 27, 2017Inventors: Chia-Lun SHEN, Yi-Ming CHANG, Tsang-Yu LIU, Yen-Shih HO
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Publication number: 20170207182Abstract: A chip package including a substrate is provided. The substrate has a first surface and a second surface opposite thereto. The substrate includes a sensing or device region which is adjacent to the first surface. A recess is in the substrate. The recess extends from the second surface towards the first surface, and vertically overlaps the sensing or device region. A redistribution layer is electrically connected to the sensing or device region, and extends from the second surface into the recess. A method of forming the chip package is also provided.Type: ApplicationFiled: January 18, 2017Publication date: July 20, 2017Inventors: Yen-Shih HO, Tsang-Yu LIU, Chia-Sheng LIN, Chaung-Lin LAI
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Patent number: 9711425Abstract: A sensing module is provided. The sensing module includes a sensing device. The sensing device includes a first substrate having a first surface and a second surface opposite thereto. The sensing device also includes a sensing region adjacent to the first surface and a conducting pad on the first surface. The sensing device further includes a redistribution layer on the second surface and electrically connected to the conducting pad. The sensing module also includes a second substrate and a cover plate bonded to the sensing device so that the sensing device is between the second substrate and the cover plate. The conducting pad is electrically connected to the second substrate through the redistribution layer. The sensing module further includes an encapsulating layer filled between the second substrate and the cover plate to surround the sensing device.Type: GrantFiled: August 15, 2016Date of Patent: July 18, 2017Assignee: XINTEC INC.Inventors: Shu-Ming Chang, Po-Chang Huang, Tsang-Yu Liu, Yu-Lung Huang, Chi-Chang Liao
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Patent number: 9711403Abstract: An embodiment of the invention provides a method for forming a chip package which includes: providing a substrate having a first surface and a second surface, wherein at least two conducting pads are disposed on the first surface of the substrate; partially removing the substrate from the second surface of the substrate to form at least two holes extending towards the first surface, wherein the holes correspondingly and respectively align with one of the conducting pads; after the holes are formed, partially removing the substrate from the second substrate to form at least a recess extending towards the first surface, wherein the recess overlaps with the holes; forming an insulating layer on a sidewall and a bottom of the trench and on sidewalls of the holes; and forming a conducting layer on the insulating layer, wherein the conducting layer electrically contacts with one of the conducting pads.Type: GrantFiled: January 17, 2012Date of Patent: July 18, 2017Assignee: XINTEC INC.Inventors: Chien-Hui Chen, Ming-Kun Yang, Tsang-Yu Liu, Yen-Shih Ho
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Publication number: 20170179330Abstract: A semiconductor structure includes a silicon substrate, a protection layer, an electrical pad, an isolation layer, a redistribution layer, a conductive layer, a passivation layer, and a conductive structure. The silicon substrate has a concave region, a step structure, a tooth structure, a first surface, and a second surface opposite to the first surface. The step structure and the tooth structure surround the concave region. The step structure has a first oblique surface, a third surface, and a second oblique surface facing the concave region and connected in sequence. The protection layer is located on the first surface of the silicon substrate. The electrical pad is located in the protection layer and exposed through the concave region. The isolation layer is located on the first and second oblique surfaces, the second and third surfaces of the step structure, and the tooth structure.Type: ApplicationFiled: March 6, 2017Publication date: June 22, 2017Inventors: Wei-Luen SUEN, Wei-Ming CHIEN, Po-Han LEE, Tsang-Yu LIU, Yen-Shih HO
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Patent number: 9685354Abstract: An embodiment of this invention provides a separation apparatus for separating a stacked article, such as a semiconductor chip package with sensing functions, comprising a substrate and a cap layer formed on the substrate. The separation apparatus comprises a vacuum nozzle head including a suction pad having a top surface and a bottom surface, a through hole penetrating the top surface and the bottom surface of the suction pad, and a hollow vacuum pipe connecting the through hole to a vacuum pump; a stage positing under the vacuum nozzle head and substantially aligning with the suction pad; a control means coupling to the vacuum nozzle head to lift upward or lower down the vacuum nozzle head; and a first cutter comprising a first cutting body and a first knife connecting to the first cutting body.Type: GrantFiled: April 1, 2015Date of Patent: June 20, 2017Assignee: XINTEC INC.Inventors: Yen-Shih Ho, Tsang-Yu Liu, Chia-Sheng Lin, Yi-Ming Chang
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Patent number: 9653422Abstract: A method for forming a chip package is provided. The method includes providing a first substrate and a second substrate. The first substrate is attached onto the second substrate by an adhesive layer. A first opening is formed to penetrate the first substrate and the adhesive layer and separate the first substrate and the adhesive layer into portions. A chip package formed by the method is also provided.Type: GrantFiled: March 30, 2015Date of Patent: May 16, 2017Assignee: XINTEC INC.Inventors: Chia-Lun Shen, Yi-Ming Chang, Tsang-Yu Liu, Yen-Shih Ho
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Patent number: 9640683Abstract: A semiconductor structure includes a silicon substrate, a protection layer, an electrical pad, an isolation layer, a redistribution layer, a conductive layer, a passivation layer, and a conductive structure. The silicon substrate has a concave region, a step structure, a tooth structure, a first surface, and a second surface opposite to the first surface. The step structure and the tooth structure surround the concave region. The step structure has a first oblique surface, a third surface, and a second oblique surface facing the concave region and connected in sequence. The protection layer is located on the first surface of the silicon substrate. The electrical pad is located in the protection layer and exposed through the concave region. The isolation layer is located on the first and second oblique surfaces, the second and third surfaces of the step structure, and the tooth structure.Type: GrantFiled: March 6, 2015Date of Patent: May 2, 2017Assignee: XINTEC INC.Inventors: Wei-Luen Suen, Wei-Ming Chien, Po-Han Lee, Tsang-Yu Liu, Yen-Shih Ho
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Patent number: 9640488Abstract: An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a first recess extending from the first surface towards the second surface; a second recess extending from a bottom of the first recess towards the second surface, wherein a sidewall and the bottom of the first recess and a second sidewall and a second bottom of the second recess together form an exterior side surface of the semiconductor substrate; a wire layer disposed over the first surface and extending into the first recess and/or the second recess; an insulating layer positioned between the wire layer and the semiconductor substrate; and a metal light shielding layer disposed over the first surface and having at least one hole, wherein a shape of the at least one hole is a quadrangle.Type: GrantFiled: January 27, 2016Date of Patent: May 2, 2017Assignee: XINTEC INC.Inventors: Yi-Min Lin, Yi-Ming Chang, Shu-Ming Chang, Yen-Shih Ho, Tsang-Yu Liu, Chia-Ming Cheng
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Publication number: 20170116458Abstract: A method for forming a sensing device includes providing a first substrate. The first substrate has a first surface and a second surface opposite thereto. A sensing region is adjacent to the first surface. A temporary cover plate is provided on the second surface to cover the sensing region. The method also includes forming a redistribution layer on the second surface and electrically connected to the sensing region. The method further includes removing the temporary cover plate after the formation of the redistribution layer. The first substrate is bonded to a second substrate and a cover plate after the removal of the temporary cover plate so that the first substrate is positioned between the second substrate and the cover plate. In addition, the method includes filling an encapsulating layer between the second substrate and the cover plate to surround the first substrate.Type: ApplicationFiled: October 19, 2016Publication date: April 27, 2017Inventors: Tsang-Yu LIU, Ying-Nan WEN, Chi-Chang LIAO, Yu-Lung HUANG
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Publication number: 20170117242Abstract: A chip package is provided. The chip package includes a substrate. The substrate includes a sensing region or device region. The chip package also includes a first conducting structure disposed on the substrate. The first conducting structure is electrically connected to the sensing region or device region. The chip package further includes a passive element vertically stacked on the substrate. The passive element and the first conducting structure are positioned side by side.Type: ApplicationFiled: October 19, 2016Publication date: April 27, 2017Inventors: Yen-Shih HO, Tsang-Yu LIU, Po-Han LEE, Chi-Chang LIAO
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Patent number: 9633935Abstract: A stacked chip package is provided. The stacked chip package includes a first substrate having a first side and a second side opposite thereto. The first substrate includes a recess therein. The recess adjoins a side edge of the first substrate. A plurality of redistribution layers is disposed on the first substrate and extends onto the bottom of the recess. A second substrate is disposed on the first side of the first substrate. A plurality of bonding wires is correspondingly disposed on the redistribution layers in the recess, and extends onto the second substrate. A device substrate is disposed on the second side of the first substrate. A method of forming the stacked chip package is also provided.Type: GrantFiled: April 27, 2015Date of Patent: April 25, 2017Assignee: XINTEC INC.Inventors: Yen-Shih Ho, Chih-Wei Ho, Tsang-Yu Liu
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Patent number: 9620431Abstract: A chip package including a semiconductor substrate is provided. A recess is in the semiconductor substrate, wherein the semiconductor substrate has at least one spacer protruding from the bottom of the recess. A conducting layer is disposed on the semiconductor substrate and extends into the recess. A method for forming the chip package is also provided.Type: GrantFiled: February 11, 2015Date of Patent: April 11, 2017Assignee: XINTEC INC.Inventors: Chia-Ming Cheng, Tsang-Yu Liu, Chi-Chang Liao, Yu-Lung Huang
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Patent number: 9613919Abstract: A chip package is provided. The chip package includes a substrate having a first surface and a second surface opposite thereto. A dielectric layer is disposed on the first surface of the substrate and includes a conducting pad structure. A first opening penetrates the substrate and exposes a surface of the conducting pad structure. A second opening is communication with the first opening and penetrates the conducting pad structure. A redistribution layer is conformally disposed on a sidewall of the first opening and the surface of the conducting pad structure and is filled into the second opening. A method for forming the chip package is also provided.Type: GrantFiled: December 3, 2015Date of Patent: April 4, 2017Assignee: XINTEC INC.Inventors: Tsang-Yu Liu, Po-Han Lee, Wei-Ming Chien