Patents by Inventor Tsang-Yu Liu

Tsang-Yu Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10140498
    Abstract: A method for forming a sensing device includes providing a first substrate. The first substrate has a first surface and a second surface opposite thereto. A sensing region is adjacent to the first surface. A temporary cover plate is provided on the second surface to cover the sensing region. The method also includes forming a redistribution layer on the second surface and electrically connected to the sensing region. The method further includes removing the temporary cover plate after the formation of the redistribution layer. The first substrate is bonded to a second substrate and a cover plate after the removal of the temporary cover plate so that the first substrate is positioned between the second substrate and the cover plate. In addition, the method includes filling an encapsulating layer between the second substrate and the cover plate to surround the first substrate.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: November 27, 2018
    Assignee: XINTEC INC.
    Inventors: Tsang-Yu Liu, Ying-Nan Wen, Chi-Chang Liao, Yu-Lung Huang
  • Patent number: 10109559
    Abstract: An electronic device package and fabrication method thereof is provided. First, a semiconductor substrate is provided and the upper surface of it is etched to from recesses. A first isolation layer is formed on the upper surface and the sidewalls of the recesses. A conductive part is formed to fulfill the recesses and a conductive pad is formed on the first isolation layer to connect the conductive part. An electronic device is combined with the semiconductor substrate on the supper surface, wherein the electronic device has a connecting pad electrically connected to the conductive pad. The semiconductor substrate is thinned form its lower surface to expose the conductive part. A second isolation layer is formed below the lower surface and has an opening to expose the conductive part. A redistribution metal line is formed below the second isolation layer and in the opening to electrically connect to the conductive part.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: October 23, 2018
    Assignee: XINTEC INC.
    Inventors: Chia-Sheng Lin, Yen-Shih Ho, Tsang-Yu Liu
  • Patent number: 10109663
    Abstract: A chip package including a substrate is provided. The substrate has a first surface and a second surface opposite thereto. The substrate includes a sensing region. A cover plate is on the first surface and covers the sensing region. A shielding layer covers a sidewall of the cover plate and extends towards the second surface. The shielding layer has an inner surface adjacent to the cover plate and has an outer surface away from the cover plate. The length of the outer surface extending towards the second surface is less than that of the inner surface extending towards the second surface, and is not less than that of the sidewall of the cover plate. A method of forming the chip package is also provided.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: October 23, 2018
    Assignee: XINTEC INC.
    Inventors: Yu-Lung Huang, Tsang-Yu Liu, Yi-Ming Chang, Hsin Kuan
  • Patent number: 10096635
    Abstract: A semiconductor structure includes a chip, a light transmissive plate, a spacer, and a light-shielding layer. The chip has an image sensor, a first surface and a second surface opposite to the first surface. The image sensor is located on the first surface. The light transmissive plate is disposed on the first surface and covers the image sensor. The spacer is between the light transmissive plate and the first surface, and surrounds the image sensor. The light-shielding layer is located on the first surface between the spacer and the image sensor.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: October 9, 2018
    Assignee: XINTEC INC.
    Inventors: Wei-Ming Chien, Po-Han Lee, Tsang-Yu Liu, Yen-Shih Ho
  • Patent number: 10050006
    Abstract: A method for forming a chip package is provided. The method includes providing a first substrate and a second substrate. The first substrate is attached onto the second substrate by an adhesive layer. A first opening is formed to penetrate the first substrate and the adhesive layer and separate the first substrate and the adhesive layer into portions. A chip package formed by the method is also provided.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: August 14, 2018
    Assignee: XINTEC INC.
    Inventors: Chia-Lun Shen, Yi-Ming Chang, Tsang-Yu Liu, Yen-Shih Ho
  • Patent number: 10049252
    Abstract: A chip package includes a substrate, a capacitive sensing layer and a computing chip. The substrate has a first surface and a second surface opposite to the first surface, and the capacitive sensing layer is disposed above the second surface and having a third surface opposite to the second surface, which the capacitive sensing layer includes a plurality of capacitive sensing electrodes and a plurality of metal wires. The capacitive sensing electrodes are on the second surface, and the metal wires are on the capacitive sensing electrodes. The computing chip is disposed above the third surface and electrically connected to the capacitive sensing electrodes.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: August 14, 2018
    Assignee: XINTEC INC.
    Inventors: Yen-Shih Ho, Shu-Ming Chang, Tsang-Yu Liu, Hsing-Lung Shen
  • Publication number: 20180175101
    Abstract: A method for manufacturing a semiconductor structure includes the following steps. A first carrier is adhered to a first surface of a wafer by a first temporary bonding layer. A second surface of the wafer facing away from the first carrier is etched to form at least one through hole and at least one trench, in which a conductive pad of the wafer is exposed through the through hole. An isolation layer is formed on the second surface of the wafer, a sidewall of the through hole, and a sidewall of the trench. A second carrier is adhered to the second surface of the wafer by a second temporary bonding layer, and thus the through hole and the trench are covered by the second carrier. The first carrier and the first temporary bonding layer are removed.
    Type: Application
    Filed: December 20, 2017
    Publication date: June 21, 2018
    Inventors: Yen-Shih Ho, Tsang-Yu Liu, Chia-Sheng Lin, Chaung-Lin Lai
  • Patent number: 9997473
    Abstract: A chip package including a substrate is provided. The substrate has a first surface and a second surface opposite thereto. The substrate includes a sensing or device region which is adjacent to the first surface. A recess is in the substrate. The recess extends from the second surface towards the first surface, and vertically overlaps the sensing or device region. A redistribution layer is electrically connected to the sensing or device region, and extends from the second surface into the recess. A method of forming the chip package is also provided.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: June 12, 2018
    Assignee: XINTEC INC.
    Inventors: Yen-Shih Ho, Tsang-Yu Liu, Chia-Sheng Lin, Chaung-Lin Lai
  • Patent number: 9978788
    Abstract: A method for forming a photosensitive module is provided. The method includes providing a sensing device. The sensing device includes a conducting pad located on a substrate. A first opening penetrates the substrate and exposes the conducting pad. A redistribution layer is in the first opening to electrically connect to the conducting pad. A cover plate is located on the substrate and covers the conducting pad. The method also includes removing the cover plate of the sensing device. The method further includes bonding the sensing device to a circuit board after the removal of the cover plate. The redistribution layer in the first opening is exposed and faces the circuit board. In addition, the method includes mounting an optical component corresponding to the sensing device on the circuit board. A photosensitive module formed by the method is also provided.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: May 22, 2018
    Assignee: XINTEC INC.
    Inventors: Yen-Shih Ho, Tsang-Yu Liu, Chi-Chang Liao
  • Patent number: 9966400
    Abstract: A method for forming a photosensitive module is provided. The method includes providing a sensing device. The sensing device includes a substrate having a first surface and a second surface opposite thereto. A conducting pad is located on the first surface. A first opening penetrates the substrate and exposes the conducting pad. A redistribution layer is in the first opening to electrically connect to the conducting pad. A cover plate is located on the first surface and covers the conducting pad. The method also includes bonding the sensing device to a circuit board. The cover plate is removed after bonding the sensing device to the circuit board. The method further includes mounting an optical component corresponding to the sensing device on the circuit board. A photosensitive module formed by the method is also provided.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: May 8, 2018
    Assignee: XINTEC INC.
    Inventors: Tsang-Yu Liu, Chi-Chang Liao
  • Patent number: 9887229
    Abstract: This present invention provides a method of manufacturing a chip scale sensing chip package, comprising the steps of: providing a sensing device wafer having a first top surface and a first bottom surface opposite to each other, whereby the sensing device wafer comprises a plurality of chip areas, and each of the chip areas comprising a sensing device and a plurality of conductive pads adjacent to the sensing chip nearby the first top surface; providing a cap wafer having a second top surface and a second bottom surface opposite to each other, and bonding the second surface of the cap wafer to the first top surface of the sensing device wafer by sandwiching a first adhesive layer therebetween; providing a temporary carrier substrate, and bonding the temporary carrier substrate to the second top surface of the cap wafer by sandwiching a second adhesive layer therebetween; forming a wiring layer connecting to each of the conductive pads on the first bottom surface of the sensing device wafer; providing a first
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: February 6, 2018
    Assignee: XINTEC INC.
    Inventors: Yen-Shih Ho, Tsang-Yu Liu, Chia-Sheng Lin, Chia-Ming Cheng
  • Patent number: 9881889
    Abstract: A chip package is provided, in which includes: a packaging substrate, a chip and a plurality solder balls interposed between the packaging substrate and the chip for bonding the packaging substrate and the chip, wherein the solder balls include a first portion of a first size and a second portion of a second size that is different from the first size.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: January 30, 2018
    Assignee: XINTEC INC.
    Inventors: Yu-Lung Huang, Shu-Ming Chang, Tsang-Yu Liu, Yen-Shih Ho
  • Patent number: 9780251
    Abstract: A semiconductor structure includes a silicon substrate, a protection layer, an electrical pad, an isolation layer, a redistribution layer, a conductive layer, a passivation layer, and a conductive structure. The silicon substrate has a concave region, a step structure, a tooth structure, a first surface, and a second surface opposite to the first surface. The step structure and the tooth structure surround the concave region. The step structure has a first oblique surface, a third surface, and a second oblique surface facing the concave region and connected in sequence. The protection layer is located on the first surface of the silicon substrate. The electrical pad is located in the protection layer and exposed through the concave region. The isolation layer is located on the first and second oblique surfaces, the second and third surfaces of the step structure, and the tooth structure.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: October 3, 2017
    Assignee: XINTEC INC.
    Inventors: Wei-Luen Suen, Wei-Ming Chien, Po-Han Lee, Tsang-Yu Liu, Yen-Shih Ho
  • Publication number: 20170213805
    Abstract: A method for forming a chip package is provided. The method includes providing a first substrate and a second substrate. The first substrate is attached onto the second substrate by an adhesive layer. A first opening is formed to penetrate the first substrate and the adhesive layer and separate the first substrate and the adhesive layer into portions. A chip package formed by the method is also provided.
    Type: Application
    Filed: April 10, 2017
    Publication date: July 27, 2017
    Inventors: Chia-Lun SHEN, Yi-Ming CHANG, Tsang-Yu LIU, Yen-Shih HO
  • Publication number: 20170207182
    Abstract: A chip package including a substrate is provided. The substrate has a first surface and a second surface opposite thereto. The substrate includes a sensing or device region which is adjacent to the first surface. A recess is in the substrate. The recess extends from the second surface towards the first surface, and vertically overlaps the sensing or device region. A redistribution layer is electrically connected to the sensing or device region, and extends from the second surface into the recess. A method of forming the chip package is also provided.
    Type: Application
    Filed: January 18, 2017
    Publication date: July 20, 2017
    Inventors: Yen-Shih HO, Tsang-Yu LIU, Chia-Sheng LIN, Chaung-Lin LAI
  • Patent number: 9711403
    Abstract: An embodiment of the invention provides a method for forming a chip package which includes: providing a substrate having a first surface and a second surface, wherein at least two conducting pads are disposed on the first surface of the substrate; partially removing the substrate from the second surface of the substrate to form at least two holes extending towards the first surface, wherein the holes correspondingly and respectively align with one of the conducting pads; after the holes are formed, partially removing the substrate from the second substrate to form at least a recess extending towards the first surface, wherein the recess overlaps with the holes; forming an insulating layer on a sidewall and a bottom of the trench and on sidewalls of the holes; and forming a conducting layer on the insulating layer, wherein the conducting layer electrically contacts with one of the conducting pads.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: July 18, 2017
    Assignee: XINTEC INC.
    Inventors: Chien-Hui Chen, Ming-Kun Yang, Tsang-Yu Liu, Yen-Shih Ho
  • Patent number: 9711425
    Abstract: A sensing module is provided. The sensing module includes a sensing device. The sensing device includes a first substrate having a first surface and a second surface opposite thereto. The sensing device also includes a sensing region adjacent to the first surface and a conducting pad on the first surface. The sensing device further includes a redistribution layer on the second surface and electrically connected to the conducting pad. The sensing module also includes a second substrate and a cover plate bonded to the sensing device so that the sensing device is between the second substrate and the cover plate. The conducting pad is electrically connected to the second substrate through the redistribution layer. The sensing module further includes an encapsulating layer filled between the second substrate and the cover plate to surround the sensing device.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: July 18, 2017
    Assignee: XINTEC INC.
    Inventors: Shu-Ming Chang, Po-Chang Huang, Tsang-Yu Liu, Yu-Lung Huang, Chi-Chang Liao
  • Publication number: 20170179330
    Abstract: A semiconductor structure includes a silicon substrate, a protection layer, an electrical pad, an isolation layer, a redistribution layer, a conductive layer, a passivation layer, and a conductive structure. The silicon substrate has a concave region, a step structure, a tooth structure, a first surface, and a second surface opposite to the first surface. The step structure and the tooth structure surround the concave region. The step structure has a first oblique surface, a third surface, and a second oblique surface facing the concave region and connected in sequence. The protection layer is located on the first surface of the silicon substrate. The electrical pad is located in the protection layer and exposed through the concave region. The isolation layer is located on the first and second oblique surfaces, the second and third surfaces of the step structure, and the tooth structure.
    Type: Application
    Filed: March 6, 2017
    Publication date: June 22, 2017
    Inventors: Wei-Luen SUEN, Wei-Ming CHIEN, Po-Han LEE, Tsang-Yu LIU, Yen-Shih HO
  • Patent number: 9685354
    Abstract: An embodiment of this invention provides a separation apparatus for separating a stacked article, such as a semiconductor chip package with sensing functions, comprising a substrate and a cap layer formed on the substrate. The separation apparatus comprises a vacuum nozzle head including a suction pad having a top surface and a bottom surface, a through hole penetrating the top surface and the bottom surface of the suction pad, and a hollow vacuum pipe connecting the through hole to a vacuum pump; a stage positing under the vacuum nozzle head and substantially aligning with the suction pad; a control means coupling to the vacuum nozzle head to lift upward or lower down the vacuum nozzle head; and a first cutter comprising a first cutting body and a first knife connecting to the first cutting body.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: June 20, 2017
    Assignee: XINTEC INC.
    Inventors: Yen-Shih Ho, Tsang-Yu Liu, Chia-Sheng Lin, Yi-Ming Chang
  • Patent number: 9653422
    Abstract: A method for forming a chip package is provided. The method includes providing a first substrate and a second substrate. The first substrate is attached onto the second substrate by an adhesive layer. A first opening is formed to penetrate the first substrate and the adhesive layer and separate the first substrate and the adhesive layer into portions. A chip package formed by the method is also provided.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: May 16, 2017
    Assignee: XINTEC INC.
    Inventors: Chia-Lun Shen, Yi-Ming Chang, Tsang-Yu Liu, Yen-Shih Ho